* THE SOFTWARE.
*/
-#include "sysemu/sysemu.h"
+#include "sysemu/numa.h"
#include "exec/cpu-common.h"
#include "qemu/bitmap.h"
#include "qom/cpu.h"
#include "qapi-visit.h"
#include "qapi/opts-visitor.h"
#include "qapi/dealloc-visitor.h"
-#include "qapi/qmp/qerror.h"
#include "hw/boards.h"
#include "sysemu/hostmem.h"
#include "qmp-commands.h"
#include "hw/mem/pc-dimm.h"
+#include "qemu/option.h"
+#include "qemu/config-file.h"
QemuOptsList qemu_numa_opts = {
.name = "numa",
};
static int have_memdevs = -1;
+static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
+ * For all nodes, nodeid < max_numa_nodeid
+ */
+int nb_numa_nodes;
+NodeInfo numa_info[MAX_NODES];
+
+void numa_set_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
+{
+ struct numa_addr_range *range;
+
+ /*
+ * Memory-less nodes can come here with 0 size in which case,
+ * there is nothing to do.
+ */
+ if (!size) {
+ return;
+ }
+
+ range = g_malloc0(sizeof(*range));
+ range->mem_start = addr;
+ range->mem_end = addr + size - 1;
+ QLIST_INSERT_HEAD(&numa_info[node].addr, range, entry);
+}
+
+void numa_unset_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
+{
+ struct numa_addr_range *range, *next;
+
+ QLIST_FOREACH_SAFE(range, &numa_info[node].addr, entry, next) {
+ if (addr == range->mem_start && (addr + size - 1) == range->mem_end) {
+ QLIST_REMOVE(range, entry);
+ g_free(range);
+ return;
+ }
+ }
+}
+
+static void numa_set_mem_ranges(void)
+{
+ int i;
+ ram_addr_t mem_start = 0;
+
+ /*
+ * Deduce start address of each node and use it to store
+ * the address range info in numa_info address range list
+ */
+ for (i = 0; i < nb_numa_nodes; i++) {
+ numa_set_mem_node_id(mem_start, numa_info[i].node_mem, i);
+ mem_start += numa_info[i].node_mem;
+ }
+}
+
+/*
+ * Check if @addr falls under NUMA @node.
+ */
+static bool numa_addr_belongs_to_node(ram_addr_t addr, uint32_t node)
+{
+ struct numa_addr_range *range;
+
+ QLIST_FOREACH(range, &numa_info[node].addr, entry) {
+ if (addr >= range->mem_start && addr <= range->mem_end) {
+ return true;
+ }
+ }
+ return false;
+}
+
+/*
+ * Given an address, return the index of the NUMA node to which the
+ * address belongs to.
+ */
+uint32_t numa_get_node(ram_addr_t addr, Error **errp)
+{
+ uint32_t i;
+
+ /* For non NUMA configurations, check if the addr falls under node 0 */
+ if (!nb_numa_nodes) {
+ if (numa_addr_belongs_to_node(addr, 0)) {
+ return 0;
+ }
+ }
+
+ for (i = 0; i < nb_numa_nodes; i++) {
+ if (numa_addr_belongs_to_node(addr, i)) {
+ return i;
+ }
+ }
+
+ error_setg(errp, "Address 0x" RAM_ADDR_FMT " doesn't belong to any "
+ "NUMA node", addr);
+ return -1;
+}
static void numa_node_parse(NumaNodeOptions *node, QemuOpts *opts, Error **errp)
{
if (nodenr >= MAX_NODES) {
error_setg(errp, "Max number of NUMA nodes reached: %"
- PRIu16 "\n", nodenr);
+ PRIu16 "", nodenr);
return;
}
}
for (cpus = node->cpus; cpus; cpus = cpus->next) {
- if (cpus->value > MAX_CPUMASK_BITS) {
- error_setg(errp, "CPU number %" PRIu16 " is bigger than %d",
- cpus->value, MAX_CPUMASK_BITS);
+ if (cpus->value >= max_cpus) {
+ error_setg(errp,
+ "CPU index (%" PRIu16 ")"
+ " should be smaller than maxcpus (%d)",
+ cpus->value, max_cpus);
return;
}
bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1);
}
if (node->has_mem && node->has_memdev) {
- error_setg(errp, "qemu: cannot specify both mem= and memdev=\n");
+ error_setg(errp, "qemu: cannot specify both mem= and memdev=");
return;
}
}
if (node->has_memdev != have_memdevs) {
error_setg(errp, "qemu: memdev option must be specified for either "
- "all or no nodes\n");
+ "all or no nodes");
return;
}
max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
}
-int numa_init_func(QemuOpts *opts, void *opaque)
+static int parse_numa(void *opaque, QemuOpts *opts, Error **errp)
{
NumaOptions *object = NULL;
Error *err = NULL;
goto error;
}
- switch (object->kind) {
+ switch (object->type) {
case NUMA_OPTIONS_KIND_NODE:
- numa_node_parse(object->node, opts, &err);
+ numa_node_parse(object->u.node, opts, &err);
if (err) {
goto error;
}
return -1;
}
-void set_numa_nodes(void)
+static char *enumerate_cpus(unsigned long *cpus, int max_cpus)
+{
+ int cpu;
+ bool first = true;
+ GString *s = g_string_new(NULL);
+
+ for (cpu = find_first_bit(cpus, max_cpus);
+ cpu < max_cpus;
+ cpu = find_next_bit(cpus, max_cpus, cpu + 1)) {
+ g_string_append_printf(s, "%s%d", first ? "" : " ", cpu);
+ first = false;
+ }
+ return g_string_free(s, FALSE);
+}
+
+static void validate_numa_cpus(void)
{
int i;
+ DECLARE_BITMAP(seen_cpus, MAX_CPUMASK_BITS);
+
+ bitmap_zero(seen_cpus, MAX_CPUMASK_BITS);
+ for (i = 0; i < nb_numa_nodes; i++) {
+ if (bitmap_intersects(seen_cpus, numa_info[i].node_cpu,
+ MAX_CPUMASK_BITS)) {
+ bitmap_and(seen_cpus, seen_cpus,
+ numa_info[i].node_cpu, MAX_CPUMASK_BITS);
+ error_report("CPU(s) present in multiple NUMA nodes: %s",
+ enumerate_cpus(seen_cpus, max_cpus));
+ exit(EXIT_FAILURE);
+ }
+ bitmap_or(seen_cpus, seen_cpus,
+ numa_info[i].node_cpu, MAX_CPUMASK_BITS);
+ }
+
+ if (!bitmap_full(seen_cpus, max_cpus)) {
+ char *msg;
+ bitmap_complement(seen_cpus, seen_cpus, max_cpus);
+ msg = enumerate_cpus(seen_cpus, max_cpus);
+ error_report("warning: CPU(s) not present in any NUMA nodes: %s", msg);
+ error_report("warning: All CPU(s) up to maxcpus should be described "
+ "in NUMA config");
+ g_free(msg);
+ }
+}
+
+void parse_numa_opts(MachineClass *mc)
+{
+ int i;
+
+ if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, NULL, NULL)) {
+ exit(1);
+ }
assert(max_numa_nodeid <= MAX_NODES);
exit(1);
}
+ for (i = 0; i < nb_numa_nodes; i++) {
+ QLIST_INIT(&numa_info[i].addr);
+ }
+
+ numa_set_mem_ranges();
+
for (i = 0; i < nb_numa_nodes; i++) {
if (!bitmap_empty(numa_info[i].node_cpu, MAX_CPUMASK_BITS)) {
break;
}
}
- /* assigning the VCPUs round-robin is easier to implement, guest OSes
- * must cope with this anyway, because there are BIOSes out there in
- * real machines which also use this scheme.
+ /* Historically VCPUs were assigned in round-robin order to NUMA
+ * nodes. However it causes issues with guest not handling it nice
+ * in case where cores/threads from a multicore CPU appear on
+ * different nodes. So allow boards to override default distribution
+ * rule grouping VCPUs by socket so that VCPUs from the same socket
+ * would be on the same node.
*/
if (i == nb_numa_nodes) {
for (i = 0; i < max_cpus; i++) {
- set_bit(i, numa_info[i % nb_numa_nodes].node_cpu);
+ unsigned node_id = i % nb_numa_nodes;
+ if (mc->cpu_index_to_socket_id) {
+ node_id = mc->cpu_index_to_socket_id(i) % nb_numa_nodes;
+ }
+
+ set_bit(i, numa_info[node_id].node_cpu);
}
}
+
+ validate_numa_cpus();
+ } else {
+ numa_set_mem_node_id(0, ram_size, 0);
}
}
-void set_numa_modes(void)
+void numa_post_machine_init(void)
{
CPUState *cpu;
int i;
*/
if (err) {
error_report_err(err);
- memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
+ memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
}
#else
fprintf(stderr, "-mem-path not supported on this host\n");
exit(1);
#endif
} else {
- memory_region_init_ram(mr, owner, name, ram_size, &error_abort);
+ memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
}
vmstate_register_ram_global(mr);
}
MemoryDeviceInfo *value = info->value;
if (value) {
- switch (value->kind) {
+ switch (value->type) {
case MEMORY_DEVICE_INFO_KIND_DIMM:
- node_mem[value->dimm->node] += value->dimm->size;
+ node_mem[value->u.dimm->node] += value->u.dimm->size;
break;
default:
break;
m->value->policy = object_property_get_enum(obj,
"policy",
- HostMemPolicy_lookup,
+ "HostMemPolicy",
&err);
if (err) {
goto error;
Object *obj;
MemdevList *list = NULL;
- obj = object_resolve_path("/objects", NULL);
+ obj = object_get_objects_root();
if (obj == NULL) {
return NULL;
}
projects / qemu.git / blobdiff