#include "qemu/osdep.h"
#include <glib/gstdio.h>
#include "contrib/ivshmem-server/ivshmem-server.h"
-#include "libqos/pci-pc.h"
+#include "libqos/libqos-pc.h"
+#include "libqos/libqos-spapr.h"
#include "libqtest.h"
#include "qemu-common.h"
}
typedef struct _IVState {
- QTestState *qtest;
- void *reg_base, *mem_base;
- QPCIBus *pcibus;
+ QOSState *qs;
+ QPCIBar reg_bar, mem_bar;
QPCIDevice *dev;
} IVState;
static inline unsigned in_reg(IVState *s, enum Reg reg)
{
const char *name = reg2str(reg);
- QTestState *qtest = global_qtest;
unsigned res;
- global_qtest = s->qtest;
- res = qpci_io_readl(s->dev, s->reg_base + reg);
- g_test_message("*%s -> %x\n", name, res);
- global_qtest = qtest;
+ res = qpci_io_readl(s->dev, s->reg_bar, reg);
+ g_test_message("*%s -> %x", name, res);
return res;
}
static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
{
const char *name = reg2str(reg);
- QTestState *qtest = global_qtest;
- global_qtest = s->qtest;
- g_test_message("%x -> *%s\n", v, name);
- qpci_io_writel(s->dev, s->reg_base + reg, v);
- global_qtest = qtest;
+ g_test_message("%x -> *%s", v, name);
+ qpci_io_writel(s->dev, s->reg_bar, reg, v);
+}
+
+static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
+{
+ qpci_memread(s->dev, s->mem_bar, off, buf, len);
+}
+
+static inline void write_mem(IVState *s, uint64_t off,
+ const void *buf, size_t len)
+{
+ qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
}
static void cleanup_vm(IVState *s)
{
g_free(s->dev);
- qpci_free_pc(s->pcibus);
- qtest_quit(s->qtest);
+ qtest_shutdown(s->qs);
}
static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
{
uint64_t barsize;
+ const char *arch = qtest_get_arch();
- s->qtest = qtest_start(cmd);
- s->pcibus = qpci_init_pc();
- s->dev = get_device(s->pcibus);
+ if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
+ s->qs = qtest_pc_boot(cmd);
+ } else if (strcmp(arch, "ppc64") == 0) {
+ s->qs = qtest_spapr_boot(cmd);
+ } else {
+ g_printerr("ivshmem-test tests are only available on x86 or ppc64\n");
+ exit(EXIT_FAILURE);
+ }
+ s->dev = get_device(s->qs->pcibus);
- s->reg_base = qpci_iomap(s->dev, 0, &barsize);
- g_assert_nonnull(s->reg_base);
+ s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
g_assert_cmpuint(barsize, ==, 256);
if (msix) {
qpci_msix_enable(s->dev);
}
- s->mem_base = qpci_iomap(s->dev, 2, &barsize);
- g_assert_nonnull(s->mem_base);
+ s->mem_bar = qpci_iomap(s->dev, 2, &barsize);
g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
qpci_device_enable(s->dev);
for (i = 0; i < G_N_ELEMENTS(data); i++) {
data[i] = i;
}
- qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
+ write_mem(s, 0, data, sizeof(data));
/* verify write */
for (i = 0; i < G_N_ELEMENTS(data); i++) {
/* read it back and verify read */
memset(data, 0, sizeof(data));
- qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
+ read_mem(s, 0, data, sizeof(data));
for (i = 0; i < G_N_ELEMENTS(data); i++) {
g_assert_cmpuint(data[i], ==, i);
}
/* host write, guest 1 & 2 read */
memset(tmpshmem, 0x42, TMPSHMSIZE);
- qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
+ read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
- qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
/* guest 1 write, guest 2 read */
memset(data, 0x43, TMPSHMSIZE);
- qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
+ write_mem(s1, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
- qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x43);
}
/* guest 2 write, guest 1 read */
memset(data, 0x44, TMPSHMSIZE);
- qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ write_mem(s2, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
- qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
+ read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x44);
}
return NULL;
}
-static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
+static void setup_vm_with_server(IVState *s, int nvectors)
{
- char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
- "-device ivshmem%s,chardev=chr0,vectors=%d",
- tmpserver,
- msi ? "-doorbell" : ",size=1M,msi=off",
- nvectors);
+ char *cmd;
- setup_vm_cmd(s, cmd, msi);
+ cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s "
+ "-device ivshmem-doorbell,chardev=chr0,vectors=%d",
+ tmpserver, nvectors);
+
+ setup_vm_cmd(s, cmd, true);
g_free(cmd);
}
-static void test_ivshmem_server(bool msi)
+static void test_ivshmem_server(void)
{
IVState state1, state2, *s1, *s2;
ServerThread thread;
thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
g_assert(thread.thread != NULL);
- setup_vm_with_server(&state1, nvectors, msi);
+ setup_vm_with_server(&state1, nvectors);
s1 = &state1;
- setup_vm_with_server(&state2, nvectors, msi);
+ setup_vm_with_server(&state2, nvectors);
s2 = &state2;
/* check got different VM ids */
g_assert_cmpint(vm1, !=, vm2);
/* check number of MSI-X vectors */
- global_qtest = s1->qtest;
- if (msi) {
- ret = qpci_msix_table_size(s1->dev);
- g_assert_cmpuint(ret, ==, nvectors);
- }
+ ret = qpci_msix_table_size(s1->dev);
+ g_assert_cmpuint(ret, ==, nvectors);
/* TODO test behavior before MSI-X is enabled */
/* ping vm2 -> vm1 on vector 0 */
- if (msi) {
- ret = qpci_msix_pending(s1->dev, 0);
- g_assert_cmpuint(ret, ==, 0);
- } else {
- g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
- }
+ ret = qpci_msix_pending(s1->dev, 0);
+ g_assert_cmpuint(ret, ==, 0);
out_reg(s2, DOORBELL, vm1 << 16);
do {
g_usleep(10000);
- ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
+ ret = qpci_msix_pending(s1->dev, 0);
} while (ret == 0 && g_get_monotonic_time() < end_time);
g_assert_cmpuint(ret, !=, 0);
/* ping vm1 -> vm2 on vector 1 */
- global_qtest = s2->qtest;
- if (msi) {
- ret = qpci_msix_pending(s2->dev, 1);
- g_assert_cmpuint(ret, ==, 0);
- } else {
- g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
- }
+ ret = qpci_msix_pending(s2->dev, 1);
+ g_assert_cmpuint(ret, ==, 0);
out_reg(s1, DOORBELL, vm2 << 16 | 1);
do {
g_usleep(10000);
- ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
+ ret = qpci_msix_pending(s2->dev, 1);
} while (ret == 0 && g_get_monotonic_time() < end_time);
g_assert_cmpuint(ret, !=, 0);
close(thread.pipe[0]);
}
-static void test_ivshmem_server_msi(void)
-{
- test_ivshmem_server(true);
-}
-
-static void test_ivshmem_server_irq(void)
-{
- test_ivshmem_server(false);
-}
-
#define PCI_SLOT_HP 0x06
static void test_ivshmem_hotplug(void)
{
- gchar *opts;
+ QTestState *qts;
+ const char *arch = qtest_get_arch();
- qtest_start("");
+ qts = qtest_init("-object memory-backend-ram,size=1M,id=mb1");
- opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
-
- qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
- qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
+ qtest_qmp_device_add(qts, "ivshmem-plain", "iv1",
+ "{'addr': %s, 'memdev': 'mb1'}",
+ stringify(PCI_SLOT_HP));
+ if (strcmp(arch, "ppc64") != 0) {
+ qpci_unplug_acpi_device_test(qts, "iv1", PCI_SLOT_HP);
+ }
- qtest_end();
- g_free(opts);
+ qtest_quit(qts);
}
static void test_ivshmem_memdev(void)
while (true) {
gchar *name;
- name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
+ name = g_strdup_printf("/qtest-%u-%u", getpid(), g_test_rand_int());
*fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
S_IRWXU|S_IRWXG|S_IRWXO);
if (*fd > 0) {
int main(int argc, char **argv)
{
int ret, fd;
+ const char *arch = qtest_get_arch();
gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
-#if !GLIB_CHECK_VERSION(2, 31, 0)
- if (!g_thread_supported()) {
- g_thread_init(NULL);
- }
-#endif
-
g_test_init(&argc, &argv, NULL);
qtest_add_abrt_handler(abrt_handler, NULL);
/* shm */
tmpshm = mktempshm(TMPSHMSIZE, &fd);
if (!tmpshm) {
- return 0;
+ goto out;
}
tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
g_assert(tmpshmem != MAP_FAILED);
qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
if (g_test_slow()) {
qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
- qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
- qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
+ if (strcmp(arch, "ppc64") != 0) {
+ qtest_add_func("/ivshmem/server", test_ivshmem_server);
+ }
}
+out:
ret = g_test_run();
-
cleanup();
-
return ret;
}
projects / qemu.git / blobdiff