# SPDX-License-Identifier: GPL-2.0-or-later # # LoongArch instruction decode definitions. # # Copyright (c) 2021 Loongson Technology Corporation Limited # # # Fields # %sa2p1 15:2 !function=plus_1 # # Argument sets # &r_i rd imm &rrr rd rj rk &rr_i rd rj imm &rrr_sa rd rj rk sa # # Formats # @rrr .... ........ ..... rk:5 rj:5 rd:5 &rrr @r_i20 .... ... imm:s20 rd:5 &r_i @rr_i12 .... ...... imm:s12 rj:5 rd:5 &rr_i @rr_ui12 .... ...... imm:12 rj:5 rd:5 &rr_i @rr_i16 .... .. imm:s16 rj:5 rd:5 &rr_i @rrr_sa2p1 .... ........ ... .. rk:5 rj:5 rd:5 &rrr_sa sa=%sa2p1 # # Fixed point arithmetic operation instruction # add_w 0000 00000001 00000 ..... ..... ..... @rrr add_d 0000 00000001 00001 ..... ..... ..... @rrr sub_w 0000 00000001 00010 ..... ..... ..... @rrr sub_d 0000 00000001 00011 ..... ..... ..... @rrr slt 0000 00000001 00100 ..... ..... ..... @rrr sltu 0000 00000001 00101 ..... ..... ..... @rrr slti 0000 001000 ............ ..... ..... @rr_i12 sltui 0000 001001 ............ ..... ..... @rr_i12 nor 0000 00000001 01000 ..... ..... ..... @rrr and 0000 00000001 01001 ..... ..... ..... @rrr or 0000 00000001 01010 ..... ..... ..... @rrr xor 0000 00000001 01011 ..... ..... ..... @rrr orn 0000 00000001 01100 ..... ..... ..... @rrr andn 0000 00000001 01101 ..... ..... ..... @rrr mul_w 0000 00000001 11000 ..... ..... ..... @rrr mulh_w 0000 00000001 11001 ..... ..... ..... @rrr mulh_wu 0000 00000001 11010 ..... ..... ..... @rrr mul_d 0000 00000001 11011 ..... ..... ..... @rrr mulh_d 0000 00000001 11100 ..... ..... ..... @rrr mulh_du 0000 00000001 11101 ..... ..... ..... @rrr mulw_d_w 0000 00000001 11110 ..... ..... ..... @rrr mulw_d_wu 0000 00000001 11111 ..... ..... ..... @rrr div_w 0000 00000010 00000 ..... ..... ..... @rrr mod_w 0000 00000010 00001 ..... ..... ..... @rrr div_wu 0000 00000010 00010 ..... ..... ..... @rrr mod_wu 0000 00000010 00011 ..... ..... ..... @rrr div_d 0000 00000010 00100 ..... ..... ..... @rrr mod_d 0000 00000010 00101 ..... ..... ..... @rrr div_du 0000 00000010 00110 ..... ..... ..... @rrr mod_du 0000 00000010 00111 ..... ..... ..... @rrr alsl_w 0000 00000000 010 .. ..... ..... ..... @rrr_sa2p1 alsl_wu 0000 00000000 011 .. ..... ..... ..... @rrr_sa2p1 alsl_d 0000 00000010 110 .. ..... ..... ..... @rrr_sa2p1 lu12i_w 0001 010 .................... ..... @r_i20 lu32i_d 0001 011 .................... ..... @r_i20 lu52i_d 0000 001100 ............ ..... ..... @rr_i12 pcaddi 0001 100 .................... ..... @r_i20 pcalau12i 0001 101 .................... ..... @r_i20 pcaddu12i 0001 110 .................... ..... @r_i20 pcaddu18i 0001 111 .................... ..... @r_i20 addi_w 0000 001010 ............ ..... ..... @rr_i12 addi_d 0000 001011 ............ ..... ..... @rr_i12 addu16i_d 0001 00 ................ ..... ..... @rr_i16 andi 0000 001101 ............ ..... ..... @rr_ui12 ori 0000 001110 ............ ..... ..... @rr_ui12 xori 0000 001111 ............ ..... ..... @rr_ui12