5 * KVM x86 specific structures and definitions
9 #include <linux/types.h>
10 #include <linux/ioctl.h>
12 #define KVM_PIO_PAGE_OFFSET 1
13 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
34 /* Select x86 specific features in <linux/kvm.h> */
35 #define __KVM_HAVE_PIT
36 #define __KVM_HAVE_IOAPIC
37 #define __KVM_HAVE_IRQ_LINE
38 #define __KVM_HAVE_MSI
39 #define __KVM_HAVE_USER_NMI
40 #define __KVM_HAVE_GUEST_DEBUG
41 #define __KVM_HAVE_MSIX
42 #define __KVM_HAVE_MCE
43 #define __KVM_HAVE_PIT_STATE2
44 #define __KVM_HAVE_XEN_HVM
45 #define __KVM_HAVE_VCPU_EVENTS
46 #define __KVM_HAVE_DEBUGREGS
47 #define __KVM_HAVE_XSAVE
48 #define __KVM_HAVE_XCRS
49 #define __KVM_HAVE_READONLY_MEM
51 /* Architectural interrupt line count. */
52 #define KVM_NR_INTERRUPTS 256
54 struct kvm_memory_alias {
55 __u32 slot; /* this has a different namespace than memory slots */
57 __u64 guest_phys_addr;
59 __u64 target_phys_addr;
62 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
63 struct kvm_pic_state {
64 __u8 last_irr; /* edge detection */
65 __u8 irr; /* interrupt request register */
66 __u8 imr; /* interrupt mask register */
67 __u8 isr; /* interrupt service register */
68 __u8 priority_add; /* highest irq priority */
75 __u8 rotate_on_auto_eoi;
76 __u8 special_fully_nested_mode;
77 __u8 init4; /* true if 4 byte init */
78 __u8 elcr; /* PIIX edge/trigger selection */
82 #define KVM_IOAPIC_NUM_PINS 24
83 struct kvm_ioapic_state {
95 __u8 delivery_status:1;
104 } redirtbl[KVM_IOAPIC_NUM_PINS];
107 #define KVM_IRQCHIP_PIC_MASTER 0
108 #define KVM_IRQCHIP_PIC_SLAVE 1
109 #define KVM_IRQCHIP_IOAPIC 2
110 #define KVM_NR_IRQCHIPS 3
112 #define KVM_RUN_X86_SMM (1 << 0)
114 /* for KVM_GET_REGS and KVM_SET_REGS */
116 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
117 __u64 rax, rbx, rcx, rdx;
118 __u64 rsi, rdi, rsp, rbp;
119 __u64 r8, r9, r10, r11;
120 __u64 r12, r13, r14, r15;
124 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
125 #define KVM_APIC_REG_SIZE 0x400
126 struct kvm_lapic_state {
127 char regs[KVM_APIC_REG_SIZE];
135 __u8 present, dpl, db, s, l, g, avl;
147 /* for KVM_GET_SREGS and KVM_SET_SREGS */
149 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
150 struct kvm_segment cs, ds, es, fs, gs, ss;
151 struct kvm_segment tr, ldt;
152 struct kvm_dtable gdt, idt;
153 __u64 cr0, cr2, cr3, cr4, cr8;
156 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
159 /* for KVM_GET_FPU and KVM_SET_FPU */
164 __u8 ftwx; /* in fxsave format */
174 struct kvm_msr_entry {
180 /* for KVM_GET_MSRS and KVM_SET_MSRS */
182 __u32 nmsrs; /* number of msrs in entries */
185 struct kvm_msr_entry entries[0];
188 /* for KVM_GET_MSR_INDEX_LIST */
189 struct kvm_msr_list {
190 __u32 nmsrs; /* number of msrs in entries */
195 struct kvm_cpuid_entry {
204 /* for KVM_SET_CPUID */
208 struct kvm_cpuid_entry entries[0];
211 struct kvm_cpuid_entry2 {
222 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
223 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
224 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
226 /* for KVM_SET_CPUID2 */
230 struct kvm_cpuid_entry2 entries[0];
233 /* for KVM_GET_PIT and KVM_SET_PIT */
234 struct kvm_pit_channel_state {
235 __u32 count; /* can be 65536 */
247 __s64 count_load_time;
250 struct kvm_debug_exit_arch {
258 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
259 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
260 #define KVM_GUESTDBG_INJECT_DB 0x00040000
261 #define KVM_GUESTDBG_INJECT_BP 0x00080000
263 /* for KVM_SET_GUEST_DEBUG */
264 struct kvm_guest_debug_arch {
268 struct kvm_pit_state {
269 struct kvm_pit_channel_state channels[3];
272 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
274 struct kvm_pit_state2 {
275 struct kvm_pit_channel_state channels[3];
280 struct kvm_reinject_control {
285 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
286 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
287 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
288 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
289 #define KVM_VCPUEVENT_VALID_SMM 0x00000008
291 /* Interrupt shadow states */
292 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
293 #define KVM_X86_SHADOW_INT_STI 0x02
295 /* for KVM_GET/SET_VCPU_EVENTS */
296 struct kvm_vcpu_events {
327 /* for KVM_GET/SET_DEBUGREGS */
328 struct kvm_debugregs {
336 /* for KVM_CAP_XSAVE */
341 #define KVM_MAX_XCRS 16
352 struct kvm_xcr xcrs[KVM_MAX_XCRS];
356 /* definition of registers in kvm_run */
357 struct kvm_sync_regs {
360 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
361 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
363 #endif /* _ASM_X86_KVM_H */