target/lm32/cpu.c

   1 /*
   2  * QEMU LatticeMico32 CPU
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "cpu.h"
  24 #include "qemu-common.h"
  25 #include "exec/exec-all.h"
  26
  27
  28 static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
  29 {
  30     LM32CPU *cpu = LM32_CPU(cs);
  31
  32     cpu->env.pc = value;
  33 }
  34
  35 static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
  36 {
  37     ObjectClass *oc = data;
  38     CPUListState *s = user_data;
  39     const char *typename = object_class_get_name(oc);
  40     char *name;
  41
  42     name = g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_SUFFIX));
  43     (*s->cpu_fprintf)(s->file, "  %s\n", name);
  44     g_free(name);
  45 }
  46
  47
  48 void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  49 {
  50     CPUListState s = {
  51         .file = f,
  52         .cpu_fprintf = cpu_fprintf,
  53     };
  54     GSList *list;
  55
  56     list = object_class_get_list_sorted(TYPE_LM32_CPU, false);
  57     (*cpu_fprintf)(f, "Available CPUs:\n");
  58     g_slist_foreach(list, lm32_cpu_list_entry, &s);
  59     g_slist_free(list);
  60 }
  61
  62 static void lm32_cpu_init_cfg_reg(LM32CPU *cpu)
  63 {
  64     CPULM32State *env = &cpu->env;
  65     uint32_t cfg = 0;
  66
  67     if (cpu->features & LM32_FEATURE_MULTIPLY) {
  68         cfg |= CFG_M;
  69     }
  70
  71     if (cpu->features & LM32_FEATURE_DIVIDE) {
  72         cfg |= CFG_D;
  73     }
  74
  75     if (cpu->features & LM32_FEATURE_SHIFT) {
  76         cfg |= CFG_S;
  77     }
  78
  79     if (cpu->features & LM32_FEATURE_SIGN_EXTEND) {
  80         cfg |= CFG_X;
  81     }
  82
  83     if (cpu->features & LM32_FEATURE_I_CACHE) {
  84         cfg |= CFG_IC;
  85     }
  86
  87     if (cpu->features & LM32_FEATURE_D_CACHE) {
  88         cfg |= CFG_DC;
  89     }
  90
  91     if (cpu->features & LM32_FEATURE_CYCLE_COUNT) {
  92         cfg |= CFG_CC;
  93     }
  94
  95     cfg |= (cpu->num_interrupts << CFG_INT_SHIFT);
  96     cfg |= (cpu->num_breakpoints << CFG_BP_SHIFT);
  97     cfg |= (cpu->num_watchpoints << CFG_WP_SHIFT);
  98     cfg |= (cpu->revision << CFG_REV_SHIFT);
  99
 100     env->cfg = cfg;
 101 }
 102
 103 static bool lm32_cpu_has_work(CPUState *cs)
 104 {
 105     return cs->interrupt_request & CPU_INTERRUPT_HARD;
 106 }
 107
 108 /* CPUClass::reset() */
 109 static void lm32_cpu_reset(CPUState *s)
 110 {
 111     LM32CPU *cpu = LM32_CPU(s);
 112     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
 113     CPULM32State *env = &cpu->env;
 114
 115     lcc->parent_reset(s);
 116
 117     /* reset cpu state */
 118     memset(env, 0, offsetof(CPULM32State, end_reset_fields));
 119
 120     lm32_cpu_init_cfg_reg(cpu);
 121 }
 122
 123 static void lm32_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
 124 {
 125     info->mach = bfd_mach_lm32;
 126     info->print_insn = print_insn_lm32;
 127 }
 128
 129 static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
 130 {
 131     CPUState *cs = CPU(dev);
 132     LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
 133     Error *local_err = NULL;
 134
 135     cpu_exec_realizefn(cs, &local_err);
 136     if (local_err != NULL) {
 137         error_propagate(errp, local_err);
 138         return;
 139     }
 140
 141     cpu_reset(cs);
 142
 143     qemu_init_vcpu(cs);
 144
 145     lcc->parent_realize(dev, errp);
 146 }
 147
 148 static void lm32_cpu_initfn(Object *obj)
 149 {
 150     CPUState *cs = CPU(obj);
 151     LM32CPU *cpu = LM32_CPU(obj);
 152     CPULM32State *env = &cpu->env;
 153
 154     cs->env_ptr = env;
 155
 156     env->flags = 0;
 157 }
 158
 159 static void lm32_basic_cpu_initfn(Object *obj)
 160 {
 161     LM32CPU *cpu = LM32_CPU(obj);
 162
 163     cpu->revision = 3;
 164     cpu->num_interrupts = 32;
 165     cpu->num_breakpoints = 4;
 166     cpu->num_watchpoints = 4;
 167     cpu->features = LM32_FEATURE_SHIFT
 168                   | LM32_FEATURE_SIGN_EXTEND
 169                   | LM32_FEATURE_CYCLE_COUNT;
 170 }
 171
 172 static void lm32_standard_cpu_initfn(Object *obj)
 173 {
 174     LM32CPU *cpu = LM32_CPU(obj);
 175
 176     cpu->revision = 3;
 177     cpu->num_interrupts = 32;
 178     cpu->num_breakpoints = 4;
 179     cpu->num_watchpoints = 4;
 180     cpu->features = LM32_FEATURE_MULTIPLY
 181                   | LM32_FEATURE_DIVIDE
 182                   | LM32_FEATURE_SHIFT
 183                   | LM32_FEATURE_SIGN_EXTEND
 184                   | LM32_FEATURE_I_CACHE
 185                   | LM32_FEATURE_CYCLE_COUNT;
 186 }
 187
 188 static void lm32_full_cpu_initfn(Object *obj)
 189 {
 190     LM32CPU *cpu = LM32_CPU(obj);
 191
 192     cpu->revision = 3;
 193     cpu->num_interrupts = 32;
 194     cpu->num_breakpoints = 4;
 195     cpu->num_watchpoints = 4;
 196     cpu->features = LM32_FEATURE_MULTIPLY
 197                   | LM32_FEATURE_DIVIDE
 198                   | LM32_FEATURE_SHIFT
 199                   | LM32_FEATURE_SIGN_EXTEND
 200                   | LM32_FEATURE_I_CACHE
 201                   | LM32_FEATURE_D_CACHE
 202                   | LM32_FEATURE_CYCLE_COUNT;
 203 }
 204
 205 static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
 206 {
 207     ObjectClass *oc;
 208     char *typename;
 209
 210     typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
 211     oc = object_class_by_name(typename);
 212     g_free(typename);
 213     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
 214                        object_class_is_abstract(oc))) {
 215         oc = NULL;
 216     }
 217     return oc;
 218 }
 219
 220 static void lm32_cpu_class_init(ObjectClass *oc, void *data)
 221 {
 222     LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
 223     CPUClass *cc = CPU_CLASS(oc);
 224     DeviceClass *dc = DEVICE_CLASS(oc);
 225
 226     device_class_set_parent_realize(dc, lm32_cpu_realizefn,
 227                                     &lcc->parent_realize);
 228     lcc->parent_reset = cc->reset;
 229     cc->reset = lm32_cpu_reset;
 230
 231     cc->class_by_name = lm32_cpu_class_by_name;
 232     cc->has_work = lm32_cpu_has_work;
 233     cc->do_interrupt = lm32_cpu_do_interrupt;
 234     cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
 235     cc->dump_state = lm32_cpu_dump_state;
 236     cc->set_pc = lm32_cpu_set_pc;
 237     cc->gdb_read_register = lm32_cpu_gdb_read_register;
 238     cc->gdb_write_register = lm32_cpu_gdb_write_register;
 239 #ifdef CONFIG_USER_ONLY
 240     cc->handle_mmu_fault = lm32_cpu_handle_mmu_fault;
 241 #else
 242     cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
 243     cc->vmsd = &vmstate_lm32_cpu;
 244 #endif
 245     cc->gdb_num_core_regs = 32 + 7;
 246     cc->gdb_stop_before_watchpoint = true;
 247     cc->debug_excp_handler = lm32_debug_excp_handler;
 248     cc->disas_set_info = lm32_cpu_disas_set_info;
 249     cc->tcg_initialize = lm32_translate_init;
 250 }
 251
 252 #define DEFINE_LM32_CPU_TYPE(cpu_model, initfn) \
 253     { \
 254         .parent = TYPE_LM32_CPU, \
 255         .name = LM32_CPU_TYPE_NAME(cpu_model), \
 256         .instance_init = initfn, \
 257     }
 258
 259 static const TypeInfo lm32_cpus_type_infos[] = {
 260     { /* base class should be registered first */
 261          .name = TYPE_LM32_CPU,
 262          .parent = TYPE_CPU,
 263          .instance_size = sizeof(LM32CPU),
 264          .instance_init = lm32_cpu_initfn,
 265          .abstract = true,
 266          .class_size = sizeof(LM32CPUClass),
 267          .class_init = lm32_cpu_class_init,
 268     },
 269     DEFINE_LM32_CPU_TYPE("lm32-basic", lm32_basic_cpu_initfn),
 270     DEFINE_LM32_CPU_TYPE("lm32-standard", lm32_standard_cpu_initfn),
 271     DEFINE_LM32_CPU_TYPE("lm32-full", lm32_full_cpu_initfn),
 272 };
 273
 274 DEFINE_TYPES(lm32_cpus_type_infos)