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1 | /* | |
2 | * PA-RISC emulation cpu definitions for qemu. | |
3 | * | |
4 | * Copyright (c) 2016 Richard Henderson <[email protected]> | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef HPPA_CPU_H | |
21 | #define HPPA_CPU_H | |
22 | ||
23 | #include "qemu-common.h" | |
24 | #include "cpu-qom.h" | |
25 | ||
26 | /* We only support hppa-linux-user at present, so 32-bit only. */ | |
27 | #define TARGET_LONG_BITS 32 | |
28 | #define TARGET_PHYS_ADDR_SPACE_BITS 32 | |
29 | #define TARGET_VIRT_ADDR_SPACE_BITS 32 | |
30 | ||
31 | #define CPUArchState struct CPUHPPAState | |
32 | ||
33 | #include "exec/cpu-defs.h" | |
34 | #include "fpu/softfloat.h" | |
35 | ||
36 | #define TARGET_PAGE_BITS 12 | |
37 | ||
38 | #define ALIGNED_ONLY | |
39 | #define NB_MMU_MODES 1 | |
40 | #define MMU_USER_IDX 0 | |
41 | #define TARGET_INSN_START_EXTRA_WORDS 1 | |
42 | ||
43 | #define EXCP_SYSCALL 1 | |
44 | #define EXCP_SYSCALL_LWS 2 | |
45 | #define EXCP_SIGSEGV 3 | |
46 | #define EXCP_SIGILL 4 | |
47 | #define EXCP_SIGFPE 5 | |
48 | ||
49 | typedef struct CPUHPPAState CPUHPPAState; | |
50 | ||
51 | struct CPUHPPAState { | |
52 | target_ulong gr[32]; | |
53 | uint64_t fr[32]; | |
54 | ||
55 | target_ulong sar; | |
56 | target_ulong cr26; | |
57 | target_ulong cr27; | |
58 | ||
59 | target_ulong psw_n; /* boolean */ | |
60 | target_long psw_v; /* in most significant bit */ | |
61 | ||
62 | /* Splitting the carry-borrow field into the MSB and "the rest", allows | |
63 | * for "the rest" to be deleted when it is unused, but the MSB is in use. | |
64 | * In addition, it's easier to compute carry-in for bit B+1 than it is to | |
65 | * compute carry-out for bit B (3 vs 4 insns for addition, assuming the | |
66 | * host has the appropriate add-with-carry insn to compute the msb). | |
67 | * Therefore the carry bits are stored as: cb_msb : cb & 0x11111110. | |
68 | */ | |
69 | target_ulong psw_cb; /* in least significant bit of next nibble */ | |
70 | target_ulong psw_cb_msb; /* boolean */ | |
71 | ||
72 | target_ulong iaoq_f; /* front */ | |
73 | target_ulong iaoq_b; /* back, aka next instruction */ | |
74 | ||
75 | target_ulong ior; /* interrupt offset register */ | |
76 | ||
77 | uint32_t fr0_shadow; /* flags, c, ca/cq, rm, d, enables */ | |
78 | float_status fp_status; | |
79 | ||
80 | /* Those resources are used only in QEMU core */ | |
81 | CPU_COMMON | |
82 | }; | |
83 | ||
84 | /** | |
85 | * HPPACPU: | |
86 | * @env: #CPUHPPAState | |
87 | * | |
88 | * An HPPA CPU. | |
89 | */ | |
90 | struct HPPACPU { | |
91 | /*< private >*/ | |
92 | CPUState parent_obj; | |
93 | /*< public >*/ | |
94 | ||
95 | CPUHPPAState env; | |
96 | }; | |
97 | ||
98 | static inline HPPACPU *hppa_env_get_cpu(CPUHPPAState *env) | |
99 | { | |
100 | return container_of(env, HPPACPU, env); | |
101 | } | |
102 | ||
103 | #define ENV_GET_CPU(e) CPU(hppa_env_get_cpu(e)) | |
104 | #define ENV_OFFSET offsetof(HPPACPU, env) | |
105 | ||
106 | #include "exec/cpu-all.h" | |
107 | ||
108 | static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch) | |
109 | { | |
110 | return 0; | |
111 | } | |
112 | ||
113 | void hppa_translate_init(void); | |
114 | ||
115 | #define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) | |
116 | ||
117 | void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); | |
118 | ||
119 | static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc, | |
120 | target_ulong *cs_base, | |
121 | uint32_t *pflags) | |
122 | { | |
123 | *pc = env->iaoq_f; | |
124 | *cs_base = env->iaoq_b; | |
125 | *pflags = env->psw_n; | |
126 | } | |
127 | ||
128 | target_ulong cpu_hppa_get_psw(CPUHPPAState *env); | |
129 | void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong); | |
130 | void cpu_hppa_loaded_fr0(CPUHPPAState *env); | |
131 | ||
132 | #define cpu_signal_handler cpu_hppa_signal_handler | |
133 | ||
134 | int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); | |
135 | int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, | |
136 | int rw, int midx); | |
137 | int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); | |
138 | int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); | |
139 | void hppa_cpu_do_interrupt(CPUState *cpu); | |
140 | bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); | |
141 | void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int); | |
142 | ||
143 | #endif /* HPPA_CPU_H */ |