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1 | /* | |
2 | * Device Tree Source for AMCC Bamboo | |
3 | * | |
4 | * Copyright (c) 2006, 2007 IBM Corp. | |
5 | * Josh Boyer <[email protected]> | |
6 | * | |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without | |
9 | * any warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | ||
14 | / { | |
15 | #address-cells = <2>; | |
16 | #size-cells = <1>; | |
17 | model = "amcc,bamboo"; | |
18 | compatible = "amcc,bamboo"; | |
19 | dcr-parent = <&{/cpus/cpu@0}>; | |
20 | ||
21 | aliases { | |
22 | serial0 = &UART0; | |
23 | serial1 = &UART1; | |
24 | }; | |
25 | ||
26 | cpus { | |
27 | #address-cells = <1>; | |
28 | #size-cells = <0>; | |
29 | ||
30 | cpu@0 { | |
31 | device_type = "cpu"; | |
32 | model = "PowerPC,440EP"; | |
33 | reg = <0>; | |
34 | clock-frequency = <0x1fca0550>; | |
35 | timebase-frequency = <0x017d7840>; | |
36 | i-cache-line-size = <0x20>; | |
37 | d-cache-line-size = <0x20>; | |
38 | i-cache-size = <0x8000>; | |
39 | d-cache-size = <0x8000>; | |
40 | dcr-controller; | |
41 | dcr-access-method = "native"; | |
42 | }; | |
43 | }; | |
44 | ||
45 | memory { | |
46 | device_type = "memory"; | |
47 | reg = <0x0 0x0 0x9000000>; | |
48 | }; | |
49 | ||
50 | UIC0: interrupt-controller0 { | |
51 | compatible = "ibm,uic-440ep","ibm,uic"; | |
52 | interrupt-controller; | |
53 | cell-index = <0x0>; | |
54 | dcr-reg = <0x0c0 0x009>; | |
55 | #address-cells = <0x0>; | |
56 | #size-cells = <0x0>; | |
57 | #interrupt-cells = <0x2>; | |
58 | }; | |
59 | ||
60 | SDR0: sdr { | |
61 | compatible = "ibm,sdr-440ep"; | |
62 | dcr-reg = <0x00e 0x002>; | |
63 | }; | |
64 | ||
65 | CPR0: cpr { | |
66 | compatible = "ibm,cpr-440ep"; | |
67 | dcr-reg = <0x00c 0x002>; | |
68 | }; | |
69 | ||
70 | plb { | |
71 | compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; | |
72 | #address-cells = <2>; | |
73 | #size-cells = <1>; | |
74 | ranges; | |
75 | clock-frequency = <0x07f28154>; | |
76 | ||
77 | SDRAM0: sdram { | |
78 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | |
79 | dcr-reg = <0x010 0x2>; | |
80 | }; | |
81 | ||
82 | DMA0: dma { | |
83 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | |
84 | dcr-reg = <0x100 0x027>; | |
85 | }; | |
86 | ||
87 | POB0: opb { | |
88 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | |
89 | #address-cells = <1>; | |
90 | #size-cells = <1>; | |
91 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | |
92 | * bits. | |
93 | */ | |
94 | ranges = <0x00000000 0x0 0x00000000 0x80000000 | |
95 | 0x80000000 0x0 0x80000000 0x80000000>; | |
96 | /* interrupt-parent = <&UIC1>; */ | |
97 | interrupts = <7 4>; | |
98 | clock-frequency = <0x03f940aa>; | |
99 | ||
100 | EBC0: ebc { | |
101 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | |
102 | dcr-reg = <0x012 2>; | |
103 | #address-cells = <2>; | |
104 | #size-cells = <1>; | |
105 | clock-frequency = <0x03f940aa>; | |
106 | interrupts = <5 1>; | |
107 | /* interrupt-parent = <&UIC1>; */ | |
108 | }; | |
109 | ||
110 | UART0: serial@ef600300 { | |
111 | device_type = "serial"; | |
112 | compatible = "ns16550"; | |
113 | reg = <0xef600300 8>; | |
114 | virtual-reg = <0xef600300>; | |
115 | clock-frequency = <0x00a8c000>; | |
116 | current-speed = <0x1c200>; | |
117 | interrupt-parent = <&UIC0>; | |
118 | interrupts = <0 4>; | |
119 | }; | |
120 | ||
121 | UART1: serial@ef600400 { | |
122 | device_type = "serial"; | |
123 | compatible = "ns16550"; | |
124 | reg = <0xef600400 8>; | |
125 | virtual-reg = <0xef600400>; | |
126 | clock-frequency = <0x00a8c000>; | |
127 | current-speed = <0>; | |
128 | interrupt-parent = <&UIC0>; | |
129 | interrupts = <1 4>; | |
130 | }; | |
131 | ||
132 | IIC0: i2c@ef600700 { | |
133 | device_type = "i2c"; | |
134 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | |
135 | reg = <0xef600700 0x14>; | |
136 | interrupt-parent = <&UIC0>; | |
137 | interrupts = <2 4>; | |
138 | }; | |
139 | ||
140 | IIC1: i2c@ef600800 { | |
141 | device_type = "i2c"; | |
142 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | |
143 | reg = <0xef600800 14>; | |
144 | interrupt-parent = <&UIC0>; | |
145 | interrupts = <7 4>; | |
146 | }; | |
147 | ||
148 | ZMII0: emac-zmii@ef600d00 { | |
149 | device_type = "zmii-interface"; | |
150 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | |
151 | reg = <0xef600d00 0xc>; | |
152 | }; | |
153 | ||
154 | }; | |
155 | ||
156 | PCI0: pci@ec000000 { | |
157 | device_type = "pci"; | |
158 | #interrupt-cells = <1>; | |
159 | #size-cells = <2>; | |
160 | #address-cells = <3>; | |
161 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | |
162 | primary; | |
163 | reg = <0 0xeec00000 8 /* Config space access */ | |
164 | 0 0xeed00000 4 /* IACK */ | |
165 | 0 0xeed00000 4 /* Special cycle */ | |
166 | 0 0xef400000 0x40>; /* Internal registers */ | |
167 | ||
168 | /* Outbound ranges, one memory and one IO, | |
169 | * later cannot be changed. Chip supports a second | |
170 | * IO range but we don't use it for now | |
171 | */ | |
172 | ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 | |
173 | 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; | |
174 | ||
175 | /* Inbound 2GB range starting at 0 */ | |
176 | dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; | |
177 | ||
178 | /* Bamboo has all 4 IRQ pins tied together per slot */ | |
179 | interrupt-map-mask = <0xf800 0 0 0>; | |
180 | interrupt-map = < | |
181 | /* IDSEL 1 */ | |
182 | 0x0800 0 0 0 &UIC0 0x1c 8 | |
183 | ||
184 | /* IDSEL 2 */ | |
185 | 0x1000 0 0 0 &UIC0 0x1b 8 | |
186 | ||
187 | /* IDSEL 3 */ | |
188 | 0x1800 0 0 0 &UIC0 0x1a 8 | |
189 | ||
190 | /* IDSEL 4 */ | |
191 | 0x2000 0 0 0 &UIC0 0x19 8 | |
192 | >; | |
193 | }; | |
194 | ||
195 | }; | |
196 | ||
197 | chosen { | |
198 | linux,stdout-path = "/plb/opb/serial@ef600300"; | |
199 | }; | |
200 | }; |