| | 1 | /* |
| | 2 | * QEMU PowerPC 405 shared definitions |
| | 3 | * |
| | 4 | * Copyright (c) 2007 Jocelyn Mayer |
| | 5 | * |
| | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| | 7 | * of this software and associated documentation files (the "Software"), to deal |
| | 8 | * in the Software without restriction, including without limitation the rights |
| | 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| | 10 | * copies of the Software, and to permit persons to whom the Software is |
| | 11 | * furnished to do so, subject to the following conditions: |
| | 12 | * |
| | 13 | * The above copyright notice and this permission notice shall be included in |
| | 14 | * all copies or substantial portions of the Software. |
| | 15 | * |
| | 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| | 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| | 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| | 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| | 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| | 22 | * THE SOFTWARE. |
| | 23 | */ |
| | 24 | |
| | 25 | #ifndef PPC405_H |
| | 26 | #define PPC405_H |
| | 27 | |
| | 28 | #include "hw/ppc/ppc4xx.h" |
| | 29 | |
| | 30 | /* Bootinfo as set-up by u-boot */ |
| | 31 | typedef struct ppc4xx_bd_info_t ppc4xx_bd_info_t; |
| | 32 | struct ppc4xx_bd_info_t { |
| | 33 | uint32_t bi_memstart; |
| | 34 | uint32_t bi_memsize; |
| | 35 | uint32_t bi_flashstart; |
| | 36 | uint32_t bi_flashsize; |
| | 37 | uint32_t bi_flashoffset; /* 0x10 */ |
| | 38 | uint32_t bi_sramstart; |
| | 39 | uint32_t bi_sramsize; |
| | 40 | uint32_t bi_bootflags; |
| | 41 | uint32_t bi_ipaddr; /* 0x20 */ |
| | 42 | uint8_t bi_enetaddr[6]; |
| | 43 | uint16_t bi_ethspeed; |
| | 44 | uint32_t bi_intfreq; |
| | 45 | uint32_t bi_busfreq; /* 0x30 */ |
| | 46 | uint32_t bi_baudrate; |
| | 47 | uint8_t bi_s_version[4]; |
| | 48 | uint8_t bi_r_version[32]; |
| | 49 | uint32_t bi_procfreq; |
| | 50 | uint32_t bi_plb_busfreq; |
| | 51 | uint32_t bi_pci_busfreq; |
| | 52 | uint8_t bi_pci_enetaddr[6]; |
| | 53 | uint32_t bi_pci_enetaddr2[6]; |
| | 54 | uint32_t bi_opbfreq; |
| | 55 | uint32_t bi_iic_fast[2]; |
| | 56 | }; |
| | 57 | |
| | 58 | /* PowerPC 405 core */ |
| | 59 | ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd, |
| | 60 | uint32_t flags); |
| | 61 | |
| | 62 | CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem, |
| | 63 | MemoryRegion ram_memories[4], |
| | 64 | hwaddr ram_bases[4], |
| | 65 | hwaddr ram_sizes[4], |
| | 66 | uint32_t sysclk, qemu_irq **picp, |
| | 67 | int do_init); |
| | 68 | CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, |
| | 69 | MemoryRegion ram_memories[2], |
| | 70 | hwaddr ram_bases[2], |
| | 71 | hwaddr ram_sizes[2], |
| | 72 | uint32_t sysclk, qemu_irq **picp, |
| | 73 | int do_init); |
| | 74 | |
| | 75 | #endif /* PPC405_H */ |
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