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1 | /* | |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
12 | * Contributions after 2012-01-13 are licensed under the terms of the | |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
14 | */ | |
15 | ||
16 | #include "qemu/osdep.h" | |
17 | #include "qapi/error.h" | |
18 | #include "qemu-common.h" | |
19 | #include "cpu.h" | |
20 | #include "exec/memory.h" | |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
23 | #include "qapi/visitor.h" | |
24 | #include "qemu/bitops.h" | |
25 | #include "qemu/error-report.h" | |
26 | #include "qom/object.h" | |
27 | #include "trace-root.h" | |
28 | ||
29 | #include "exec/memory-internal.h" | |
30 | #include "exec/ram_addr.h" | |
31 | #include "sysemu/kvm.h" | |
32 | #include "sysemu/sysemu.h" | |
33 | #include "hw/misc/mmio_interface.h" | |
34 | #include "hw/qdev-properties.h" | |
35 | ||
36 | //#define DEBUG_UNASSIGNED | |
37 | ||
38 | static unsigned memory_region_transaction_depth; | |
39 | static bool memory_region_update_pending; | |
40 | static bool ioeventfd_update_pending; | |
41 | static bool global_dirty_log = false; | |
42 | ||
43 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners | |
44 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
45 | ||
46 | static QTAILQ_HEAD(, AddressSpace) address_spaces | |
47 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
48 | ||
49 | typedef struct AddrRange AddrRange; | |
50 | ||
51 | /* | |
52 | * Note that signed integers are needed for negative offsetting in aliases | |
53 | * (large MemoryRegion::alias_offset). | |
54 | */ | |
55 | struct AddrRange { | |
56 | Int128 start; | |
57 | Int128 size; | |
58 | }; | |
59 | ||
60 | static AddrRange addrrange_make(Int128 start, Int128 size) | |
61 | { | |
62 | return (AddrRange) { start, size }; | |
63 | } | |
64 | ||
65 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
66 | { | |
67 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); | |
68 | } | |
69 | ||
70 | static Int128 addrrange_end(AddrRange r) | |
71 | { | |
72 | return int128_add(r.start, r.size); | |
73 | } | |
74 | ||
75 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) | |
76 | { | |
77 | int128_addto(&range.start, delta); | |
78 | return range; | |
79 | } | |
80 | ||
81 | static bool addrrange_contains(AddrRange range, Int128 addr) | |
82 | { | |
83 | return int128_ge(addr, range.start) | |
84 | && int128_lt(addr, addrrange_end(range)); | |
85 | } | |
86 | ||
87 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) | |
88 | { | |
89 | return addrrange_contains(r1, r2.start) | |
90 | || addrrange_contains(r2, r1.start); | |
91 | } | |
92 | ||
93 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
94 | { | |
95 | Int128 start = int128_max(r1.start, r2.start); | |
96 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
97 | return addrrange_make(start, int128_sub(end, start)); | |
98 | } | |
99 | ||
100 | enum ListenerDirection { Forward, Reverse }; | |
101 | ||
102 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
103 | do { \ | |
104 | MemoryListener *_listener; \ | |
105 | \ | |
106 | switch (_direction) { \ | |
107 | case Forward: \ | |
108 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
109 | if (_listener->_callback) { \ | |
110 | _listener->_callback(_listener, ##_args); \ | |
111 | } \ | |
112 | } \ | |
113 | break; \ | |
114 | case Reverse: \ | |
115 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
116 | memory_listeners, link) { \ | |
117 | if (_listener->_callback) { \ | |
118 | _listener->_callback(_listener, ##_args); \ | |
119 | } \ | |
120 | } \ | |
121 | break; \ | |
122 | default: \ | |
123 | abort(); \ | |
124 | } \ | |
125 | } while (0) | |
126 | ||
127 | #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ | |
128 | do { \ | |
129 | MemoryListener *_listener; \ | |
130 | struct memory_listeners_as *list = &(_as)->listeners; \ | |
131 | \ | |
132 | switch (_direction) { \ | |
133 | case Forward: \ | |
134 | QTAILQ_FOREACH(_listener, list, link_as) { \ | |
135 | if (_listener->_callback) { \ | |
136 | _listener->_callback(_listener, _section, ##_args); \ | |
137 | } \ | |
138 | } \ | |
139 | break; \ | |
140 | case Reverse: \ | |
141 | QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \ | |
142 | link_as) { \ | |
143 | if (_listener->_callback) { \ | |
144 | _listener->_callback(_listener, _section, ##_args); \ | |
145 | } \ | |
146 | } \ | |
147 | break; \ | |
148 | default: \ | |
149 | abort(); \ | |
150 | } \ | |
151 | } while (0) | |
152 | ||
153 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ | |
154 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ | |
155 | do { \ | |
156 | MemoryRegionSection mrs = section_from_flat_range(fr, as); \ | |
157 | MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ | |
158 | } while(0) | |
159 | ||
160 | struct CoalescedMemoryRange { | |
161 | AddrRange addr; | |
162 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
163 | }; | |
164 | ||
165 | struct MemoryRegionIoeventfd { | |
166 | AddrRange addr; | |
167 | bool match_data; | |
168 | uint64_t data; | |
169 | EventNotifier *e; | |
170 | }; | |
171 | ||
172 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
173 | MemoryRegionIoeventfd b) | |
174 | { | |
175 | if (int128_lt(a.addr.start, b.addr.start)) { | |
176 | return true; | |
177 | } else if (int128_gt(a.addr.start, b.addr.start)) { | |
178 | return false; | |
179 | } else if (int128_lt(a.addr.size, b.addr.size)) { | |
180 | return true; | |
181 | } else if (int128_gt(a.addr.size, b.addr.size)) { | |
182 | return false; | |
183 | } else if (a.match_data < b.match_data) { | |
184 | return true; | |
185 | } else if (a.match_data > b.match_data) { | |
186 | return false; | |
187 | } else if (a.match_data) { | |
188 | if (a.data < b.data) { | |
189 | return true; | |
190 | } else if (a.data > b.data) { | |
191 | return false; | |
192 | } | |
193 | } | |
194 | if (a.e < b.e) { | |
195 | return true; | |
196 | } else if (a.e > b.e) { | |
197 | return false; | |
198 | } | |
199 | return false; | |
200 | } | |
201 | ||
202 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
203 | MemoryRegionIoeventfd b) | |
204 | { | |
205 | return !memory_region_ioeventfd_before(a, b) | |
206 | && !memory_region_ioeventfd_before(b, a); | |
207 | } | |
208 | ||
209 | typedef struct FlatRange FlatRange; | |
210 | typedef struct FlatView FlatView; | |
211 | ||
212 | /* Range of memory in the global map. Addresses are absolute. */ | |
213 | struct FlatRange { | |
214 | MemoryRegion *mr; | |
215 | hwaddr offset_in_region; | |
216 | AddrRange addr; | |
217 | uint8_t dirty_log_mask; | |
218 | bool romd_mode; | |
219 | bool readonly; | |
220 | }; | |
221 | ||
222 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
223 | * order. | |
224 | */ | |
225 | struct FlatView { | |
226 | struct rcu_head rcu; | |
227 | unsigned ref; | |
228 | FlatRange *ranges; | |
229 | unsigned nr; | |
230 | unsigned nr_allocated; | |
231 | }; | |
232 | ||
233 | typedef struct AddressSpaceOps AddressSpaceOps; | |
234 | ||
235 | #define FOR_EACH_FLAT_RANGE(var, view) \ | |
236 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
237 | ||
238 | static inline MemoryRegionSection | |
239 | section_from_flat_range(FlatRange *fr, AddressSpace *as) | |
240 | { | |
241 | return (MemoryRegionSection) { | |
242 | .mr = fr->mr, | |
243 | .address_space = as, | |
244 | .offset_within_region = fr->offset_in_region, | |
245 | .size = fr->addr.size, | |
246 | .offset_within_address_space = int128_get64(fr->addr.start), | |
247 | .readonly = fr->readonly, | |
248 | }; | |
249 | } | |
250 | ||
251 | static bool flatrange_equal(FlatRange *a, FlatRange *b) | |
252 | { | |
253 | return a->mr == b->mr | |
254 | && addrrange_equal(a->addr, b->addr) | |
255 | && a->offset_in_region == b->offset_in_region | |
256 | && a->romd_mode == b->romd_mode | |
257 | && a->readonly == b->readonly; | |
258 | } | |
259 | ||
260 | static void flatview_init(FlatView *view) | |
261 | { | |
262 | view->ref = 1; | |
263 | view->ranges = NULL; | |
264 | view->nr = 0; | |
265 | view->nr_allocated = 0; | |
266 | } | |
267 | ||
268 | /* Insert a range into a given position. Caller is responsible for maintaining | |
269 | * sorting order. | |
270 | */ | |
271 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
272 | { | |
273 | if (view->nr == view->nr_allocated) { | |
274 | view->nr_allocated = MAX(2 * view->nr, 10); | |
275 | view->ranges = g_realloc(view->ranges, | |
276 | view->nr_allocated * sizeof(*view->ranges)); | |
277 | } | |
278 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
279 | (view->nr - pos) * sizeof(FlatRange)); | |
280 | view->ranges[pos] = *range; | |
281 | memory_region_ref(range->mr); | |
282 | ++view->nr; | |
283 | } | |
284 | ||
285 | static void flatview_destroy(FlatView *view) | |
286 | { | |
287 | int i; | |
288 | ||
289 | for (i = 0; i < view->nr; i++) { | |
290 | memory_region_unref(view->ranges[i].mr); | |
291 | } | |
292 | g_free(view->ranges); | |
293 | g_free(view); | |
294 | } | |
295 | ||
296 | static void flatview_ref(FlatView *view) | |
297 | { | |
298 | atomic_inc(&view->ref); | |
299 | } | |
300 | ||
301 | static void flatview_unref(FlatView *view) | |
302 | { | |
303 | if (atomic_fetch_dec(&view->ref) == 1) { | |
304 | flatview_destroy(view); | |
305 | } | |
306 | } | |
307 | ||
308 | static bool can_merge(FlatRange *r1, FlatRange *r2) | |
309 | { | |
310 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) | |
311 | && r1->mr == r2->mr | |
312 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), | |
313 | r1->addr.size), | |
314 | int128_make64(r2->offset_in_region)) | |
315 | && r1->dirty_log_mask == r2->dirty_log_mask | |
316 | && r1->romd_mode == r2->romd_mode | |
317 | && r1->readonly == r2->readonly; | |
318 | } | |
319 | ||
320 | /* Attempt to simplify a view by merging adjacent ranges */ | |
321 | static void flatview_simplify(FlatView *view) | |
322 | { | |
323 | unsigned i, j; | |
324 | ||
325 | i = 0; | |
326 | while (i < view->nr) { | |
327 | j = i + 1; | |
328 | while (j < view->nr | |
329 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
330 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); | |
331 | ++j; | |
332 | } | |
333 | ++i; | |
334 | memmove(&view->ranges[i], &view->ranges[j], | |
335 | (view->nr - j) * sizeof(view->ranges[j])); | |
336 | view->nr -= j - i; | |
337 | } | |
338 | } | |
339 | ||
340 | static bool memory_region_big_endian(MemoryRegion *mr) | |
341 | { | |
342 | #ifdef TARGET_WORDS_BIGENDIAN | |
343 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
344 | #else | |
345 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
346 | #endif | |
347 | } | |
348 | ||
349 | static bool memory_region_wrong_endianness(MemoryRegion *mr) | |
350 | { | |
351 | #ifdef TARGET_WORDS_BIGENDIAN | |
352 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
353 | #else | |
354 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
355 | #endif | |
356 | } | |
357 | ||
358 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
359 | { | |
360 | if (memory_region_wrong_endianness(mr)) { | |
361 | switch (size) { | |
362 | case 1: | |
363 | break; | |
364 | case 2: | |
365 | *data = bswap16(*data); | |
366 | break; | |
367 | case 4: | |
368 | *data = bswap32(*data); | |
369 | break; | |
370 | case 8: | |
371 | *data = bswap64(*data); | |
372 | break; | |
373 | default: | |
374 | abort(); | |
375 | } | |
376 | } | |
377 | } | |
378 | ||
379 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) | |
380 | { | |
381 | MemoryRegion *root; | |
382 | hwaddr abs_addr = offset; | |
383 | ||
384 | abs_addr += mr->addr; | |
385 | for (root = mr; root->container; ) { | |
386 | root = root->container; | |
387 | abs_addr += root->addr; | |
388 | } | |
389 | ||
390 | return abs_addr; | |
391 | } | |
392 | ||
393 | static int get_cpu_index(void) | |
394 | { | |
395 | if (current_cpu) { | |
396 | return current_cpu->cpu_index; | |
397 | } | |
398 | return -1; | |
399 | } | |
400 | ||
401 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, | |
402 | hwaddr addr, | |
403 | uint64_t *value, | |
404 | unsigned size, | |
405 | unsigned shift, | |
406 | uint64_t mask, | |
407 | MemTxAttrs attrs) | |
408 | { | |
409 | uint64_t tmp; | |
410 | ||
411 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
412 | if (mr->subpage) { | |
413 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); | |
414 | } else if (mr == &io_mem_notdirty) { | |
415 | /* Accesses to code which has previously been translated into a TB show | |
416 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
417 | * MemoryRegion. */ | |
418 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
419 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { | |
420 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
421 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); | |
422 | } | |
423 | *value |= (tmp & mask) << shift; | |
424 | return MEMTX_OK; | |
425 | } | |
426 | ||
427 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
428 | hwaddr addr, | |
429 | uint64_t *value, | |
430 | unsigned size, | |
431 | unsigned shift, | |
432 | uint64_t mask, | |
433 | MemTxAttrs attrs) | |
434 | { | |
435 | uint64_t tmp; | |
436 | ||
437 | tmp = mr->ops->read(mr->opaque, addr, size); | |
438 | if (mr->subpage) { | |
439 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); | |
440 | } else if (mr == &io_mem_notdirty) { | |
441 | /* Accesses to code which has previously been translated into a TB show | |
442 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
443 | * MemoryRegion. */ | |
444 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
445 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { | |
446 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
447 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); | |
448 | } | |
449 | *value |= (tmp & mask) << shift; | |
450 | return MEMTX_OK; | |
451 | } | |
452 | ||
453 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, | |
454 | hwaddr addr, | |
455 | uint64_t *value, | |
456 | unsigned size, | |
457 | unsigned shift, | |
458 | uint64_t mask, | |
459 | MemTxAttrs attrs) | |
460 | { | |
461 | uint64_t tmp = 0; | |
462 | MemTxResult r; | |
463 | ||
464 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); | |
465 | if (mr->subpage) { | |
466 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); | |
467 | } else if (mr == &io_mem_notdirty) { | |
468 | /* Accesses to code which has previously been translated into a TB show | |
469 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
470 | * MemoryRegion. */ | |
471 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
472 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { | |
473 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
474 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); | |
475 | } | |
476 | *value |= (tmp & mask) << shift; | |
477 | return r; | |
478 | } | |
479 | ||
480 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, | |
481 | hwaddr addr, | |
482 | uint64_t *value, | |
483 | unsigned size, | |
484 | unsigned shift, | |
485 | uint64_t mask, | |
486 | MemTxAttrs attrs) | |
487 | { | |
488 | uint64_t tmp; | |
489 | ||
490 | tmp = (*value >> shift) & mask; | |
491 | if (mr->subpage) { | |
492 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); | |
493 | } else if (mr == &io_mem_notdirty) { | |
494 | /* Accesses to code which has previously been translated into a TB show | |
495 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
496 | * MemoryRegion. */ | |
497 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
498 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { | |
499 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
500 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); | |
501 | } | |
502 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); | |
503 | return MEMTX_OK; | |
504 | } | |
505 | ||
506 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, | |
507 | hwaddr addr, | |
508 | uint64_t *value, | |
509 | unsigned size, | |
510 | unsigned shift, | |
511 | uint64_t mask, | |
512 | MemTxAttrs attrs) | |
513 | { | |
514 | uint64_t tmp; | |
515 | ||
516 | tmp = (*value >> shift) & mask; | |
517 | if (mr->subpage) { | |
518 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); | |
519 | } else if (mr == &io_mem_notdirty) { | |
520 | /* Accesses to code which has previously been translated into a TB show | |
521 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
522 | * MemoryRegion. */ | |
523 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
524 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { | |
525 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
526 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); | |
527 | } | |
528 | mr->ops->write(mr->opaque, addr, tmp, size); | |
529 | return MEMTX_OK; | |
530 | } | |
531 | ||
532 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, | |
533 | hwaddr addr, | |
534 | uint64_t *value, | |
535 | unsigned size, | |
536 | unsigned shift, | |
537 | uint64_t mask, | |
538 | MemTxAttrs attrs) | |
539 | { | |
540 | uint64_t tmp; | |
541 | ||
542 | tmp = (*value >> shift) & mask; | |
543 | if (mr->subpage) { | |
544 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); | |
545 | } else if (mr == &io_mem_notdirty) { | |
546 | /* Accesses to code which has previously been translated into a TB show | |
547 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
548 | * MemoryRegion. */ | |
549 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
550 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { | |
551 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
552 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); | |
553 | } | |
554 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); | |
555 | } | |
556 | ||
557 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
558 | uint64_t *value, | |
559 | unsigned size, | |
560 | unsigned access_size_min, | |
561 | unsigned access_size_max, | |
562 | MemTxResult (*access)(MemoryRegion *mr, | |
563 | hwaddr addr, | |
564 | uint64_t *value, | |
565 | unsigned size, | |
566 | unsigned shift, | |
567 | uint64_t mask, | |
568 | MemTxAttrs attrs), | |
569 | MemoryRegion *mr, | |
570 | MemTxAttrs attrs) | |
571 | { | |
572 | uint64_t access_mask; | |
573 | unsigned access_size; | |
574 | unsigned i; | |
575 | MemTxResult r = MEMTX_OK; | |
576 | ||
577 | if (!access_size_min) { | |
578 | access_size_min = 1; | |
579 | } | |
580 | if (!access_size_max) { | |
581 | access_size_max = 4; | |
582 | } | |
583 | ||
584 | /* FIXME: support unaligned access? */ | |
585 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
586 | access_mask = -1ULL >> (64 - access_size * 8); | |
587 | if (memory_region_big_endian(mr)) { | |
588 | for (i = 0; i < size; i += access_size) { | |
589 | r |= access(mr, addr + i, value, access_size, | |
590 | (size - access_size - i) * 8, access_mask, attrs); | |
591 | } | |
592 | } else { | |
593 | for (i = 0; i < size; i += access_size) { | |
594 | r |= access(mr, addr + i, value, access_size, i * 8, | |
595 | access_mask, attrs); | |
596 | } | |
597 | } | |
598 | return r; | |
599 | } | |
600 | ||
601 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) | |
602 | { | |
603 | AddressSpace *as; | |
604 | ||
605 | while (mr->container) { | |
606 | mr = mr->container; | |
607 | } | |
608 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
609 | if (mr == as->root) { | |
610 | return as; | |
611 | } | |
612 | } | |
613 | return NULL; | |
614 | } | |
615 | ||
616 | /* Render a memory region into the global view. Ranges in @view obscure | |
617 | * ranges in @mr. | |
618 | */ | |
619 | static void render_memory_region(FlatView *view, | |
620 | MemoryRegion *mr, | |
621 | Int128 base, | |
622 | AddrRange clip, | |
623 | bool readonly) | |
624 | { | |
625 | MemoryRegion *subregion; | |
626 | unsigned i; | |
627 | hwaddr offset_in_region; | |
628 | Int128 remain; | |
629 | Int128 now; | |
630 | FlatRange fr; | |
631 | AddrRange tmp; | |
632 | ||
633 | if (!mr->enabled) { | |
634 | return; | |
635 | } | |
636 | ||
637 | int128_addto(&base, int128_make64(mr->addr)); | |
638 | readonly |= mr->readonly; | |
639 | ||
640 | tmp = addrrange_make(base, mr->size); | |
641 | ||
642 | if (!addrrange_intersects(tmp, clip)) { | |
643 | return; | |
644 | } | |
645 | ||
646 | clip = addrrange_intersection(tmp, clip); | |
647 | ||
648 | if (mr->alias) { | |
649 | int128_subfrom(&base, int128_make64(mr->alias->addr)); | |
650 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
651 | render_memory_region(view, mr->alias, base, clip, readonly); | |
652 | return; | |
653 | } | |
654 | ||
655 | /* Render subregions in priority order. */ | |
656 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
657 | render_memory_region(view, subregion, base, clip, readonly); | |
658 | } | |
659 | ||
660 | if (!mr->terminates) { | |
661 | return; | |
662 | } | |
663 | ||
664 | offset_in_region = int128_get64(int128_sub(clip.start, base)); | |
665 | base = clip.start; | |
666 | remain = clip.size; | |
667 | ||
668 | fr.mr = mr; | |
669 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); | |
670 | fr.romd_mode = mr->romd_mode; | |
671 | fr.readonly = readonly; | |
672 | ||
673 | /* Render the region itself into any gaps left by the current view. */ | |
674 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { | |
675 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
676 | continue; | |
677 | } | |
678 | if (int128_lt(base, view->ranges[i].addr.start)) { | |
679 | now = int128_min(remain, | |
680 | int128_sub(view->ranges[i].addr.start, base)); | |
681 | fr.offset_in_region = offset_in_region; | |
682 | fr.addr = addrrange_make(base, now); | |
683 | flatview_insert(view, i, &fr); | |
684 | ++i; | |
685 | int128_addto(&base, now); | |
686 | offset_in_region += int128_get64(now); | |
687 | int128_subfrom(&remain, now); | |
688 | } | |
689 | now = int128_sub(int128_min(int128_add(base, remain), | |
690 | addrrange_end(view->ranges[i].addr)), | |
691 | base); | |
692 | int128_addto(&base, now); | |
693 | offset_in_region += int128_get64(now); | |
694 | int128_subfrom(&remain, now); | |
695 | } | |
696 | if (int128_nz(remain)) { | |
697 | fr.offset_in_region = offset_in_region; | |
698 | fr.addr = addrrange_make(base, remain); | |
699 | flatview_insert(view, i, &fr); | |
700 | } | |
701 | } | |
702 | ||
703 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
704 | static FlatView *generate_memory_topology(MemoryRegion *mr) | |
705 | { | |
706 | FlatView *view; | |
707 | ||
708 | view = g_new(FlatView, 1); | |
709 | flatview_init(view); | |
710 | ||
711 | if (mr) { | |
712 | render_memory_region(view, mr, int128_zero(), | |
713 | addrrange_make(int128_zero(), int128_2_64()), false); | |
714 | } | |
715 | flatview_simplify(view); | |
716 | ||
717 | return view; | |
718 | } | |
719 | ||
720 | static void address_space_add_del_ioeventfds(AddressSpace *as, | |
721 | MemoryRegionIoeventfd *fds_new, | |
722 | unsigned fds_new_nb, | |
723 | MemoryRegionIoeventfd *fds_old, | |
724 | unsigned fds_old_nb) | |
725 | { | |
726 | unsigned iold, inew; | |
727 | MemoryRegionIoeventfd *fd; | |
728 | MemoryRegionSection section; | |
729 | ||
730 | /* Generate a symmetric difference of the old and new fd sets, adding | |
731 | * and deleting as necessary. | |
732 | */ | |
733 | ||
734 | iold = inew = 0; | |
735 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
736 | if (iold < fds_old_nb | |
737 | && (inew == fds_new_nb | |
738 | || memory_region_ioeventfd_before(fds_old[iold], | |
739 | fds_new[inew]))) { | |
740 | fd = &fds_old[iold]; | |
741 | section = (MemoryRegionSection) { | |
742 | .address_space = as, | |
743 | .offset_within_address_space = int128_get64(fd->addr.start), | |
744 | .size = fd->addr.size, | |
745 | }; | |
746 | MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion, | |
747 | fd->match_data, fd->data, fd->e); | |
748 | ++iold; | |
749 | } else if (inew < fds_new_nb | |
750 | && (iold == fds_old_nb | |
751 | || memory_region_ioeventfd_before(fds_new[inew], | |
752 | fds_old[iold]))) { | |
753 | fd = &fds_new[inew]; | |
754 | section = (MemoryRegionSection) { | |
755 | .address_space = as, | |
756 | .offset_within_address_space = int128_get64(fd->addr.start), | |
757 | .size = fd->addr.size, | |
758 | }; | |
759 | MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion, | |
760 | fd->match_data, fd->data, fd->e); | |
761 | ++inew; | |
762 | } else { | |
763 | ++iold; | |
764 | ++inew; | |
765 | } | |
766 | } | |
767 | } | |
768 | ||
769 | static FlatView *address_space_get_flatview(AddressSpace *as) | |
770 | { | |
771 | FlatView *view; | |
772 | ||
773 | rcu_read_lock(); | |
774 | view = atomic_rcu_read(&as->current_map); | |
775 | flatview_ref(view); | |
776 | rcu_read_unlock(); | |
777 | return view; | |
778 | } | |
779 | ||
780 | static void address_space_update_ioeventfds(AddressSpace *as) | |
781 | { | |
782 | FlatView *view; | |
783 | FlatRange *fr; | |
784 | unsigned ioeventfd_nb = 0; | |
785 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
786 | AddrRange tmp; | |
787 | unsigned i; | |
788 | ||
789 | view = address_space_get_flatview(as); | |
790 | FOR_EACH_FLAT_RANGE(fr, view) { | |
791 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { | |
792 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
793 | int128_sub(fr->addr.start, | |
794 | int128_make64(fr->offset_in_region))); | |
795 | if (addrrange_intersects(fr->addr, tmp)) { | |
796 | ++ioeventfd_nb; | |
797 | ioeventfds = g_realloc(ioeventfds, | |
798 | ioeventfd_nb * sizeof(*ioeventfds)); | |
799 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
800 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
801 | } | |
802 | } | |
803 | } | |
804 | ||
805 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
806 | as->ioeventfds, as->ioeventfd_nb); | |
807 | ||
808 | g_free(as->ioeventfds); | |
809 | as->ioeventfds = ioeventfds; | |
810 | as->ioeventfd_nb = ioeventfd_nb; | |
811 | flatview_unref(view); | |
812 | } | |
813 | ||
814 | static void address_space_update_topology_pass(AddressSpace *as, | |
815 | const FlatView *old_view, | |
816 | const FlatView *new_view, | |
817 | bool adding) | |
818 | { | |
819 | unsigned iold, inew; | |
820 | FlatRange *frold, *frnew; | |
821 | ||
822 | /* Generate a symmetric difference of the old and new memory maps. | |
823 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
824 | */ | |
825 | iold = inew = 0; | |
826 | while (iold < old_view->nr || inew < new_view->nr) { | |
827 | if (iold < old_view->nr) { | |
828 | frold = &old_view->ranges[iold]; | |
829 | } else { | |
830 | frold = NULL; | |
831 | } | |
832 | if (inew < new_view->nr) { | |
833 | frnew = &new_view->ranges[inew]; | |
834 | } else { | |
835 | frnew = NULL; | |
836 | } | |
837 | ||
838 | if (frold | |
839 | && (!frnew | |
840 | || int128_lt(frold->addr.start, frnew->addr.start) | |
841 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
842 | && !flatrange_equal(frold, frnew)))) { | |
843 | /* In old but not in new, or in both but attributes changed. */ | |
844 | ||
845 | if (!adding) { | |
846 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); | |
847 | } | |
848 | ||
849 | ++iold; | |
850 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
851 | /* In both and unchanged (except logging may have changed) */ | |
852 | ||
853 | if (adding) { | |
854 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); | |
855 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { | |
856 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
857 | frold->dirty_log_mask, | |
858 | frnew->dirty_log_mask); | |
859 | } | |
860 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
861 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
862 | frold->dirty_log_mask, | |
863 | frnew->dirty_log_mask); | |
864 | } | |
865 | } | |
866 | ||
867 | ++iold; | |
868 | ++inew; | |
869 | } else { | |
870 | /* In new */ | |
871 | ||
872 | if (adding) { | |
873 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); | |
874 | } | |
875 | ||
876 | ++inew; | |
877 | } | |
878 | } | |
879 | } | |
880 | ||
881 | ||
882 | static void address_space_update_topology(AddressSpace *as) | |
883 | { | |
884 | FlatView *old_view = address_space_get_flatview(as); | |
885 | FlatView *new_view = generate_memory_topology(as->root); | |
886 | ||
887 | address_space_update_topology_pass(as, old_view, new_view, false); | |
888 | address_space_update_topology_pass(as, old_view, new_view, true); | |
889 | ||
890 | /* Writes are protected by the BQL. */ | |
891 | atomic_rcu_set(&as->current_map, new_view); | |
892 | call_rcu(old_view, flatview_unref, rcu); | |
893 | ||
894 | /* Note that all the old MemoryRegions are still alive up to this | |
895 | * point. This relieves most MemoryListeners from the need to | |
896 | * ref/unref the MemoryRegions they get---unless they use them | |
897 | * outside the iothread mutex, in which case precise reference | |
898 | * counting is necessary. | |
899 | */ | |
900 | flatview_unref(old_view); | |
901 | ||
902 | address_space_update_ioeventfds(as); | |
903 | } | |
904 | ||
905 | void memory_region_transaction_begin(void) | |
906 | { | |
907 | qemu_flush_coalesced_mmio_buffer(); | |
908 | ++memory_region_transaction_depth; | |
909 | } | |
910 | ||
911 | void memory_region_transaction_commit(void) | |
912 | { | |
913 | AddressSpace *as; | |
914 | ||
915 | assert(memory_region_transaction_depth); | |
916 | assert(qemu_mutex_iothread_locked()); | |
917 | ||
918 | --memory_region_transaction_depth; | |
919 | if (!memory_region_transaction_depth) { | |
920 | if (memory_region_update_pending) { | |
921 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
922 | ||
923 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
924 | address_space_update_topology(as); | |
925 | } | |
926 | memory_region_update_pending = false; | |
927 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
928 | } else if (ioeventfd_update_pending) { | |
929 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
930 | address_space_update_ioeventfds(as); | |
931 | } | |
932 | ioeventfd_update_pending = false; | |
933 | } | |
934 | } | |
935 | } | |
936 | ||
937 | static void memory_region_destructor_none(MemoryRegion *mr) | |
938 | { | |
939 | } | |
940 | ||
941 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
942 | { | |
943 | qemu_ram_free(mr->ram_block); | |
944 | } | |
945 | ||
946 | static bool memory_region_need_escape(char c) | |
947 | { | |
948 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
949 | } | |
950 | ||
951 | static char *memory_region_escape_name(const char *name) | |
952 | { | |
953 | const char *p; | |
954 | char *escaped, *q; | |
955 | uint8_t c; | |
956 | size_t bytes = 0; | |
957 | ||
958 | for (p = name; *p; p++) { | |
959 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
960 | } | |
961 | if (bytes == p - name) { | |
962 | return g_memdup(name, bytes + 1); | |
963 | } | |
964 | ||
965 | escaped = g_malloc(bytes + 1); | |
966 | for (p = name, q = escaped; *p; p++) { | |
967 | c = *p; | |
968 | if (unlikely(memory_region_need_escape(c))) { | |
969 | *q++ = '\\'; | |
970 | *q++ = 'x'; | |
971 | *q++ = "0123456789abcdef"[c >> 4]; | |
972 | c = "0123456789abcdef"[c & 15]; | |
973 | } | |
974 | *q++ = c; | |
975 | } | |
976 | *q = 0; | |
977 | return escaped; | |
978 | } | |
979 | ||
980 | void memory_region_init(MemoryRegion *mr, | |
981 | Object *owner, | |
982 | const char *name, | |
983 | uint64_t size) | |
984 | { | |
985 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); | |
986 | mr->size = int128_make64(size); | |
987 | if (size == UINT64_MAX) { | |
988 | mr->size = int128_2_64(); | |
989 | } | |
990 | mr->name = g_strdup(name); | |
991 | mr->owner = owner; | |
992 | mr->ram_block = NULL; | |
993 | ||
994 | if (name) { | |
995 | char *escaped_name = memory_region_escape_name(name); | |
996 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
997 | ||
998 | if (!owner) { | |
999 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1000 | } | |
1001 | ||
1002 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); | |
1003 | object_unref(OBJECT(mr)); | |
1004 | g_free(name_array); | |
1005 | g_free(escaped_name); | |
1006 | } | |
1007 | } | |
1008 | ||
1009 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, | |
1010 | void *opaque, Error **errp) | |
1011 | { | |
1012 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1013 | uint64_t value = mr->addr; | |
1014 | ||
1015 | visit_type_uint64(v, name, &value, errp); | |
1016 | } | |
1017 | ||
1018 | static void memory_region_get_container(Object *obj, Visitor *v, | |
1019 | const char *name, void *opaque, | |
1020 | Error **errp) | |
1021 | { | |
1022 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1023 | gchar *path = (gchar *)""; | |
1024 | ||
1025 | if (mr->container) { | |
1026 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1027 | } | |
1028 | visit_type_str(v, name, &path, errp); | |
1029 | if (mr->container) { | |
1030 | g_free(path); | |
1031 | } | |
1032 | } | |
1033 | ||
1034 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1035 | const char *part) | |
1036 | { | |
1037 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1038 | ||
1039 | return OBJECT(mr->container); | |
1040 | } | |
1041 | ||
1042 | static void memory_region_get_priority(Object *obj, Visitor *v, | |
1043 | const char *name, void *opaque, | |
1044 | Error **errp) | |
1045 | { | |
1046 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1047 | int32_t value = mr->priority; | |
1048 | ||
1049 | visit_type_int32(v, name, &value, errp); | |
1050 | } | |
1051 | ||
1052 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, | |
1053 | void *opaque, Error **errp) | |
1054 | { | |
1055 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1056 | uint64_t value = memory_region_size(mr); | |
1057 | ||
1058 | visit_type_uint64(v, name, &value, errp); | |
1059 | } | |
1060 | ||
1061 | static void memory_region_initfn(Object *obj) | |
1062 | { | |
1063 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1064 | ObjectProperty *op; | |
1065 | ||
1066 | mr->ops = &unassigned_mem_ops; | |
1067 | mr->enabled = true; | |
1068 | mr->romd_mode = true; | |
1069 | mr->global_locking = true; | |
1070 | mr->destructor = memory_region_destructor_none; | |
1071 | QTAILQ_INIT(&mr->subregions); | |
1072 | QTAILQ_INIT(&mr->coalesced); | |
1073 | ||
1074 | op = object_property_add(OBJECT(mr), "container", | |
1075 | "link<" TYPE_MEMORY_REGION ">", | |
1076 | memory_region_get_container, | |
1077 | NULL, /* memory_region_set_container */ | |
1078 | NULL, NULL, &error_abort); | |
1079 | op->resolve = memory_region_resolve_container; | |
1080 | ||
1081 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1082 | memory_region_get_addr, | |
1083 | NULL, /* memory_region_set_addr */ | |
1084 | NULL, NULL, &error_abort); | |
1085 | object_property_add(OBJECT(mr), "priority", "uint32", | |
1086 | memory_region_get_priority, | |
1087 | NULL, /* memory_region_set_priority */ | |
1088 | NULL, NULL, &error_abort); | |
1089 | object_property_add(OBJECT(mr), "size", "uint64", | |
1090 | memory_region_get_size, | |
1091 | NULL, /* memory_region_set_size, */ | |
1092 | NULL, NULL, &error_abort); | |
1093 | } | |
1094 | ||
1095 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, | |
1096 | unsigned size) | |
1097 | { | |
1098 | #ifdef DEBUG_UNASSIGNED | |
1099 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1100 | #endif | |
1101 | if (current_cpu != NULL) { | |
1102 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
1103 | } | |
1104 | return 0; | |
1105 | } | |
1106 | ||
1107 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1108 | uint64_t val, unsigned size) | |
1109 | { | |
1110 | #ifdef DEBUG_UNASSIGNED | |
1111 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1112 | #endif | |
1113 | if (current_cpu != NULL) { | |
1114 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
1115 | } | |
1116 | } | |
1117 | ||
1118 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, | |
1119 | unsigned size, bool is_write) | |
1120 | { | |
1121 | return false; | |
1122 | } | |
1123 | ||
1124 | const MemoryRegionOps unassigned_mem_ops = { | |
1125 | .valid.accepts = unassigned_mem_accepts, | |
1126 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1127 | }; | |
1128 | ||
1129 | static uint64_t memory_region_ram_device_read(void *opaque, | |
1130 | hwaddr addr, unsigned size) | |
1131 | { | |
1132 | MemoryRegion *mr = opaque; | |
1133 | uint64_t data = (uint64_t)~0; | |
1134 | ||
1135 | switch (size) { | |
1136 | case 1: | |
1137 | data = *(uint8_t *)(mr->ram_block->host + addr); | |
1138 | break; | |
1139 | case 2: | |
1140 | data = *(uint16_t *)(mr->ram_block->host + addr); | |
1141 | break; | |
1142 | case 4: | |
1143 | data = *(uint32_t *)(mr->ram_block->host + addr); | |
1144 | break; | |
1145 | case 8: | |
1146 | data = *(uint64_t *)(mr->ram_block->host + addr); | |
1147 | break; | |
1148 | } | |
1149 | ||
1150 | trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size); | |
1151 | ||
1152 | return data; | |
1153 | } | |
1154 | ||
1155 | static void memory_region_ram_device_write(void *opaque, hwaddr addr, | |
1156 | uint64_t data, unsigned size) | |
1157 | { | |
1158 | MemoryRegion *mr = opaque; | |
1159 | ||
1160 | trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size); | |
1161 | ||
1162 | switch (size) { | |
1163 | case 1: | |
1164 | *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data; | |
1165 | break; | |
1166 | case 2: | |
1167 | *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data; | |
1168 | break; | |
1169 | case 4: | |
1170 | *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data; | |
1171 | break; | |
1172 | case 8: | |
1173 | *(uint64_t *)(mr->ram_block->host + addr) = data; | |
1174 | break; | |
1175 | } | |
1176 | } | |
1177 | ||
1178 | static const MemoryRegionOps ram_device_mem_ops = { | |
1179 | .read = memory_region_ram_device_read, | |
1180 | .write = memory_region_ram_device_write, | |
1181 | .endianness = DEVICE_HOST_ENDIAN, | |
1182 | .valid = { | |
1183 | .min_access_size = 1, | |
1184 | .max_access_size = 8, | |
1185 | .unaligned = true, | |
1186 | }, | |
1187 | .impl = { | |
1188 | .min_access_size = 1, | |
1189 | .max_access_size = 8, | |
1190 | .unaligned = true, | |
1191 | }, | |
1192 | }; | |
1193 | ||
1194 | bool memory_region_access_valid(MemoryRegion *mr, | |
1195 | hwaddr addr, | |
1196 | unsigned size, | |
1197 | bool is_write) | |
1198 | { | |
1199 | int access_size_min, access_size_max; | |
1200 | int access_size, i; | |
1201 | ||
1202 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { | |
1203 | return false; | |
1204 | } | |
1205 | ||
1206 | if (!mr->ops->valid.accepts) { | |
1207 | return true; | |
1208 | } | |
1209 | ||
1210 | access_size_min = mr->ops->valid.min_access_size; | |
1211 | if (!mr->ops->valid.min_access_size) { | |
1212 | access_size_min = 1; | |
1213 | } | |
1214 | ||
1215 | access_size_max = mr->ops->valid.max_access_size; | |
1216 | if (!mr->ops->valid.max_access_size) { | |
1217 | access_size_max = 4; | |
1218 | } | |
1219 | ||
1220 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1221 | for (i = 0; i < size; i += access_size) { | |
1222 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1223 | is_write)) { | |
1224 | return false; | |
1225 | } | |
1226 | } | |
1227 | ||
1228 | return true; | |
1229 | } | |
1230 | ||
1231 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, | |
1232 | hwaddr addr, | |
1233 | uint64_t *pval, | |
1234 | unsigned size, | |
1235 | MemTxAttrs attrs) | |
1236 | { | |
1237 | *pval = 0; | |
1238 | ||
1239 | if (mr->ops->read) { | |
1240 | return access_with_adjusted_size(addr, pval, size, | |
1241 | mr->ops->impl.min_access_size, | |
1242 | mr->ops->impl.max_access_size, | |
1243 | memory_region_read_accessor, | |
1244 | mr, attrs); | |
1245 | } else if (mr->ops->read_with_attrs) { | |
1246 | return access_with_adjusted_size(addr, pval, size, | |
1247 | mr->ops->impl.min_access_size, | |
1248 | mr->ops->impl.max_access_size, | |
1249 | memory_region_read_with_attrs_accessor, | |
1250 | mr, attrs); | |
1251 | } else { | |
1252 | return access_with_adjusted_size(addr, pval, size, 1, 4, | |
1253 | memory_region_oldmmio_read_accessor, | |
1254 | mr, attrs); | |
1255 | } | |
1256 | } | |
1257 | ||
1258 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, | |
1259 | hwaddr addr, | |
1260 | uint64_t *pval, | |
1261 | unsigned size, | |
1262 | MemTxAttrs attrs) | |
1263 | { | |
1264 | MemTxResult r; | |
1265 | ||
1266 | if (!memory_region_access_valid(mr, addr, size, false)) { | |
1267 | *pval = unassigned_mem_read(mr, addr, size); | |
1268 | return MEMTX_DECODE_ERROR; | |
1269 | } | |
1270 | ||
1271 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); | |
1272 | adjust_endianness(mr, pval, size); | |
1273 | return r; | |
1274 | } | |
1275 | ||
1276 | /* Return true if an eventfd was signalled */ | |
1277 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1278 | hwaddr addr, | |
1279 | uint64_t data, | |
1280 | unsigned size, | |
1281 | MemTxAttrs attrs) | |
1282 | { | |
1283 | MemoryRegionIoeventfd ioeventfd = { | |
1284 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1285 | .data = data, | |
1286 | }; | |
1287 | unsigned i; | |
1288 | ||
1289 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1290 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1291 | ioeventfd.e = mr->ioeventfds[i].e; | |
1292 | ||
1293 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1294 | event_notifier_set(ioeventfd.e); | |
1295 | return true; | |
1296 | } | |
1297 | } | |
1298 | ||
1299 | return false; | |
1300 | } | |
1301 | ||
1302 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, | |
1303 | hwaddr addr, | |
1304 | uint64_t data, | |
1305 | unsigned size, | |
1306 | MemTxAttrs attrs) | |
1307 | { | |
1308 | if (!memory_region_access_valid(mr, addr, size, true)) { | |
1309 | unassigned_mem_write(mr, addr, data, size); | |
1310 | return MEMTX_DECODE_ERROR; | |
1311 | } | |
1312 | ||
1313 | adjust_endianness(mr, &data, size); | |
1314 | ||
1315 | if ((!kvm_eventfds_enabled()) && | |
1316 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1317 | return MEMTX_OK; | |
1318 | } | |
1319 | ||
1320 | if (mr->ops->write) { | |
1321 | return access_with_adjusted_size(addr, &data, size, | |
1322 | mr->ops->impl.min_access_size, | |
1323 | mr->ops->impl.max_access_size, | |
1324 | memory_region_write_accessor, mr, | |
1325 | attrs); | |
1326 | } else if (mr->ops->write_with_attrs) { | |
1327 | return | |
1328 | access_with_adjusted_size(addr, &data, size, | |
1329 | mr->ops->impl.min_access_size, | |
1330 | mr->ops->impl.max_access_size, | |
1331 | memory_region_write_with_attrs_accessor, | |
1332 | mr, attrs); | |
1333 | } else { | |
1334 | return access_with_adjusted_size(addr, &data, size, 1, 4, | |
1335 | memory_region_oldmmio_write_accessor, | |
1336 | mr, attrs); | |
1337 | } | |
1338 | } | |
1339 | ||
1340 | void memory_region_init_io(MemoryRegion *mr, | |
1341 | Object *owner, | |
1342 | const MemoryRegionOps *ops, | |
1343 | void *opaque, | |
1344 | const char *name, | |
1345 | uint64_t size) | |
1346 | { | |
1347 | memory_region_init(mr, owner, name, size); | |
1348 | mr->ops = ops ? ops : &unassigned_mem_ops; | |
1349 | mr->opaque = opaque; | |
1350 | mr->terminates = true; | |
1351 | } | |
1352 | ||
1353 | void memory_region_init_ram(MemoryRegion *mr, | |
1354 | Object *owner, | |
1355 | const char *name, | |
1356 | uint64_t size, | |
1357 | Error **errp) | |
1358 | { | |
1359 | memory_region_init(mr, owner, name, size); | |
1360 | mr->ram = true; | |
1361 | mr->terminates = true; | |
1362 | mr->destructor = memory_region_destructor_ram; | |
1363 | mr->ram_block = qemu_ram_alloc(size, mr, errp); | |
1364 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1365 | } | |
1366 | ||
1367 | void memory_region_init_resizeable_ram(MemoryRegion *mr, | |
1368 | Object *owner, | |
1369 | const char *name, | |
1370 | uint64_t size, | |
1371 | uint64_t max_size, | |
1372 | void (*resized)(const char*, | |
1373 | uint64_t length, | |
1374 | void *host), | |
1375 | Error **errp) | |
1376 | { | |
1377 | memory_region_init(mr, owner, name, size); | |
1378 | mr->ram = true; | |
1379 | mr->terminates = true; | |
1380 | mr->destructor = memory_region_destructor_ram; | |
1381 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, | |
1382 | mr, errp); | |
1383 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1384 | } | |
1385 | ||
1386 | #ifdef __linux__ | |
1387 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1388 | struct Object *owner, | |
1389 | const char *name, | |
1390 | uint64_t size, | |
1391 | bool share, | |
1392 | const char *path, | |
1393 | Error **errp) | |
1394 | { | |
1395 | memory_region_init(mr, owner, name, size); | |
1396 | mr->ram = true; | |
1397 | mr->terminates = true; | |
1398 | mr->destructor = memory_region_destructor_ram; | |
1399 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); | |
1400 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1401 | } | |
1402 | ||
1403 | void memory_region_init_ram_from_fd(MemoryRegion *mr, | |
1404 | struct Object *owner, | |
1405 | const char *name, | |
1406 | uint64_t size, | |
1407 | bool share, | |
1408 | int fd, | |
1409 | Error **errp) | |
1410 | { | |
1411 | memory_region_init(mr, owner, name, size); | |
1412 | mr->ram = true; | |
1413 | mr->terminates = true; | |
1414 | mr->destructor = memory_region_destructor_ram; | |
1415 | mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp); | |
1416 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1417 | } | |
1418 | #endif | |
1419 | ||
1420 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
1421 | Object *owner, | |
1422 | const char *name, | |
1423 | uint64_t size, | |
1424 | void *ptr) | |
1425 | { | |
1426 | memory_region_init(mr, owner, name, size); | |
1427 | mr->ram = true; | |
1428 | mr->terminates = true; | |
1429 | mr->destructor = memory_region_destructor_ram; | |
1430 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1431 | ||
1432 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1433 | assert(ptr != NULL); | |
1434 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); | |
1435 | } | |
1436 | ||
1437 | void memory_region_init_ram_device_ptr(MemoryRegion *mr, | |
1438 | Object *owner, | |
1439 | const char *name, | |
1440 | uint64_t size, | |
1441 | void *ptr) | |
1442 | { | |
1443 | memory_region_init_ram_ptr(mr, owner, name, size, ptr); | |
1444 | mr->ram_device = true; | |
1445 | mr->ops = &ram_device_mem_ops; | |
1446 | mr->opaque = mr; | |
1447 | } | |
1448 | ||
1449 | void memory_region_init_alias(MemoryRegion *mr, | |
1450 | Object *owner, | |
1451 | const char *name, | |
1452 | MemoryRegion *orig, | |
1453 | hwaddr offset, | |
1454 | uint64_t size) | |
1455 | { | |
1456 | memory_region_init(mr, owner, name, size); | |
1457 | mr->alias = orig; | |
1458 | mr->alias_offset = offset; | |
1459 | } | |
1460 | ||
1461 | void memory_region_init_rom(MemoryRegion *mr, | |
1462 | struct Object *owner, | |
1463 | const char *name, | |
1464 | uint64_t size, | |
1465 | Error **errp) | |
1466 | { | |
1467 | memory_region_init(mr, owner, name, size); | |
1468 | mr->ram = true; | |
1469 | mr->readonly = true; | |
1470 | mr->terminates = true; | |
1471 | mr->destructor = memory_region_destructor_ram; | |
1472 | mr->ram_block = qemu_ram_alloc(size, mr, errp); | |
1473 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1474 | } | |
1475 | ||
1476 | void memory_region_init_rom_device(MemoryRegion *mr, | |
1477 | Object *owner, | |
1478 | const MemoryRegionOps *ops, | |
1479 | void *opaque, | |
1480 | const char *name, | |
1481 | uint64_t size, | |
1482 | Error **errp) | |
1483 | { | |
1484 | assert(ops); | |
1485 | memory_region_init(mr, owner, name, size); | |
1486 | mr->ops = ops; | |
1487 | mr->opaque = opaque; | |
1488 | mr->terminates = true; | |
1489 | mr->rom_device = true; | |
1490 | mr->destructor = memory_region_destructor_ram; | |
1491 | mr->ram_block = qemu_ram_alloc(size, mr, errp); | |
1492 | } | |
1493 | ||
1494 | void memory_region_init_iommu(MemoryRegion *mr, | |
1495 | Object *owner, | |
1496 | const MemoryRegionIOMMUOps *ops, | |
1497 | const char *name, | |
1498 | uint64_t size) | |
1499 | { | |
1500 | memory_region_init(mr, owner, name, size); | |
1501 | mr->iommu_ops = ops, | |
1502 | mr->terminates = true; /* then re-forwards */ | |
1503 | QLIST_INIT(&mr->iommu_notify); | |
1504 | mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE; | |
1505 | } | |
1506 | ||
1507 | static void memory_region_finalize(Object *obj) | |
1508 | { | |
1509 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1510 | ||
1511 | assert(!mr->container); | |
1512 | ||
1513 | /* We know the region is not visible in any address space (it | |
1514 | * does not have a container and cannot be a root either because | |
1515 | * it has no references, so we can blindly clear mr->enabled. | |
1516 | * memory_region_set_enabled instead could trigger a transaction | |
1517 | * and cause an infinite loop. | |
1518 | */ | |
1519 | mr->enabled = false; | |
1520 | memory_region_transaction_begin(); | |
1521 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1522 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1523 | memory_region_del_subregion(mr, subregion); | |
1524 | } | |
1525 | memory_region_transaction_commit(); | |
1526 | ||
1527 | mr->destructor(mr); | |
1528 | memory_region_clear_coalescing(mr); | |
1529 | g_free((char *)mr->name); | |
1530 | g_free(mr->ioeventfds); | |
1531 | } | |
1532 | ||
1533 | Object *memory_region_owner(MemoryRegion *mr) | |
1534 | { | |
1535 | Object *obj = OBJECT(mr); | |
1536 | return obj->parent; | |
1537 | } | |
1538 | ||
1539 | void memory_region_ref(MemoryRegion *mr) | |
1540 | { | |
1541 | /* MMIO callbacks most likely will access data that belongs | |
1542 | * to the owner, hence the need to ref/unref the owner whenever | |
1543 | * the memory region is in use. | |
1544 | * | |
1545 | * The memory region is a child of its owner. As long as the | |
1546 | * owner doesn't call unparent itself on the memory region, | |
1547 | * ref-ing the owner will also keep the memory region alive. | |
1548 | * Memory regions without an owner are supposed to never go away; | |
1549 | * we do not ref/unref them because it slows down DMA sensibly. | |
1550 | */ | |
1551 | if (mr && mr->owner) { | |
1552 | object_ref(mr->owner); | |
1553 | } | |
1554 | } | |
1555 | ||
1556 | void memory_region_unref(MemoryRegion *mr) | |
1557 | { | |
1558 | if (mr && mr->owner) { | |
1559 | object_unref(mr->owner); | |
1560 | } | |
1561 | } | |
1562 | ||
1563 | uint64_t memory_region_size(MemoryRegion *mr) | |
1564 | { | |
1565 | if (int128_eq(mr->size, int128_2_64())) { | |
1566 | return UINT64_MAX; | |
1567 | } | |
1568 | return int128_get64(mr->size); | |
1569 | } | |
1570 | ||
1571 | const char *memory_region_name(const MemoryRegion *mr) | |
1572 | { | |
1573 | if (!mr->name) { | |
1574 | ((MemoryRegion *)mr)->name = | |
1575 | object_get_canonical_path_component(OBJECT(mr)); | |
1576 | } | |
1577 | return mr->name; | |
1578 | } | |
1579 | ||
1580 | bool memory_region_is_ram_device(MemoryRegion *mr) | |
1581 | { | |
1582 | return mr->ram_device; | |
1583 | } | |
1584 | ||
1585 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) | |
1586 | { | |
1587 | uint8_t mask = mr->dirty_log_mask; | |
1588 | if (global_dirty_log && mr->ram_block) { | |
1589 | mask |= (1 << DIRTY_MEMORY_MIGRATION); | |
1590 | } | |
1591 | return mask; | |
1592 | } | |
1593 | ||
1594 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) | |
1595 | { | |
1596 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1597 | } | |
1598 | ||
1599 | static void memory_region_update_iommu_notify_flags(MemoryRegion *mr) | |
1600 | { | |
1601 | IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE; | |
1602 | IOMMUNotifier *iommu_notifier; | |
1603 | ||
1604 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) { | |
1605 | flags |= iommu_notifier->notifier_flags; | |
1606 | } | |
1607 | ||
1608 | if (flags != mr->iommu_notify_flags && | |
1609 | mr->iommu_ops->notify_flag_changed) { | |
1610 | mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags, | |
1611 | flags); | |
1612 | } | |
1613 | ||
1614 | mr->iommu_notify_flags = flags; | |
1615 | } | |
1616 | ||
1617 | void memory_region_register_iommu_notifier(MemoryRegion *mr, | |
1618 | IOMMUNotifier *n) | |
1619 | { | |
1620 | if (mr->alias) { | |
1621 | memory_region_register_iommu_notifier(mr->alias, n); | |
1622 | return; | |
1623 | } | |
1624 | ||
1625 | /* We need to register for at least one bitfield */ | |
1626 | assert(n->notifier_flags != IOMMU_NOTIFIER_NONE); | |
1627 | assert(n->start <= n->end); | |
1628 | QLIST_INSERT_HEAD(&mr->iommu_notify, n, node); | |
1629 | memory_region_update_iommu_notify_flags(mr); | |
1630 | } | |
1631 | ||
1632 | uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr) | |
1633 | { | |
1634 | assert(memory_region_is_iommu(mr)); | |
1635 | if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) { | |
1636 | return mr->iommu_ops->get_min_page_size(mr); | |
1637 | } | |
1638 | return TARGET_PAGE_SIZE; | |
1639 | } | |
1640 | ||
1641 | void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n) | |
1642 | { | |
1643 | hwaddr addr, granularity; | |
1644 | IOMMUTLBEntry iotlb; | |
1645 | ||
1646 | /* If the IOMMU has its own replay callback, override */ | |
1647 | if (mr->iommu_ops->replay) { | |
1648 | mr->iommu_ops->replay(mr, n); | |
1649 | return; | |
1650 | } | |
1651 | ||
1652 | granularity = memory_region_iommu_get_min_page_size(mr); | |
1653 | ||
1654 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { | |
1655 | iotlb = mr->iommu_ops->translate(mr, addr, IOMMU_NONE); | |
1656 | if (iotlb.perm != IOMMU_NONE) { | |
1657 | n->notify(n, &iotlb); | |
1658 | } | |
1659 | ||
1660 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1661 | * infinite loop here. This should catch such a wraparound */ | |
1662 | if ((addr + granularity) < addr) { | |
1663 | break; | |
1664 | } | |
1665 | } | |
1666 | } | |
1667 | ||
1668 | void memory_region_iommu_replay_all(MemoryRegion *mr) | |
1669 | { | |
1670 | IOMMUNotifier *notifier; | |
1671 | ||
1672 | IOMMU_NOTIFIER_FOREACH(notifier, mr) { | |
1673 | memory_region_iommu_replay(mr, notifier); | |
1674 | } | |
1675 | } | |
1676 | ||
1677 | void memory_region_unregister_iommu_notifier(MemoryRegion *mr, | |
1678 | IOMMUNotifier *n) | |
1679 | { | |
1680 | if (mr->alias) { | |
1681 | memory_region_unregister_iommu_notifier(mr->alias, n); | |
1682 | return; | |
1683 | } | |
1684 | QLIST_REMOVE(n, node); | |
1685 | memory_region_update_iommu_notify_flags(mr); | |
1686 | } | |
1687 | ||
1688 | void memory_region_notify_one(IOMMUNotifier *notifier, | |
1689 | IOMMUTLBEntry *entry) | |
1690 | { | |
1691 | IOMMUNotifierFlag request_flags; | |
1692 | ||
1693 | /* | |
1694 | * Skip the notification if the notification does not overlap | |
1695 | * with registered range. | |
1696 | */ | |
1697 | if (notifier->start > entry->iova + entry->addr_mask + 1 || | |
1698 | notifier->end < entry->iova) { | |
1699 | return; | |
1700 | } | |
1701 | ||
1702 | if (entry->perm & IOMMU_RW) { | |
1703 | request_flags = IOMMU_NOTIFIER_MAP; | |
1704 | } else { | |
1705 | request_flags = IOMMU_NOTIFIER_UNMAP; | |
1706 | } | |
1707 | ||
1708 | if (notifier->notifier_flags & request_flags) { | |
1709 | notifier->notify(notifier, entry); | |
1710 | } | |
1711 | } | |
1712 | ||
1713 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1714 | IOMMUTLBEntry entry) | |
1715 | { | |
1716 | IOMMUNotifier *iommu_notifier; | |
1717 | ||
1718 | assert(memory_region_is_iommu(mr)); | |
1719 | ||
1720 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) { | |
1721 | memory_region_notify_one(iommu_notifier, &entry); | |
1722 | } | |
1723 | } | |
1724 | ||
1725 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) | |
1726 | { | |
1727 | uint8_t mask = 1 << client; | |
1728 | uint8_t old_logging; | |
1729 | ||
1730 | assert(client == DIRTY_MEMORY_VGA); | |
1731 | old_logging = mr->vga_logging_count; | |
1732 | mr->vga_logging_count += log ? 1 : -1; | |
1733 | if (!!old_logging == !!mr->vga_logging_count) { | |
1734 | return; | |
1735 | } | |
1736 | ||
1737 | memory_region_transaction_begin(); | |
1738 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); | |
1739 | memory_region_update_pending |= mr->enabled; | |
1740 | memory_region_transaction_commit(); | |
1741 | } | |
1742 | ||
1743 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, | |
1744 | hwaddr size, unsigned client) | |
1745 | { | |
1746 | assert(mr->ram_block); | |
1747 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1748 | size, client); | |
1749 | } | |
1750 | ||
1751 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, | |
1752 | hwaddr size) | |
1753 | { | |
1754 | assert(mr->ram_block); | |
1755 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1756 | size, | |
1757 | memory_region_get_dirty_log_mask(mr)); | |
1758 | } | |
1759 | ||
1760 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, | |
1761 | hwaddr size, unsigned client) | |
1762 | { | |
1763 | assert(mr->ram_block); | |
1764 | return cpu_physical_memory_test_and_clear_dirty( | |
1765 | memory_region_get_ram_addr(mr) + addr, size, client); | |
1766 | } | |
1767 | ||
1768 | DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, | |
1769 | hwaddr addr, | |
1770 | hwaddr size, | |
1771 | unsigned client) | |
1772 | { | |
1773 | assert(mr->ram_block); | |
1774 | return cpu_physical_memory_snapshot_and_clear_dirty( | |
1775 | memory_region_get_ram_addr(mr) + addr, size, client); | |
1776 | } | |
1777 | ||
1778 | bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap, | |
1779 | hwaddr addr, hwaddr size) | |
1780 | { | |
1781 | assert(mr->ram_block); | |
1782 | return cpu_physical_memory_snapshot_get_dirty(snap, | |
1783 | memory_region_get_ram_addr(mr) + addr, size); | |
1784 | } | |
1785 | ||
1786 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1787 | { | |
1788 | MemoryListener *listener; | |
1789 | AddressSpace *as; | |
1790 | FlatView *view; | |
1791 | FlatRange *fr; | |
1792 | ||
1793 | /* If the same address space has multiple log_sync listeners, we | |
1794 | * visit that address space's FlatView multiple times. But because | |
1795 | * log_sync listeners are rare, it's still cheaper than walking each | |
1796 | * address space once. | |
1797 | */ | |
1798 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
1799 | if (!listener->log_sync) { | |
1800 | continue; | |
1801 | } | |
1802 | as = listener->address_space; | |
1803 | view = address_space_get_flatview(as); | |
1804 | FOR_EACH_FLAT_RANGE(fr, view) { | |
1805 | if (fr->mr == mr) { | |
1806 | MemoryRegionSection mrs = section_from_flat_range(fr, as); | |
1807 | listener->log_sync(listener, &mrs); | |
1808 | } | |
1809 | } | |
1810 | flatview_unref(view); | |
1811 | } | |
1812 | } | |
1813 | ||
1814 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1815 | { | |
1816 | if (mr->readonly != readonly) { | |
1817 | memory_region_transaction_begin(); | |
1818 | mr->readonly = readonly; | |
1819 | memory_region_update_pending |= mr->enabled; | |
1820 | memory_region_transaction_commit(); | |
1821 | } | |
1822 | } | |
1823 | ||
1824 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) | |
1825 | { | |
1826 | if (mr->romd_mode != romd_mode) { | |
1827 | memory_region_transaction_begin(); | |
1828 | mr->romd_mode = romd_mode; | |
1829 | memory_region_update_pending |= mr->enabled; | |
1830 | memory_region_transaction_commit(); | |
1831 | } | |
1832 | } | |
1833 | ||
1834 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, | |
1835 | hwaddr size, unsigned client) | |
1836 | { | |
1837 | assert(mr->ram_block); | |
1838 | cpu_physical_memory_test_and_clear_dirty( | |
1839 | memory_region_get_ram_addr(mr) + addr, size, client); | |
1840 | } | |
1841 | ||
1842 | int memory_region_get_fd(MemoryRegion *mr) | |
1843 | { | |
1844 | int fd; | |
1845 | ||
1846 | rcu_read_lock(); | |
1847 | while (mr->alias) { | |
1848 | mr = mr->alias; | |
1849 | } | |
1850 | fd = mr->ram_block->fd; | |
1851 | rcu_read_unlock(); | |
1852 | ||
1853 | return fd; | |
1854 | } | |
1855 | ||
1856 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1857 | { | |
1858 | void *ptr; | |
1859 | uint64_t offset = 0; | |
1860 | ||
1861 | rcu_read_lock(); | |
1862 | while (mr->alias) { | |
1863 | offset += mr->alias_offset; | |
1864 | mr = mr->alias; | |
1865 | } | |
1866 | assert(mr->ram_block); | |
1867 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); | |
1868 | rcu_read_unlock(); | |
1869 | ||
1870 | return ptr; | |
1871 | } | |
1872 | ||
1873 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) | |
1874 | { | |
1875 | RAMBlock *block; | |
1876 | ||
1877 | block = qemu_ram_block_from_host(ptr, false, offset); | |
1878 | if (!block) { | |
1879 | return NULL; | |
1880 | } | |
1881 | ||
1882 | return block->mr; | |
1883 | } | |
1884 | ||
1885 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) | |
1886 | { | |
1887 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1888 | } | |
1889 | ||
1890 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) | |
1891 | { | |
1892 | assert(mr->ram_block); | |
1893 | ||
1894 | qemu_ram_resize(mr->ram_block, newsize, errp); | |
1895 | } | |
1896 | ||
1897 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) | |
1898 | { | |
1899 | FlatView *view; | |
1900 | FlatRange *fr; | |
1901 | CoalescedMemoryRange *cmr; | |
1902 | AddrRange tmp; | |
1903 | MemoryRegionSection section; | |
1904 | ||
1905 | view = address_space_get_flatview(as); | |
1906 | FOR_EACH_FLAT_RANGE(fr, view) { | |
1907 | if (fr->mr == mr) { | |
1908 | section = (MemoryRegionSection) { | |
1909 | .address_space = as, | |
1910 | .offset_within_address_space = int128_get64(fr->addr.start), | |
1911 | .size = fr->addr.size, | |
1912 | }; | |
1913 | ||
1914 | MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, §ion, | |
1915 | int128_get64(fr->addr.start), | |
1916 | int128_get64(fr->addr.size)); | |
1917 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { | |
1918 | tmp = addrrange_shift(cmr->addr, | |
1919 | int128_sub(fr->addr.start, | |
1920 | int128_make64(fr->offset_in_region))); | |
1921 | if (!addrrange_intersects(tmp, fr->addr)) { | |
1922 | continue; | |
1923 | } | |
1924 | tmp = addrrange_intersection(tmp, fr->addr); | |
1925 | MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, §ion, | |
1926 | int128_get64(tmp.start), | |
1927 | int128_get64(tmp.size)); | |
1928 | } | |
1929 | } | |
1930 | } | |
1931 | flatview_unref(view); | |
1932 | } | |
1933 | ||
1934 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1935 | { | |
1936 | AddressSpace *as; | |
1937 | ||
1938 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1939 | memory_region_update_coalesced_range_as(mr, as); | |
1940 | } | |
1941 | } | |
1942 | ||
1943 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1944 | { | |
1945 | memory_region_clear_coalescing(mr); | |
1946 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); | |
1947 | } | |
1948 | ||
1949 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1950 | hwaddr offset, | |
1951 | uint64_t size) | |
1952 | { | |
1953 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); | |
1954 | ||
1955 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); | |
1956 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); | |
1957 | memory_region_update_coalesced_range(mr); | |
1958 | memory_region_set_flush_coalesced(mr); | |
1959 | } | |
1960 | ||
1961 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1962 | { | |
1963 | CoalescedMemoryRange *cmr; | |
1964 | bool updated = false; | |
1965 | ||
1966 | qemu_flush_coalesced_mmio_buffer(); | |
1967 | mr->flush_coalesced_mmio = false; | |
1968 | ||
1969 | while (!QTAILQ_EMPTY(&mr->coalesced)) { | |
1970 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1971 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
1972 | g_free(cmr); | |
1973 | updated = true; | |
1974 | } | |
1975 | ||
1976 | if (updated) { | |
1977 | memory_region_update_coalesced_range(mr); | |
1978 | } | |
1979 | } | |
1980 | ||
1981 | void memory_region_set_flush_coalesced(MemoryRegion *mr) | |
1982 | { | |
1983 | mr->flush_coalesced_mmio = true; | |
1984 | } | |
1985 | ||
1986 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1987 | { | |
1988 | qemu_flush_coalesced_mmio_buffer(); | |
1989 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1990 | mr->flush_coalesced_mmio = false; | |
1991 | } | |
1992 | } | |
1993 | ||
1994 | void memory_region_set_global_locking(MemoryRegion *mr) | |
1995 | { | |
1996 | mr->global_locking = true; | |
1997 | } | |
1998 | ||
1999 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
2000 | { | |
2001 | mr->global_locking = false; | |
2002 | } | |
2003 | ||
2004 | static bool userspace_eventfd_warning; | |
2005 | ||
2006 | void memory_region_add_eventfd(MemoryRegion *mr, | |
2007 | hwaddr addr, | |
2008 | unsigned size, | |
2009 | bool match_data, | |
2010 | uint64_t data, | |
2011 | EventNotifier *e) | |
2012 | { | |
2013 | MemoryRegionIoeventfd mrfd = { | |
2014 | .addr.start = int128_make64(addr), | |
2015 | .addr.size = int128_make64(size), | |
2016 | .match_data = match_data, | |
2017 | .data = data, | |
2018 | .e = e, | |
2019 | }; | |
2020 | unsigned i; | |
2021 | ||
2022 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || | |
2023 | userspace_eventfd_warning))) { | |
2024 | userspace_eventfd_warning = true; | |
2025 | error_report("Using eventfd without MMIO binding in KVM. " | |
2026 | "Suboptimal performance expected"); | |
2027 | } | |
2028 | ||
2029 | if (size) { | |
2030 | adjust_endianness(mr, &mrfd.data, size); | |
2031 | } | |
2032 | memory_region_transaction_begin(); | |
2033 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
2034 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
2035 | break; | |
2036 | } | |
2037 | } | |
2038 | ++mr->ioeventfd_nb; | |
2039 | mr->ioeventfds = g_realloc(mr->ioeventfds, | |
2040 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); | |
2041 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
2042 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
2043 | mr->ioeventfds[i] = mrfd; | |
2044 | ioeventfd_update_pending |= mr->enabled; | |
2045 | memory_region_transaction_commit(); | |
2046 | } | |
2047 | ||
2048 | void memory_region_del_eventfd(MemoryRegion *mr, | |
2049 | hwaddr addr, | |
2050 | unsigned size, | |
2051 | bool match_data, | |
2052 | uint64_t data, | |
2053 | EventNotifier *e) | |
2054 | { | |
2055 | MemoryRegionIoeventfd mrfd = { | |
2056 | .addr.start = int128_make64(addr), | |
2057 | .addr.size = int128_make64(size), | |
2058 | .match_data = match_data, | |
2059 | .data = data, | |
2060 | .e = e, | |
2061 | }; | |
2062 | unsigned i; | |
2063 | ||
2064 | if (size) { | |
2065 | adjust_endianness(mr, &mrfd.data, size); | |
2066 | } | |
2067 | memory_region_transaction_begin(); | |
2068 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
2069 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
2070 | break; | |
2071 | } | |
2072 | } | |
2073 | assert(i != mr->ioeventfd_nb); | |
2074 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
2075 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
2076 | --mr->ioeventfd_nb; | |
2077 | mr->ioeventfds = g_realloc(mr->ioeventfds, | |
2078 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); | |
2079 | ioeventfd_update_pending |= mr->enabled; | |
2080 | memory_region_transaction_commit(); | |
2081 | } | |
2082 | ||
2083 | static void memory_region_update_container_subregions(MemoryRegion *subregion) | |
2084 | { | |
2085 | MemoryRegion *mr = subregion->container; | |
2086 | MemoryRegion *other; | |
2087 | ||
2088 | memory_region_transaction_begin(); | |
2089 | ||
2090 | memory_region_ref(subregion); | |
2091 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
2092 | if (subregion->priority >= other->priority) { | |
2093 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
2094 | goto done; | |
2095 | } | |
2096 | } | |
2097 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
2098 | done: | |
2099 | memory_region_update_pending |= mr->enabled && subregion->enabled; | |
2100 | memory_region_transaction_commit(); | |
2101 | } | |
2102 | ||
2103 | static void memory_region_add_subregion_common(MemoryRegion *mr, | |
2104 | hwaddr offset, | |
2105 | MemoryRegion *subregion) | |
2106 | { | |
2107 | assert(!subregion->container); | |
2108 | subregion->container = mr; | |
2109 | subregion->addr = offset; | |
2110 | memory_region_update_container_subregions(subregion); | |
2111 | } | |
2112 | ||
2113 | void memory_region_add_subregion(MemoryRegion *mr, | |
2114 | hwaddr offset, | |
2115 | MemoryRegion *subregion) | |
2116 | { | |
2117 | subregion->priority = 0; | |
2118 | memory_region_add_subregion_common(mr, offset, subregion); | |
2119 | } | |
2120 | ||
2121 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
2122 | hwaddr offset, | |
2123 | MemoryRegion *subregion, | |
2124 | int priority) | |
2125 | { | |
2126 | subregion->priority = priority; | |
2127 | memory_region_add_subregion_common(mr, offset, subregion); | |
2128 | } | |
2129 | ||
2130 | void memory_region_del_subregion(MemoryRegion *mr, | |
2131 | MemoryRegion *subregion) | |
2132 | { | |
2133 | memory_region_transaction_begin(); | |
2134 | assert(subregion->container == mr); | |
2135 | subregion->container = NULL; | |
2136 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
2137 | memory_region_unref(subregion); | |
2138 | memory_region_update_pending |= mr->enabled && subregion->enabled; | |
2139 | memory_region_transaction_commit(); | |
2140 | } | |
2141 | ||
2142 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
2143 | { | |
2144 | if (enabled == mr->enabled) { | |
2145 | return; | |
2146 | } | |
2147 | memory_region_transaction_begin(); | |
2148 | mr->enabled = enabled; | |
2149 | memory_region_update_pending = true; | |
2150 | memory_region_transaction_commit(); | |
2151 | } | |
2152 | ||
2153 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) | |
2154 | { | |
2155 | Int128 s = int128_make64(size); | |
2156 | ||
2157 | if (size == UINT64_MAX) { | |
2158 | s = int128_2_64(); | |
2159 | } | |
2160 | if (int128_eq(s, mr->size)) { | |
2161 | return; | |
2162 | } | |
2163 | memory_region_transaction_begin(); | |
2164 | mr->size = s; | |
2165 | memory_region_update_pending = true; | |
2166 | memory_region_transaction_commit(); | |
2167 | } | |
2168 | ||
2169 | static void memory_region_readd_subregion(MemoryRegion *mr) | |
2170 | { | |
2171 | MemoryRegion *container = mr->container; | |
2172 | ||
2173 | if (container) { | |
2174 | memory_region_transaction_begin(); | |
2175 | memory_region_ref(mr); | |
2176 | memory_region_del_subregion(container, mr); | |
2177 | mr->container = container; | |
2178 | memory_region_update_container_subregions(mr); | |
2179 | memory_region_unref(mr); | |
2180 | memory_region_transaction_commit(); | |
2181 | } | |
2182 | } | |
2183 | ||
2184 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) | |
2185 | { | |
2186 | if (addr != mr->addr) { | |
2187 | mr->addr = addr; | |
2188 | memory_region_readd_subregion(mr); | |
2189 | } | |
2190 | } | |
2191 | ||
2192 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) | |
2193 | { | |
2194 | assert(mr->alias); | |
2195 | ||
2196 | if (offset == mr->alias_offset) { | |
2197 | return; | |
2198 | } | |
2199 | ||
2200 | memory_region_transaction_begin(); | |
2201 | mr->alias_offset = offset; | |
2202 | memory_region_update_pending |= mr->enabled; | |
2203 | memory_region_transaction_commit(); | |
2204 | } | |
2205 | ||
2206 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) | |
2207 | { | |
2208 | return mr->align; | |
2209 | } | |
2210 | ||
2211 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) | |
2212 | { | |
2213 | const AddrRange *addr = addr_; | |
2214 | const FlatRange *fr = fr_; | |
2215 | ||
2216 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2217 | return -1; | |
2218 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2219 | return 1; | |
2220 | } | |
2221 | return 0; | |
2222 | } | |
2223 | ||
2224 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) | |
2225 | { | |
2226 | return bsearch(&addr, view->ranges, view->nr, | |
2227 | sizeof(FlatRange), cmp_flatrange_addr); | |
2228 | } | |
2229 | ||
2230 | bool memory_region_is_mapped(MemoryRegion *mr) | |
2231 | { | |
2232 | return mr->container ? true : false; | |
2233 | } | |
2234 | ||
2235 | /* Same as memory_region_find, but it does not add a reference to the | |
2236 | * returned region. It must be called from an RCU critical section. | |
2237 | */ | |
2238 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2239 | hwaddr addr, uint64_t size) | |
2240 | { | |
2241 | MemoryRegionSection ret = { .mr = NULL }; | |
2242 | MemoryRegion *root; | |
2243 | AddressSpace *as; | |
2244 | AddrRange range; | |
2245 | FlatView *view; | |
2246 | FlatRange *fr; | |
2247 | ||
2248 | addr += mr->addr; | |
2249 | for (root = mr; root->container; ) { | |
2250 | root = root->container; | |
2251 | addr += root->addr; | |
2252 | } | |
2253 | ||
2254 | as = memory_region_to_address_space(root); | |
2255 | if (!as) { | |
2256 | return ret; | |
2257 | } | |
2258 | range = addrrange_make(int128_make64(addr), int128_make64(size)); | |
2259 | ||
2260 | view = atomic_rcu_read(&as->current_map); | |
2261 | fr = flatview_lookup(view, range); | |
2262 | if (!fr) { | |
2263 | return ret; | |
2264 | } | |
2265 | ||
2266 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { | |
2267 | --fr; | |
2268 | } | |
2269 | ||
2270 | ret.mr = fr->mr; | |
2271 | ret.address_space = as; | |
2272 | range = addrrange_intersection(range, fr->addr); | |
2273 | ret.offset_within_region = fr->offset_in_region; | |
2274 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2275 | fr->addr.start)); | |
2276 | ret.size = range.size; | |
2277 | ret.offset_within_address_space = int128_get64(range.start); | |
2278 | ret.readonly = fr->readonly; | |
2279 | return ret; | |
2280 | } | |
2281 | ||
2282 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2283 | hwaddr addr, uint64_t size) | |
2284 | { | |
2285 | MemoryRegionSection ret; | |
2286 | rcu_read_lock(); | |
2287 | ret = memory_region_find_rcu(mr, addr, size); | |
2288 | if (ret.mr) { | |
2289 | memory_region_ref(ret.mr); | |
2290 | } | |
2291 | rcu_read_unlock(); | |
2292 | return ret; | |
2293 | } | |
2294 | ||
2295 | bool memory_region_present(MemoryRegion *container, hwaddr addr) | |
2296 | { | |
2297 | MemoryRegion *mr; | |
2298 | ||
2299 | rcu_read_lock(); | |
2300 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2301 | rcu_read_unlock(); | |
2302 | return mr && mr != container; | |
2303 | } | |
2304 | ||
2305 | void memory_global_dirty_log_sync(void) | |
2306 | { | |
2307 | MemoryListener *listener; | |
2308 | AddressSpace *as; | |
2309 | FlatView *view; | |
2310 | FlatRange *fr; | |
2311 | ||
2312 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2313 | if (!listener->log_sync) { | |
2314 | continue; | |
2315 | } | |
2316 | as = listener->address_space; | |
2317 | view = address_space_get_flatview(as); | |
2318 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2319 | if (fr->dirty_log_mask) { | |
2320 | MemoryRegionSection mrs = section_from_flat_range(fr, as); | |
2321 | listener->log_sync(listener, &mrs); | |
2322 | } | |
2323 | } | |
2324 | flatview_unref(view); | |
2325 | } | |
2326 | } | |
2327 | ||
2328 | void memory_global_dirty_log_start(void) | |
2329 | { | |
2330 | global_dirty_log = true; | |
2331 | ||
2332 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); | |
2333 | ||
2334 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2335 | memory_region_transaction_begin(); | |
2336 | memory_region_update_pending = true; | |
2337 | memory_region_transaction_commit(); | |
2338 | } | |
2339 | ||
2340 | void memory_global_dirty_log_stop(void) | |
2341 | { | |
2342 | global_dirty_log = false; | |
2343 | ||
2344 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2345 | memory_region_transaction_begin(); | |
2346 | memory_region_update_pending = true; | |
2347 | memory_region_transaction_commit(); | |
2348 | ||
2349 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); | |
2350 | } | |
2351 | ||
2352 | static void listener_add_address_space(MemoryListener *listener, | |
2353 | AddressSpace *as) | |
2354 | { | |
2355 | FlatView *view; | |
2356 | FlatRange *fr; | |
2357 | ||
2358 | if (listener->begin) { | |
2359 | listener->begin(listener); | |
2360 | } | |
2361 | if (global_dirty_log) { | |
2362 | if (listener->log_global_start) { | |
2363 | listener->log_global_start(listener); | |
2364 | } | |
2365 | } | |
2366 | ||
2367 | view = address_space_get_flatview(as); | |
2368 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2369 | MemoryRegionSection section = { | |
2370 | .mr = fr->mr, | |
2371 | .address_space = as, | |
2372 | .offset_within_region = fr->offset_in_region, | |
2373 | .size = fr->addr.size, | |
2374 | .offset_within_address_space = int128_get64(fr->addr.start), | |
2375 | .readonly = fr->readonly, | |
2376 | }; | |
2377 | if (fr->dirty_log_mask && listener->log_start) { | |
2378 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2379 | } | |
2380 | if (listener->region_add) { | |
2381 | listener->region_add(listener, §ion); | |
2382 | } | |
2383 | } | |
2384 | if (listener->commit) { | |
2385 | listener->commit(listener); | |
2386 | } | |
2387 | flatview_unref(view); | |
2388 | } | |
2389 | ||
2390 | void memory_listener_register(MemoryListener *listener, AddressSpace *as) | |
2391 | { | |
2392 | MemoryListener *other = NULL; | |
2393 | ||
2394 | listener->address_space = as; | |
2395 | if (QTAILQ_EMPTY(&memory_listeners) | |
2396 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2397 | memory_listeners)->priority) { | |
2398 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2399 | } else { | |
2400 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2401 | if (listener->priority < other->priority) { | |
2402 | break; | |
2403 | } | |
2404 | } | |
2405 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2406 | } | |
2407 | ||
2408 | if (QTAILQ_EMPTY(&as->listeners) | |
2409 | || listener->priority >= QTAILQ_LAST(&as->listeners, | |
2410 | memory_listeners)->priority) { | |
2411 | QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); | |
2412 | } else { | |
2413 | QTAILQ_FOREACH(other, &as->listeners, link_as) { | |
2414 | if (listener->priority < other->priority) { | |
2415 | break; | |
2416 | } | |
2417 | } | |
2418 | QTAILQ_INSERT_BEFORE(other, listener, link_as); | |
2419 | } | |
2420 | ||
2421 | listener_add_address_space(listener, as); | |
2422 | } | |
2423 | ||
2424 | void memory_listener_unregister(MemoryListener *listener) | |
2425 | { | |
2426 | if (!listener->address_space) { | |
2427 | return; | |
2428 | } | |
2429 | ||
2430 | QTAILQ_REMOVE(&memory_listeners, listener, link); | |
2431 | QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); | |
2432 | listener->address_space = NULL; | |
2433 | } | |
2434 | ||
2435 | bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr) | |
2436 | { | |
2437 | void *host; | |
2438 | unsigned size = 0; | |
2439 | unsigned offset = 0; | |
2440 | Object *new_interface; | |
2441 | ||
2442 | if (!mr || !mr->ops->request_ptr) { | |
2443 | return false; | |
2444 | } | |
2445 | ||
2446 | /* | |
2447 | * Avoid an update if the request_ptr call | |
2448 | * memory_region_invalidate_mmio_ptr which seems to be likely when we use | |
2449 | * a cache. | |
2450 | */ | |
2451 | memory_region_transaction_begin(); | |
2452 | ||
2453 | host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset); | |
2454 | ||
2455 | if (!host || !size) { | |
2456 | memory_region_transaction_commit(); | |
2457 | return false; | |
2458 | } | |
2459 | ||
2460 | new_interface = object_new("mmio_interface"); | |
2461 | qdev_prop_set_uint64(DEVICE(new_interface), "start", offset); | |
2462 | qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1); | |
2463 | qdev_prop_set_bit(DEVICE(new_interface), "ro", true); | |
2464 | qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host); | |
2465 | qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr); | |
2466 | object_property_set_bool(OBJECT(new_interface), true, "realized", NULL); | |
2467 | ||
2468 | memory_region_transaction_commit(); | |
2469 | return true; | |
2470 | } | |
2471 | ||
2472 | typedef struct MMIOPtrInvalidate { | |
2473 | MemoryRegion *mr; | |
2474 | hwaddr offset; | |
2475 | unsigned size; | |
2476 | int busy; | |
2477 | int allocated; | |
2478 | } MMIOPtrInvalidate; | |
2479 | ||
2480 | #define MAX_MMIO_INVALIDATE 10 | |
2481 | static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE]; | |
2482 | ||
2483 | static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu, | |
2484 | run_on_cpu_data data) | |
2485 | { | |
2486 | MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr; | |
2487 | MemoryRegion *mr = invalidate_data->mr; | |
2488 | hwaddr offset = invalidate_data->offset; | |
2489 | unsigned size = invalidate_data->size; | |
2490 | MemoryRegionSection section = memory_region_find(mr, offset, size); | |
2491 | ||
2492 | qemu_mutex_lock_iothread(); | |
2493 | ||
2494 | /* Reset dirty so this doesn't happen later. */ | |
2495 | cpu_physical_memory_test_and_clear_dirty(offset, size, 1); | |
2496 | ||
2497 | if (section.mr != mr) { | |
2498 | /* memory_region_find add a ref on section.mr */ | |
2499 | memory_region_unref(section.mr); | |
2500 | if (MMIO_INTERFACE(section.mr->owner)) { | |
2501 | /* We found the interface just drop it. */ | |
2502 | object_property_set_bool(section.mr->owner, false, "realized", | |
2503 | NULL); | |
2504 | object_unref(section.mr->owner); | |
2505 | object_unparent(section.mr->owner); | |
2506 | } | |
2507 | } | |
2508 | ||
2509 | qemu_mutex_unlock_iothread(); | |
2510 | ||
2511 | if (invalidate_data->allocated) { | |
2512 | g_free(invalidate_data); | |
2513 | } else { | |
2514 | invalidate_data->busy = 0; | |
2515 | } | |
2516 | } | |
2517 | ||
2518 | void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset, | |
2519 | unsigned size) | |
2520 | { | |
2521 | size_t i; | |
2522 | MMIOPtrInvalidate *invalidate_data = NULL; | |
2523 | ||
2524 | for (i = 0; i < MAX_MMIO_INVALIDATE; i++) { | |
2525 | if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) { | |
2526 | invalidate_data = &mmio_ptr_invalidate_list[i]; | |
2527 | break; | |
2528 | } | |
2529 | } | |
2530 | ||
2531 | if (!invalidate_data) { | |
2532 | invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate)); | |
2533 | invalidate_data->allocated = 1; | |
2534 | } | |
2535 | ||
2536 | invalidate_data->mr = mr; | |
2537 | invalidate_data->offset = offset; | |
2538 | invalidate_data->size = size; | |
2539 | ||
2540 | async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr, | |
2541 | RUN_ON_CPU_HOST_PTR(invalidate_data)); | |
2542 | } | |
2543 | ||
2544 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) | |
2545 | { | |
2546 | memory_region_ref(root); | |
2547 | memory_region_transaction_begin(); | |
2548 | as->ref_count = 1; | |
2549 | as->root = root; | |
2550 | as->malloced = false; | |
2551 | as->current_map = g_new(FlatView, 1); | |
2552 | flatview_init(as->current_map); | |
2553 | as->ioeventfd_nb = 0; | |
2554 | as->ioeventfds = NULL; | |
2555 | QTAILQ_INIT(&as->listeners); | |
2556 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); | |
2557 | as->name = g_strdup(name ? name : "anonymous"); | |
2558 | address_space_init_dispatch(as); | |
2559 | memory_region_update_pending |= root->enabled; | |
2560 | memory_region_transaction_commit(); | |
2561 | } | |
2562 | ||
2563 | static void do_address_space_destroy(AddressSpace *as) | |
2564 | { | |
2565 | bool do_free = as->malloced; | |
2566 | ||
2567 | address_space_destroy_dispatch(as); | |
2568 | assert(QTAILQ_EMPTY(&as->listeners)); | |
2569 | ||
2570 | flatview_unref(as->current_map); | |
2571 | g_free(as->name); | |
2572 | g_free(as->ioeventfds); | |
2573 | memory_region_unref(as->root); | |
2574 | if (do_free) { | |
2575 | g_free(as); | |
2576 | } | |
2577 | } | |
2578 | ||
2579 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2580 | { | |
2581 | AddressSpace *as; | |
2582 | ||
2583 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2584 | if (root == as->root && as->malloced) { | |
2585 | as->ref_count++; | |
2586 | return as; | |
2587 | } | |
2588 | } | |
2589 | ||
2590 | as = g_malloc0(sizeof *as); | |
2591 | address_space_init(as, root, name); | |
2592 | as->malloced = true; | |
2593 | return as; | |
2594 | } | |
2595 | ||
2596 | void address_space_destroy(AddressSpace *as) | |
2597 | { | |
2598 | MemoryRegion *root = as->root; | |
2599 | ||
2600 | as->ref_count--; | |
2601 | if (as->ref_count) { | |
2602 | return; | |
2603 | } | |
2604 | /* Flush out anything from MemoryListeners listening in on this */ | |
2605 | memory_region_transaction_begin(); | |
2606 | as->root = NULL; | |
2607 | memory_region_transaction_commit(); | |
2608 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
2609 | address_space_unregister(as); | |
2610 | ||
2611 | /* At this point, as->dispatch and as->current_map are dummy | |
2612 | * entries that the guest should never use. Wait for the old | |
2613 | * values to expire before freeing the data. | |
2614 | */ | |
2615 | as->root = root; | |
2616 | call_rcu(as, do_address_space_destroy, rcu); | |
2617 | } | |
2618 | ||
2619 | static const char *memory_region_type(MemoryRegion *mr) | |
2620 | { | |
2621 | if (memory_region_is_ram_device(mr)) { | |
2622 | return "ramd"; | |
2623 | } else if (memory_region_is_romd(mr)) { | |
2624 | return "romd"; | |
2625 | } else if (memory_region_is_rom(mr)) { | |
2626 | return "rom"; | |
2627 | } else if (memory_region_is_ram(mr)) { | |
2628 | return "ram"; | |
2629 | } else { | |
2630 | return "i/o"; | |
2631 | } | |
2632 | } | |
2633 | ||
2634 | typedef struct MemoryRegionList MemoryRegionList; | |
2635 | ||
2636 | struct MemoryRegionList { | |
2637 | const MemoryRegion *mr; | |
2638 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
2639 | }; | |
2640 | ||
2641 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
2642 | ||
2643 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ | |
2644 | int128_sub((size), int128_one())) : 0) | |
2645 | #define MTREE_INDENT " " | |
2646 | ||
2647 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
2648 | const MemoryRegion *mr, unsigned int level, | |
2649 | hwaddr base, | |
2650 | MemoryRegionListHead *alias_print_queue) | |
2651 | { | |
2652 | MemoryRegionList *new_ml, *ml, *next_ml; | |
2653 | MemoryRegionListHead submr_print_queue; | |
2654 | const MemoryRegion *submr; | |
2655 | unsigned int i; | |
2656 | hwaddr cur_start, cur_end; | |
2657 | ||
2658 | if (!mr) { | |
2659 | return; | |
2660 | } | |
2661 | ||
2662 | for (i = 0; i < level; i++) { | |
2663 | mon_printf(f, MTREE_INDENT); | |
2664 | } | |
2665 | ||
2666 | cur_start = base + mr->addr; | |
2667 | cur_end = cur_start + MR_SIZE(mr->size); | |
2668 | ||
2669 | /* | |
2670 | * Try to detect overflow of memory region. This should never | |
2671 | * happen normally. When it happens, we dump something to warn the | |
2672 | * user who is observing this. | |
2673 | */ | |
2674 | if (cur_start < base || cur_end < cur_start) { | |
2675 | mon_printf(f, "[DETECTED OVERFLOW!] "); | |
2676 | } | |
2677 | ||
2678 | if (mr->alias) { | |
2679 | MemoryRegionList *ml; | |
2680 | bool found = false; | |
2681 | ||
2682 | /* check if the alias is already in the queue */ | |
2683 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { | |
2684 | if (ml->mr == mr->alias) { | |
2685 | found = true; | |
2686 | } | |
2687 | } | |
2688 | ||
2689 | if (!found) { | |
2690 | ml = g_new(MemoryRegionList, 1); | |
2691 | ml->mr = mr->alias; | |
2692 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); | |
2693 | } | |
2694 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx | |
2695 | " (prio %d, %s): alias %s @%s " TARGET_FMT_plx | |
2696 | "-" TARGET_FMT_plx "%s\n", | |
2697 | cur_start, cur_end, | |
2698 | mr->priority, | |
2699 | memory_region_type((MemoryRegion *)mr), | |
2700 | memory_region_name(mr), | |
2701 | memory_region_name(mr->alias), | |
2702 | mr->alias_offset, | |
2703 | mr->alias_offset + MR_SIZE(mr->size), | |
2704 | mr->enabled ? "" : " [disabled]"); | |
2705 | } else { | |
2706 | mon_printf(f, | |
2707 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n", | |
2708 | cur_start, cur_end, | |
2709 | mr->priority, | |
2710 | memory_region_type((MemoryRegion *)mr), | |
2711 | memory_region_name(mr), | |
2712 | mr->enabled ? "" : " [disabled]"); | |
2713 | } | |
2714 | ||
2715 | QTAILQ_INIT(&submr_print_queue); | |
2716 | ||
2717 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { | |
2718 | new_ml = g_new(MemoryRegionList, 1); | |
2719 | new_ml->mr = submr; | |
2720 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2721 | if (new_ml->mr->addr < ml->mr->addr || | |
2722 | (new_ml->mr->addr == ml->mr->addr && | |
2723 | new_ml->mr->priority > ml->mr->priority)) { | |
2724 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
2725 | new_ml = NULL; | |
2726 | break; | |
2727 | } | |
2728 | } | |
2729 | if (new_ml) { | |
2730 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
2731 | } | |
2732 | } | |
2733 | ||
2734 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2735 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start, | |
2736 | alias_print_queue); | |
2737 | } | |
2738 | ||
2739 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { | |
2740 | g_free(ml); | |
2741 | } | |
2742 | } | |
2743 | ||
2744 | static void mtree_print_flatview(fprintf_function p, void *f, | |
2745 | AddressSpace *as) | |
2746 | { | |
2747 | FlatView *view = address_space_get_flatview(as); | |
2748 | FlatRange *range = &view->ranges[0]; | |
2749 | MemoryRegion *mr; | |
2750 | int n = view->nr; | |
2751 | ||
2752 | if (n <= 0) { | |
2753 | p(f, MTREE_INDENT "No rendered FlatView for " | |
2754 | "address space '%s'\n", as->name); | |
2755 | flatview_unref(view); | |
2756 | return; | |
2757 | } | |
2758 | ||
2759 | while (n--) { | |
2760 | mr = range->mr; | |
2761 | if (range->offset_in_region) { | |
2762 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2763 | TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n", | |
2764 | int128_get64(range->addr.start), | |
2765 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2766 | mr->priority, | |
2767 | range->readonly ? "rom" : memory_region_type(mr), | |
2768 | memory_region_name(mr), | |
2769 | range->offset_in_region); | |
2770 | } else { | |
2771 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2772 | TARGET_FMT_plx " (prio %d, %s): %s\n", | |
2773 | int128_get64(range->addr.start), | |
2774 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2775 | mr->priority, | |
2776 | range->readonly ? "rom" : memory_region_type(mr), | |
2777 | memory_region_name(mr)); | |
2778 | } | |
2779 | range++; | |
2780 | } | |
2781 | ||
2782 | flatview_unref(view); | |
2783 | } | |
2784 | ||
2785 | void mtree_info(fprintf_function mon_printf, void *f, bool flatview) | |
2786 | { | |
2787 | MemoryRegionListHead ml_head; | |
2788 | MemoryRegionList *ml, *ml2; | |
2789 | AddressSpace *as; | |
2790 | ||
2791 | if (flatview) { | |
2792 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2793 | mon_printf(f, "address-space (flat view): %s\n", as->name); | |
2794 | mtree_print_flatview(mon_printf, f, as); | |
2795 | mon_printf(f, "\n"); | |
2796 | } | |
2797 | return; | |
2798 | } | |
2799 | ||
2800 | QTAILQ_INIT(&ml_head); | |
2801 | ||
2802 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2803 | mon_printf(f, "address-space: %s\n", as->name); | |
2804 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2805 | mon_printf(f, "\n"); | |
2806 | } | |
2807 | ||
2808 | /* print aliased regions */ | |
2809 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
2810 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); | |
2811 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2812 | mon_printf(f, "\n"); | |
2813 | } | |
2814 | ||
2815 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
2816 | g_free(ml); | |
2817 | } | |
2818 | } | |
2819 | ||
2820 | static const TypeInfo memory_region_info = { | |
2821 | .parent = TYPE_OBJECT, | |
2822 | .name = TYPE_MEMORY_REGION, | |
2823 | .instance_size = sizeof(MemoryRegion), | |
2824 | .instance_init = memory_region_initfn, | |
2825 | .instance_finalize = memory_region_finalize, | |
2826 | }; | |
2827 | ||
2828 | static void memory_register_types(void) | |
2829 | { | |
2830 | type_register_static(&memory_region_info); | |
2831 | } | |
2832 | ||
2833 | type_init(memory_register_types) |