projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 5fd2087a AF |
1 | /* |
| 2 | * QEMU x86 CPU | |
| 3 | * | |
| 4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
| 5 | * | |
| 6 | * This library is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU Lesser General Public | |
| 8 | * License as published by the Free Software Foundation; either | |
| 9 | * version 2.1 of the License, or (at your option) any later version. | |
| 10 | * | |
| 11 | * This library is distributed in the hope that it will be useful, | |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 14 | * Lesser General Public License for more details. | |
| 15 | * | |
| 16 | * You should have received a copy of the GNU Lesser General Public | |
| 17 | * License along with this library; if not, see | |
| 18 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
| 19 | */ | |
| 20 | #ifndef QEMU_I386_CPU_QOM_H | |
| 21 | #define QEMU_I386_CPU_QOM_H | |
| 22 | ||
| 2e5b09fd | 23 | #include "hw/core/cpu.h" |
| f809c605 | 24 | #include "qemu/notify.h" |
| db1015e9 | 25 | #include "qom/object.h" |
| 5fd2087a AF |
26 | |
| 27 | #ifdef TARGET_X86_64 | |
| 28 | #define TYPE_X86_CPU "x86_64-cpu" | |
| 29 | #else | |
| 30 | #define TYPE_X86_CPU "i386-cpu" | |
| 31 | #endif | |
| 32 | ||
| 9295b1aa | 33 | OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU) |
| 5fd2087a | 34 | |
| dcafd1ef | 35 | typedef struct X86CPUModel X86CPUModel; |
| d940ee9b | 36 | |
| 5fd2087a AF |
37 | /** |
| 38 | * X86CPUClass: | |
| d940ee9b | 39 | * @cpu_def: CPU model definition |
| d6dcc558 | 40 | * @host_cpuid_required: Whether CPU model requires cpuid from host. |
| f48c8837 | 41 | * @ordering: Ordering on the "-cpu help" CPU model list. |
| bd72159d | 42 | * @migration_safe: See CpuDefinitionInfo::migration_safe |
| 5adbed30 | 43 | * @static_model: See CpuDefinitionInfo::static |
| 2b6f294c | 44 | * @parent_realize: The parent class' realize handler. |
| e86787d3 | 45 | * @parent_phases: The parent class' reset phase handlers. |
| 5fd2087a AF |
46 | * |
| 47 | * An x86 CPU model or family. | |
| 48 | */ | |
| db1015e9 | 49 | struct X86CPUClass { |
| 5fd2087a AF |
50 | /*< private >*/ |
| 51 | CPUClass parent_class; | |
| 52 | /*< public >*/ | |
| 53 | ||
| 0bacd8b3 EH |
54 | /* CPU definition, automatically loaded by instance_init if not NULL. |
| 55 | * Should be eventually replaced by subclass-specific property defaults. | |
| 56 | */ | |
| dcafd1ef | 57 | X86CPUModel *model; |
| d940ee9b | 58 | |
| d6dcc558 | 59 | bool host_cpuid_required; |
| f48c8837 | 60 | int ordering; |
| bd72159d | 61 | bool migration_safe; |
| 5adbed30 | 62 | bool static_model; |
| d940ee9b | 63 | |
| ee465a3e EH |
64 | /* Optional description of CPU model. |
| 65 | * If unavailable, cpu_def->model_id is used */ | |
| 66 | const char *model_description; | |
| 67 | ||
| 2b6f294c | 68 | DeviceRealize parent_realize; |
| 7bbc124e | 69 | DeviceUnrealize parent_unrealize; |
| e86787d3 | 70 | ResettablePhases parent_phases; |
| db1015e9 | 71 | }; |
| 5fd2087a | 72 | |
| 374e0cd4 | 73 | |
| 5fd2087a | 74 | #endif |