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f1020c2c BR |
1 | /* |
2 | * CPU core abstract device | |
3 | * | |
4 | * Copyright (C) 2016 Bharata B Rao <[email protected]> | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
7 | * See the COPYING file in the top-level directory. | |
8 | */ | |
0b8fa32f | 9 | |
e9808d09 | 10 | #include "qemu/osdep.h" |
f1020c2c BR |
11 | #include "hw/cpu/core.h" |
12 | #include "qapi/visitor.h" | |
0b8fa32f | 13 | #include "qemu/module.h" |
f1020c2c BR |
14 | #include "qapi/error.h" |
15 | #include "sysemu/cpus.h" | |
5cc8767d | 16 | #include "hw/boards.h" |
f1020c2c BR |
17 | |
18 | static void core_prop_get_core_id(Object *obj, Visitor *v, const char *name, | |
19 | void *opaque, Error **errp) | |
20 | { | |
21 | CPUCore *core = CPU_CORE(obj); | |
22 | int64_t value = core->core_id; | |
23 | ||
24 | visit_type_int(v, name, &value, errp); | |
25 | } | |
26 | ||
27 | static void core_prop_set_core_id(Object *obj, Visitor *v, const char *name, | |
28 | void *opaque, Error **errp) | |
29 | { | |
30 | CPUCore *core = CPU_CORE(obj); | |
f1020c2c BR |
31 | int64_t value; |
32 | ||
668f62ec | 33 | if (!visit_type_int(v, name, &value, errp)) { |
f1020c2c BR |
34 | return; |
35 | } | |
36 | ||
be2960ba LV |
37 | if (value < 0) { |
38 | error_setg(errp, "Invalid core id %"PRId64, value); | |
39 | return; | |
40 | } | |
41 | ||
f1020c2c BR |
42 | core->core_id = value; |
43 | } | |
44 | ||
45 | static void core_prop_get_nr_threads(Object *obj, Visitor *v, const char *name, | |
46 | void *opaque, Error **errp) | |
47 | { | |
48 | CPUCore *core = CPU_CORE(obj); | |
49 | int64_t value = core->nr_threads; | |
50 | ||
51 | visit_type_int(v, name, &value, errp); | |
52 | } | |
53 | ||
54 | static void core_prop_set_nr_threads(Object *obj, Visitor *v, const char *name, | |
55 | void *opaque, Error **errp) | |
56 | { | |
57 | CPUCore *core = CPU_CORE(obj); | |
f1020c2c BR |
58 | int64_t value; |
59 | ||
668f62ec | 60 | if (!visit_type_int(v, name, &value, errp)) { |
f1020c2c BR |
61 | return; |
62 | } | |
63 | ||
64 | core->nr_threads = value; | |
65 | } | |
66 | ||
67 | static void cpu_core_instance_init(Object *obj) | |
68 | { | |
69 | CPUCore *core = CPU_CORE(obj); | |
70 | ||
0b47ec4b GK |
71 | /* |
72 | * Only '-device something-cpu-core,help' can get us there before | |
73 | * the machine has been created. We don't care to set nr_threads | |
74 | * in this case since it isn't used afterwards. | |
75 | */ | |
76 | if (current_machine) { | |
77 | core->nr_threads = current_machine->smp.threads; | |
78 | } | |
f1020c2c BR |
79 | } |
80 | ||
ba31cc72 TH |
81 | static void cpu_core_class_init(ObjectClass *oc, void *data) |
82 | { | |
83 | DeviceClass *dc = DEVICE_CLASS(oc); | |
84 | ||
85 | set_bit(DEVICE_CATEGORY_CPU, dc->categories); | |
2decc51f EH |
86 | object_class_property_add(oc, "core-id", "int", core_prop_get_core_id, |
87 | core_prop_set_core_id, NULL, NULL); | |
88 | object_class_property_add(oc, "nr-threads", "int", core_prop_get_nr_threads, | |
89 | core_prop_set_nr_threads, NULL, NULL); | |
ba31cc72 TH |
90 | } |
91 | ||
f1020c2c BR |
92 | static const TypeInfo cpu_core_type_info = { |
93 | .name = TYPE_CPU_CORE, | |
94 | .parent = TYPE_DEVICE, | |
95 | .abstract = true, | |
ba31cc72 | 96 | .class_init = cpu_core_class_init, |
f1020c2c BR |
97 | .instance_size = sizeof(CPUCore), |
98 | .instance_init = cpu_core_instance_init, | |
99 | }; | |
100 | ||
101 | static void cpu_core_register_types(void) | |
102 | { | |
103 | type_register_static(&cpu_core_type_info); | |
104 | } | |
105 | ||
106 | type_init(cpu_core_register_types) |