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79638566 FB |
1 | /* |
2 | * dyngen defines for micro operation code | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
79638566 | 18 | */ |
67867308 FB |
19 | #if !defined(__DYNGEN_EXEC_H__) |
20 | #define __DYNGEN_EXEC_H__ | |
21 | ||
47b01cf3 | 22 | #include "qemu-common.h" |
513b500f | 23 | |
128ab2ff BS |
24 | #ifdef __OpenBSD__ |
25 | #include <sys/types.h> | |
128ab2ff | 26 | #endif |
79638566 | 27 | |
1057eaa7 | 28 | /* XXX: This may be wrong for 64-bit ILP32 hosts. */ |
c227f099 | 29 | typedef void * host_reg_t; |
1057eaa7 | 30 | |
522777bb | 31 | #if defined(__i386__) |
79638566 | 32 | #define AREG0 "ebp" |
522777bb | 33 | #elif defined(__x86_64__) |
43024c6a | 34 | #define AREG0 "r14" |
e58ffeb3 | 35 | #elif defined(_ARCH_PPC) |
79638566 | 36 | #define AREG0 "r27" |
522777bb | 37 | #elif defined(__arm__) |
79638566 | 38 | #define AREG0 "r7" |
f54b3f92 AJ |
39 | #elif defined(__hppa__) |
40 | #define AREG0 "r17" | |
522777bb | 41 | #elif defined(__mips__) |
60bf84cf | 42 | #define AREG0 "s0" |
522777bb | 43 | #elif defined(__sparc__) |
dfe5fff3 | 44 | #ifdef CONFIG_SOLARIS |
fdbb4691 | 45 | #define AREG0 "g2" |
fdbb4691 | 46 | #else |
74ccb34e | 47 | #ifdef __sparc_v9__ |
e97b640d | 48 | #define AREG0 "g5" |
74ccb34e | 49 | #else |
79638566 | 50 | #define AREG0 "g6" |
fdbb4691 | 51 | #endif |
74ccb34e | 52 | #endif |
522777bb | 53 | #elif defined(__s390__) |
79638566 | 54 | #define AREG0 "r10" |
522777bb | 55 | #elif defined(__alpha__) |
79638566 FB |
56 | /* Note $15 is the frame pointer, so anything in op-i386.c that would |
57 | require a frame pointer, like alloca, would probably loose. */ | |
58 | #define AREG0 "$15" | |
522777bb | 59 | #elif defined(__mc68000) |
38e584a0 | 60 | #define AREG0 "%a5" |
522777bb | 61 | #elif defined(__ia64__) |
b8076a74 | 62 | #define AREG0 "r7" |
522777bb TS |
63 | #else |
64 | #error unsupported CPU | |
79638566 FB |
65 | #endif |
66 | ||
3e457172 BS |
67 | register CPUState *env asm(AREG0); |
68 | ||
79638566 FB |
69 | #define xglue(x, y) x ## y |
70 | #define glue(x, y) xglue(x, y) | |
9621339d FB |
71 | #define stringify(s) tostring(s) |
72 | #define tostring(s) #s | |
79638566 | 73 | |
9b7b85d2 PB |
74 | /* The return address may point to the start of the next instruction. |
75 | Subtracting one gets us the call instruction itself. */ | |
2827822e | 76 | #if defined(__s390__) && !defined(__s390x__) |
9b7b85d2 PB |
77 | # define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1)) |
78 | #elif defined(__arm__) | |
79 | /* Thumb return addresses have the low bit set, so we need to subtract two. | |
80 | This is still safe in ARM mode because instructions are 4 bytes. */ | |
81 | # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2)) | |
82 | #else | |
83 | # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1)) | |
84 | #endif | |
85 | ||
67867308 | 86 | #endif /* !defined(__DYNGEN_EXEC_H__) */ |