[qemu.git] / hw / mcf.h

#ifndef HW_MCF_H
#define HW_MCF_H
/* Motorola ColdFire device prototypes.  */

struct MemoryRegion;

/* mcf_uart.c */
uint64_t mcf_uart_read(void *opaque, hwaddr addr,
                       unsigned size);
void mcf_uart_write(void *opaque, hwaddr addr,
                    uint64_t val, unsigned size);
void *mcf_uart_init(qemu_irq irq, CharDriverState *chr);
void mcf_uart_mm_init(struct MemoryRegion *sysmem,
                      hwaddr base,
                      qemu_irq irq, CharDriverState *chr);

/* mcf_intc.c */
qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,
                        hwaddr base,
                        M68kCPU *cpu);

/* mcf_fec.c */
void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
                  hwaddr base, qemu_irq *irq);

/* mcf5206.c */
qemu_irq *mcf5206_init(struct MemoryRegion *sysmem,
                       uint32_t base, M68kCPU *cpu);

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_MCF_H
	2	#define HW_MCF_H
	3	/* Motorola ColdFire device prototypes. */
	4
653fa85c BC	5	struct MemoryRegion;
653fa85c BC	6
87ecb68b	7	/* mcf_uart.c */
a8170e5e	8	uint64_t mcf_uart_read(void *opaque, hwaddr addr,
aa6e4986	9	unsigned size);
a8170e5e	10	void mcf_uart_write(void *opaque, hwaddr addr,
aa6e4986	11	uint64_t val, unsigned size);
87ecb68b	12	void mcf_uart_init(qemu_irq irq, CharDriverState chr);
aa6e4986	13	void mcf_uart_mm_init(struct MemoryRegion *sysmem,
a8170e5e	14	hwaddr base,
aa6e4986	15	qemu_irq irq, CharDriverState *chr);
87ecb68b PB	16
87ecb68b PB	17	/* mcf_intc.c */
663d9446	18	qemu_irq mcf_intc_init(struct MemoryRegion sysmem,
a8170e5e	19	hwaddr base,
9a6ee9fd	20	M68kCPU *cpu);
87ecb68b PB	21
87ecb68b PB	22	/* mcf_fec.c */
c65fc1df	23	void mcf_fec_init(struct MemoryRegion sysmem, NICInfo nd,
a8170e5e	24	hwaddr base, qemu_irq *irq);
87ecb68b PB	25
87ecb68b PB	26	/* mcf5206.c */
653fa85c	27	qemu_irq mcf5206_init(struct MemoryRegion sysmem,
4025cfd5	28	uint32_t base, M68kCPU *cpu);
87ecb68b PB	29
87ecb68b PB	30	#endif