]>
Commit | Line | Data |
---|---|---|
039d3da3 FB |
1 | /* |
2 | * Example of use of user mode libqemu: launch a basic .com DOS | |
3 | * executable | |
4 | */ | |
5 | #include <stdlib.h> | |
6 | #include <stdio.h> | |
7 | #include <string.h> | |
8 | #include <inttypes.h> | |
9 | #include <unistd.h> | |
10 | #include <fcntl.h> | |
11 | #include <sys/mman.h> | |
12 | #include <signal.h> | |
13 | ||
14 | #include "cpu.h" | |
15 | ||
16 | //#define SIGTEST | |
17 | ||
18 | CPUState *cpu_single_env = NULL; | |
19 | ||
20 | void cpu_outb(CPUState *env, int addr, int val) | |
21 | { | |
22 | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); | |
23 | } | |
24 | ||
25 | void cpu_outw(CPUState *env, int addr, int val) | |
26 | { | |
27 | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val); | |
28 | } | |
29 | ||
30 | void cpu_outl(CPUState *env, int addr, int val) | |
31 | { | |
32 | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val); | |
33 | } | |
34 | ||
35 | int cpu_inb(CPUState *env, int addr) | |
36 | { | |
37 | fprintf(stderr, "inb: port=0x%04x\n", addr); | |
38 | return 0; | |
39 | } | |
40 | ||
41 | int cpu_inw(CPUState *env, int addr) | |
42 | { | |
43 | fprintf(stderr, "inw: port=0x%04x\n", addr); | |
44 | return 0; | |
45 | } | |
46 | ||
47 | int cpu_inl(CPUState *env, int addr) | |
48 | { | |
49 | fprintf(stderr, "inl: port=0x%04x\n", addr); | |
50 | return 0; | |
51 | } | |
52 | ||
53 | int cpu_get_pic_interrupt(CPUState *env) | |
54 | { | |
55 | return -1; | |
56 | } | |
57 | ||
28ab0e2e FB |
58 | uint64_t cpu_get_tsc(CPUState *env) |
59 | { | |
60 | return 0; | |
61 | } | |
62 | ||
039d3da3 FB |
63 | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
64 | unsigned long addr, unsigned int sel) | |
65 | { | |
66 | unsigned int e1, e2; | |
67 | e1 = (addr & 0xffff) | (sel << 16); | |
68 | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); | |
69 | stl((uint8_t *)ptr, e1); | |
70 | stl((uint8_t *)ptr + 4, e2); | |
71 | } | |
72 | ||
73 | uint64_t idt_table[256]; | |
74 | ||
75 | /* only dpl matters as we do only user space emulation */ | |
76 | static void set_idt(int n, unsigned int dpl) | |
77 | { | |
78 | set_gate(idt_table + n, 0, dpl, 0, 0); | |
79 | } | |
80 | ||
81 | void qemu_free(void *ptr) | |
82 | { | |
83 | free(ptr); | |
84 | } | |
85 | ||
86 | void *qemu_malloc(size_t size) | |
87 | { | |
88 | return malloc(size); | |
89 | } | |
90 | ||
91 | void qemu_printf(const char *fmt, ...) | |
92 | { | |
93 | va_list ap; | |
94 | va_start(ap, fmt); | |
95 | vprintf(fmt, ap); | |
96 | va_end(ap); | |
97 | } | |
98 | ||
99 | /* XXX: this is a bug in helper2.c */ | |
100 | int errno; | |
101 | ||
102 | /**********************************************/ | |
103 | ||
104 | #define COM_BASE_ADDR 0x10100 | |
105 | ||
106 | void usage(void) | |
107 | { | |
108 | printf("qruncom version 0.1 (c) 2003 Fabrice Bellard\n" | |
109 | "usage: qruncom file.com\n" | |
110 | "user mode libqemu demo: run simple .com DOS executables\n"); | |
111 | exit(1); | |
112 | } | |
113 | ||
114 | static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg) | |
115 | { | |
116 | return (uint8_t *)((seg << 4) + (reg & 0xffff)); | |
117 | } | |
118 | ||
119 | static inline void pushw(CPUState *env, int val) | |
120 | { | |
121 | env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | ((env->regs[R_ESP] - 2) & 0xffff); | |
122 | *(uint16_t *)seg_to_linear(env->segs[R_SS].selector, env->regs[R_ESP]) = val; | |
123 | } | |
124 | ||
125 | static void host_segv_handler(int host_signum, siginfo_t *info, | |
126 | void *puc) | |
127 | { | |
128 | if (cpu_signal_handler(host_signum, info, puc)) { | |
129 | return; | |
130 | } | |
131 | abort(); | |
132 | } | |
133 | ||
134 | int main(int argc, char **argv) | |
135 | { | |
136 | uint8_t *vm86_mem; | |
137 | const char *filename; | |
138 | int fd, ret, seg; | |
139 | CPUState *env; | |
140 | ||
141 | if (argc != 2) | |
142 | usage(); | |
143 | filename = argv[1]; | |
144 | ||
145 | vm86_mem = mmap((void *)0x00000000, 0x110000, | |
146 | PROT_WRITE | PROT_READ | PROT_EXEC, | |
147 | MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0); | |
148 | if (vm86_mem == MAP_FAILED) { | |
149 | perror("mmap"); | |
150 | exit(1); | |
151 | } | |
152 | ||
153 | /* load the MSDOS .com executable */ | |
154 | fd = open(filename, O_RDONLY); | |
155 | if (fd < 0) { | |
156 | perror(filename); | |
157 | exit(1); | |
158 | } | |
159 | ret = read(fd, vm86_mem + COM_BASE_ADDR, 65536 - 256); | |
160 | if (ret < 0) { | |
161 | perror("read"); | |
162 | exit(1); | |
163 | } | |
164 | close(fd); | |
165 | ||
166 | /* install exception handler for CPU emulator */ | |
167 | { | |
168 | struct sigaction act; | |
169 | ||
170 | sigfillset(&act.sa_mask); | |
171 | act.sa_flags = SA_SIGINFO; | |
172 | // act.sa_flags |= SA_ONSTACK; | |
173 | ||
174 | act.sa_sigaction = host_segv_handler; | |
175 | sigaction(SIGSEGV, &act, NULL); | |
176 | sigaction(SIGBUS, &act, NULL); | |
177 | #if defined (TARGET_I386) && defined(USE_CODE_COPY) | |
178 | sigaction(SIGFPE, &act, NULL); | |
179 | #endif | |
180 | } | |
181 | ||
182 | // cpu_set_log(CPU_LOG_TB_IN_ASM | CPU_LOG_TB_OUT_ASM | CPU_LOG_EXEC); | |
183 | ||
184 | env = cpu_init(); | |
185 | ||
186 | /* disable code copy to simplify debugging */ | |
187 | code_copy_enabled = 0; | |
188 | ||
189 | /* set user mode state (XXX: should be done automatically by | |
190 | cpu_init ?) */ | |
191 | env->user_mode_only = 1; | |
192 | ||
193 | cpu_x86_set_cpl(env, 3); | |
194 | ||
195 | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; | |
196 | /* NOTE: hflags duplicates some of the virtual CPU state */ | |
197 | env->hflags |= HF_PE_MASK | VM_MASK; | |
198 | ||
199 | /* flags setup : we activate the IRQs by default as in user | |
200 | mode. We also activate the VM86 flag to run DOS code */ | |
201 | env->eflags |= IF_MASK | VM_MASK; | |
202 | ||
203 | /* init basic registers */ | |
204 | env->eip = 0x100; | |
205 | env->regs[R_ESP] = 0xfffe; | |
206 | seg = (COM_BASE_ADDR - 0x100) >> 4; | |
207 | ||
208 | cpu_x86_load_seg_cache(env, R_CS, seg, | |
209 | (uint8_t *)(seg << 4), 0xffff, 0); | |
210 | cpu_x86_load_seg_cache(env, R_SS, seg, | |
211 | (uint8_t *)(seg << 4), 0xffff, 0); | |
212 | cpu_x86_load_seg_cache(env, R_DS, seg, | |
213 | (uint8_t *)(seg << 4), 0xffff, 0); | |
214 | cpu_x86_load_seg_cache(env, R_ES, seg, | |
215 | (uint8_t *)(seg << 4), 0xffff, 0); | |
216 | cpu_x86_load_seg_cache(env, R_FS, seg, | |
217 | (uint8_t *)(seg << 4), 0xffff, 0); | |
218 | cpu_x86_load_seg_cache(env, R_GS, seg, | |
219 | (uint8_t *)(seg << 4), 0xffff, 0); | |
220 | ||
221 | /* exception support */ | |
222 | env->idt.base = (void *)idt_table; | |
223 | env->idt.limit = sizeof(idt_table) - 1; | |
224 | set_idt(0, 0); | |
225 | set_idt(1, 0); | |
226 | set_idt(2, 0); | |
227 | set_idt(3, 3); | |
228 | set_idt(4, 3); | |
229 | set_idt(5, 3); | |
230 | set_idt(6, 0); | |
231 | set_idt(7, 0); | |
232 | set_idt(8, 0); | |
233 | set_idt(9, 0); | |
234 | set_idt(10, 0); | |
235 | set_idt(11, 0); | |
236 | set_idt(12, 0); | |
237 | set_idt(13, 0); | |
238 | set_idt(14, 0); | |
239 | set_idt(15, 0); | |
240 | set_idt(16, 0); | |
241 | set_idt(17, 0); | |
242 | set_idt(18, 0); | |
243 | set_idt(19, 0); | |
244 | ||
245 | /* put return code */ | |
246 | *seg_to_linear(env->segs[R_CS].selector, 0) = 0xb4; /* mov ah, $0 */ | |
247 | *seg_to_linear(env->segs[R_CS].selector, 1) = 0x00; | |
248 | *seg_to_linear(env->segs[R_CS].selector, 2) = 0xcd; /* int $0x21 */ | |
249 | *seg_to_linear(env->segs[R_CS].selector, 3) = 0x21; | |
250 | pushw(env, 0x0000); | |
251 | ||
252 | /* the value of these registers seem to be assumed by pi_10.com */ | |
253 | env->regs[R_ESI] = 0x100; | |
254 | env->regs[R_ECX] = 0xff; | |
255 | env->regs[R_EBP] = 0x0900; | |
256 | env->regs[R_EDI] = 0xfffe; | |
257 | ||
258 | /* inform the emulator of the mmaped memory */ | |
259 | page_set_flags(0x00000000, 0x110000, | |
260 | PAGE_WRITE | PAGE_READ | PAGE_EXEC | PAGE_VALID); | |
261 | ||
262 | for(;;) { | |
263 | ret = cpu_x86_exec(env); | |
264 | switch(ret) { | |
265 | case EXCP0D_GPF: | |
266 | { | |
267 | int int_num, ah; | |
268 | int_num = *(env->segs[R_CS].base + env->eip + 1); | |
269 | if (int_num != 0x21) | |
270 | goto unknown_int; | |
271 | ah = (env->regs[R_EAX] >> 8) & 0xff; | |
272 | switch(ah) { | |
273 | case 0x00: /* exit */ | |
274 | exit(0); | |
275 | case 0x02: /* write char */ | |
276 | { | |
277 | uint8_t c = env->regs[R_EDX]; | |
278 | write(1, &c, 1); | |
279 | } | |
280 | break; | |
281 | case 0x09: /* write string */ | |
282 | { | |
283 | uint8_t c; | |
284 | for(;;) { | |
285 | c = *seg_to_linear(env->segs[R_DS].selector, env->regs[R_EAX]); | |
286 | if (c == '$') | |
287 | break; | |
288 | write(1, &c, 1); | |
289 | } | |
290 | env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | '$'; | |
291 | } | |
292 | break; | |
293 | default: | |
294 | unknown_int: | |
295 | fprintf(stderr, "unsupported int 0x%02x\n", int_num); | |
296 | cpu_dump_state(env, stderr, 0); | |
297 | // exit(1); | |
298 | } | |
299 | env->eip += 2; | |
300 | } | |
301 | break; | |
302 | default: | |
303 | fprintf(stderr, "unhandled cpu_exec return code (0x%x)\n", ret); | |
304 | cpu_dump_state(env, stderr, 0); | |
305 | exit(1); | |
306 | } | |
307 | } | |
308 | } |