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87ecb68b PB |
1 | /* |
2 | * Misc ARM declarations | |
3 | * | |
4 | * Copyright (c) 2006 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
7 | * This code is licenced under the LGPL. | |
8 | * | |
9 | */ | |
10 | ||
11 | #ifndef ARM_MISC_H | |
12 | #define ARM_MISC_H 1 | |
13 | ||
14 | /* The CPU is also modeled as an interrupt controller. */ | |
15 | #define ARM_PIC_CPU_IRQ 0 | |
16 | #define ARM_PIC_CPU_FIQ 1 | |
17 | qemu_irq *arm_pic_init_cpu(CPUState *env); | |
18 | ||
19 | /* armv7m.c */ | |
20 | qemu_irq *armv7m_init(int flash_size, int sram_size, | |
21 | const char *kernel_filename, const char *cpu_model); | |
22 | ||
23 | /* arm_boot.c */ | |
f93eb9ff AZ |
24 | struct arm_boot_info { |
25 | int ram_size; | |
26 | const char *kernel_filename; | |
27 | const char *kernel_cmdline; | |
28 | const char *initrd_filename; | |
29 | target_phys_addr_t loader_start; | |
7ffab4d7 | 30 | target_phys_addr_t smp_loader_start; |
f93eb9ff AZ |
31 | int nb_cpus; |
32 | int board_id; | |
33 | int (*atag_board)(struct arm_boot_info *info, void *p); | |
34 | }; | |
35 | void arm_load_kernel(CPUState *env, struct arm_boot_info *info); | |
87ecb68b | 36 | |
79383c9c BS |
37 | /* Multiplication factor to convert from system clock ticks to qemu timer |
38 | ticks. */ | |
7ee930d0 | 39 | extern int system_clock_scale; |
87ecb68b PB |
40 | |
41 | #endif /* !ARM_MISC_H */ |