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1d14ffa9 FB |
1 | /* |
2 | * QEMU ES1370 emulation | |
3 | * | |
4 | * Copyright (c) 2005 Vassili Karpov (malc) | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* #define DEBUG_ES1370 */ | |
26 | /* #define VERBOSE_ES1370 */ | |
27 | #define SILENT_ES1370 | |
28 | ||
87ecb68b PB |
29 | #include "hw.h" |
30 | #include "audiodev.h" | |
31 | #include "audio/audio.h" | |
32 | #include "pci.h" | |
1d14ffa9 FB |
33 | |
34 | /* Missing stuff: | |
35 | SCTRL_P[12](END|ST)INC | |
36 | SCTRL_P1SCTRLD | |
37 | SCTRL_P2DACSEN | |
38 | CTRL_DAC_SYNC | |
39 | MIDI | |
40 | non looped mode | |
41 | surely more | |
42 | */ | |
43 | ||
44 | /* | |
45 | Following macros and samplerate array were copied verbatim from | |
46 | Linux kernel 2.4.30: drivers/sound/es1370.c | |
47 | ||
48 | Copyright (C) 1998-2001, 2003 Thomas Sailer ([email protected]) | |
49 | */ | |
50 | ||
51 | /* Start blatant GPL violation */ | |
52 | ||
53 | #define ES1370_REG_CONTROL 0x00 | |
54 | #define ES1370_REG_STATUS 0x04 | |
55 | #define ES1370_REG_UART_DATA 0x08 | |
56 | #define ES1370_REG_UART_STATUS 0x09 | |
57 | #define ES1370_REG_UART_CONTROL 0x09 | |
58 | #define ES1370_REG_UART_TEST 0x0a | |
59 | #define ES1370_REG_MEMPAGE 0x0c | |
60 | #define ES1370_REG_CODEC 0x10 | |
61 | #define ES1370_REG_SERIAL_CONTROL 0x20 | |
62 | #define ES1370_REG_DAC1_SCOUNT 0x24 | |
63 | #define ES1370_REG_DAC2_SCOUNT 0x28 | |
64 | #define ES1370_REG_ADC_SCOUNT 0x2c | |
65 | ||
66 | #define ES1370_REG_DAC1_FRAMEADR 0xc30 | |
67 | #define ES1370_REG_DAC1_FRAMECNT 0xc34 | |
68 | #define ES1370_REG_DAC2_FRAMEADR 0xc38 | |
69 | #define ES1370_REG_DAC2_FRAMECNT 0xc3c | |
70 | #define ES1370_REG_ADC_FRAMEADR 0xd30 | |
71 | #define ES1370_REG_ADC_FRAMECNT 0xd34 | |
72 | #define ES1370_REG_PHANTOM_FRAMEADR 0xd38 | |
73 | #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c | |
74 | ||
75 | static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 }; | |
76 | ||
77 | #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2) | |
78 | #define DAC2_DIVTOSR(x) (1411200/((x)+2)) | |
79 | ||
80 | #define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ | |
81 | #define CTRL_XCTL1 0x40000000 /* electret mic bias */ | |
82 | #define CTRL_OPEN 0x20000000 /* no function, can be read and written */ | |
83 | #define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ | |
84 | #define CTRL_SH_PCLKDIV 16 | |
85 | #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */ | |
86 | #define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ | |
87 | #define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */ | |
88 | #define CTRL_SH_WTSRSEL 12 | |
89 | #define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ | |
90 | #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ | |
91 | #define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */ | |
92 | #define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ | |
93 | #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ | |
94 | #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ | |
95 | #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ | |
96 | #define CTRL_ADC_EN 0x00000010 /* enable ADC */ | |
97 | #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ | |
98 | #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */ | |
99 | #define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ | |
100 | #define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ | |
101 | ||
102 | #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ | |
103 | #define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */ | |
104 | #define STAT_CBUSY 0x00000200 /* 1 = codec busy */ | |
105 | #define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ | |
106 | #define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */ | |
107 | #define STAT_SH_VC 5 | |
108 | #define STAT_MCCB 0x00000010 /* CCB int pending */ | |
109 | #define STAT_UART 0x00000008 /* UART int pending */ | |
110 | #define STAT_DAC1 0x00000004 /* DAC1 int pending */ | |
111 | #define STAT_DAC2 0x00000002 /* DAC2 int pending */ | |
112 | #define STAT_ADC 0x00000001 /* ADC int pending */ | |
113 | ||
114 | #define USTAT_RXINT 0x80 /* UART rx int pending */ | |
115 | #define USTAT_TXINT 0x04 /* UART tx int pending */ | |
116 | #define USTAT_TXRDY 0x02 /* UART tx ready */ | |
117 | #define USTAT_RXRDY 0x01 /* UART rx ready */ | |
118 | ||
119 | #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */ | |
120 | #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */ | |
121 | #define UCTRL_ENA_TXINT 0x20 /* enable TX int */ | |
122 | #define UCTRL_CNTRL 0x03 /* control field */ | |
123 | #define UCTRL_CNTRL_SWR 0x03 /* software reset command */ | |
124 | ||
125 | #define SCTRL_P2ENDINC 0x00380000 /* */ | |
126 | #define SCTRL_SH_P2ENDINC 19 | |
127 | #define SCTRL_P2STINC 0x00070000 /* */ | |
128 | #define SCTRL_SH_P2STINC 16 | |
129 | #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ | |
130 | #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ | |
131 | #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ | |
132 | #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ | |
133 | #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ | |
134 | #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ | |
135 | #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ | |
136 | #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ | |
137 | #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */ | |
138 | #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */ | |
139 | #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ | |
140 | #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ | |
141 | #define SCTRL_R1FMT 0x00000030 /* format mask */ | |
142 | #define SCTRL_SH_R1FMT 4 | |
143 | #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ | |
144 | #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ | |
145 | #define SCTRL_P2FMT 0x0000000c /* format mask */ | |
146 | #define SCTRL_SH_P2FMT 2 | |
147 | #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ | |
148 | #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ | |
149 | #define SCTRL_P1FMT 0x00000003 /* format mask */ | |
150 | #define SCTRL_SH_P1FMT 0 | |
151 | ||
152 | /* End blatant GPL violation */ | |
153 | ||
154 | #define NB_CHANNELS 3 | |
155 | #define DAC1_CHANNEL 0 | |
156 | #define DAC2_CHANNEL 1 | |
157 | #define ADC_CHANNEL 2 | |
158 | ||
159 | #define IO_READ_PROTO(n) \ | |
160 | static uint32_t n (void *opaque, uint32_t addr) | |
161 | #define IO_WRITE_PROTO(n) \ | |
162 | static void n (void *opaque, uint32_t addr, uint32_t val) | |
163 | ||
164 | static void es1370_dac1_callback (void *opaque, int free); | |
165 | static void es1370_dac2_callback (void *opaque, int free); | |
166 | static void es1370_adc_callback (void *opaque, int avail); | |
167 | ||
168 | #ifdef DEBUG_ES1370 | |
169 | ||
170 | #define ldebug(...) AUD_log ("es1370", __VA_ARGS__) | |
171 | ||
172 | static void print_ctl (uint32_t val) | |
173 | { | |
174 | char buf[1024]; | |
175 | ||
176 | buf[0] = '\0'; | |
177 | #define a(n) if (val & CTRL_##n) strcat (buf, " "#n) | |
178 | a (ADC_STOP); | |
179 | a (XCTL1); | |
180 | a (OPEN); | |
181 | a (MSFMTSEL); | |
182 | a (M_SBB); | |
183 | a (DAC_SYNC); | |
184 | a (CCB_INTRM); | |
185 | a (M_CB); | |
186 | a (XCTL0); | |
187 | a (BREQ); | |
188 | a (DAC1_EN); | |
189 | a (DAC2_EN); | |
190 | a (ADC_EN); | |
191 | a (UART_EN); | |
192 | a (JYSTK_EN); | |
193 | a (CDC_EN); | |
194 | a (SERR_DIS); | |
195 | #undef a | |
196 | AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n", | |
197 | (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV, | |
198 | DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), | |
199 | dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], | |
200 | buf); | |
201 | } | |
202 | ||
203 | static void print_sctl (uint32_t val) | |
204 | { | |
205 | static const char *fmt_names[] = {"8M", "8S", "16M", "16S"}; | |
206 | char buf[1024]; | |
207 | ||
208 | buf[0] = '\0'; | |
209 | ||
210 | #define a(n) if (val & SCTRL_##n) strcat (buf, " "#n) | |
211 | #define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n) | |
212 | b (R1LOOPSEL); | |
213 | b (P2LOOPSEL); | |
214 | b (P1LOOPSEL); | |
215 | a (P2PAUSE); | |
216 | a (P1PAUSE); | |
217 | a (R1INTEN); | |
218 | a (P2INTEN); | |
219 | a (P1INTEN); | |
220 | a (P1SCTRLD); | |
221 | a (P2DACSEN); | |
222 | if (buf[0]) { | |
223 | strcat (buf, "\n "); | |
224 | } | |
225 | else { | |
226 | buf[0] = ' '; | |
227 | buf[1] = '\0'; | |
228 | } | |
229 | #undef b | |
230 | #undef a | |
231 | AUD_log ("es1370", | |
232 | "%s" | |
233 | "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n", | |
234 | buf, | |
235 | (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC, | |
236 | (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC, | |
237 | fmt_names [(val >> SCTRL_SH_R1FMT) & 3], | |
238 | fmt_names [(val >> SCTRL_SH_P2FMT) & 3], | |
239 | fmt_names [(val >> SCTRL_SH_P1FMT) & 3] | |
240 | ); | |
241 | } | |
242 | #else | |
243 | #define ldebug(...) | |
244 | #define print_ctl(...) | |
245 | #define print_sctl(...) | |
246 | #endif | |
247 | ||
248 | #ifdef VERBOSE_ES1370 | |
249 | #define dolog(...) AUD_log ("es1370", __VA_ARGS__) | |
250 | #else | |
251 | #define dolog(...) | |
252 | #endif | |
253 | ||
254 | #ifndef SILENT_ES1370 | |
946fc947 | 255 | #define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__) |
1d14ffa9 FB |
256 | #else |
257 | #define lwarn(...) | |
258 | #endif | |
259 | ||
260 | struct chan { | |
261 | uint32_t shift; | |
262 | uint32_t leftover; | |
263 | uint32_t scount; | |
264 | uint32_t frame_addr; | |
265 | uint32_t frame_cnt; | |
266 | }; | |
267 | ||
268 | typedef struct ES1370State { | |
e5944641 | 269 | PCIDevice dev; |
c0fe3827 | 270 | QEMUSoundCard card; |
e1a99dbd | 271 | MemoryRegion io; |
1d14ffa9 FB |
272 | struct chan chan[NB_CHANNELS]; |
273 | SWVoiceOut *dac_voice[2]; | |
274 | SWVoiceIn *adc_voice; | |
275 | ||
276 | uint32_t ctl; | |
277 | uint32_t status; | |
278 | uint32_t mempage; | |
279 | uint32_t codec; | |
280 | uint32_t sctl; | |
281 | } ES1370State; | |
282 | ||
1d14ffa9 FB |
283 | struct chan_bits { |
284 | uint32_t ctl_en; | |
285 | uint32_t stat_int; | |
286 | uint32_t sctl_pause; | |
287 | uint32_t sctl_inten; | |
288 | uint32_t sctl_fmt; | |
289 | uint32_t sctl_sh_fmt; | |
290 | uint32_t sctl_loopsel; | |
291 | void (*calc_freq) (ES1370State *s, uint32_t ctl, | |
292 | uint32_t *old_freq, uint32_t *new_freq); | |
293 | }; | |
294 | ||
295 | static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, | |
296 | uint32_t *old_freq, uint32_t *new_freq); | |
297 | static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, | |
298 | uint32_t *old_freq, | |
299 | uint32_t *new_freq); | |
300 | ||
301 | static const struct chan_bits es1370_chan_bits[] = { | |
302 | {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN, | |
303 | SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL, | |
304 | es1370_dac1_calc_freq}, | |
305 | ||
306 | {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN, | |
307 | SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL, | |
308 | es1370_dac2_and_adc_calc_freq}, | |
309 | ||
310 | {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN, | |
311 | SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL, | |
312 | es1370_dac2_and_adc_calc_freq} | |
313 | }; | |
314 | ||
315 | static void es1370_update_status (ES1370State *s, uint32_t new_status) | |
316 | { | |
317 | uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC); | |
318 | ||
319 | if (level) { | |
320 | s->status = new_status | STAT_INTR; | |
321 | } | |
322 | else { | |
323 | s->status = new_status & ~STAT_INTR; | |
324 | } | |
e5944641 | 325 | qemu_set_irq (s->dev.irq[0], !!level); |
1d14ffa9 FB |
326 | } |
327 | ||
328 | static void es1370_reset (ES1370State *s) | |
329 | { | |
330 | size_t i; | |
331 | ||
332 | s->ctl = 1; | |
333 | s->status = 0x60; | |
334 | s->mempage = 0; | |
335 | s->codec = 0; | |
336 | s->sctl = 0; | |
337 | ||
338 | for (i = 0; i < NB_CHANNELS; ++i) { | |
339 | struct chan *d = &s->chan[i]; | |
340 | d->scount = 0; | |
341 | d->leftover = 0; | |
342 | if (i == ADC_CHANNEL) { | |
c0fe3827 | 343 | AUD_close_in (&s->card, s->adc_voice); |
1d14ffa9 FB |
344 | s->adc_voice = NULL; |
345 | } | |
346 | else { | |
c0fe3827 | 347 | AUD_close_out (&s->card, s->dac_voice[i]); |
1d14ffa9 FB |
348 | s->dac_voice[i] = NULL; |
349 | } | |
350 | } | |
e5944641 | 351 | qemu_irq_lower (s->dev.irq[0]); |
1d14ffa9 FB |
352 | } |
353 | ||
354 | static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl) | |
355 | { | |
356 | uint32_t new_status = s->status; | |
357 | ||
358 | if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) { | |
359 | new_status &= ~STAT_DAC1; | |
360 | } | |
361 | ||
362 | if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) { | |
363 | new_status &= ~STAT_DAC2; | |
364 | } | |
365 | ||
366 | if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) { | |
367 | new_status &= ~STAT_ADC; | |
368 | } | |
369 | ||
370 | if (new_status != s->status) { | |
371 | es1370_update_status (s, new_status); | |
372 | } | |
373 | } | |
374 | ||
375 | static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, | |
376 | uint32_t *old_freq, uint32_t *new_freq) | |
377 | ||
378 | { | |
379 | *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; | |
380 | *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; | |
381 | } | |
382 | ||
383 | static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, | |
384 | uint32_t *old_freq, | |
385 | uint32_t *new_freq) | |
386 | ||
387 | { | |
388 | uint32_t old_pclkdiv, new_pclkdiv; | |
389 | ||
390 | new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; | |
391 | old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; | |
392 | *new_freq = DAC2_DIVTOSR (new_pclkdiv); | |
393 | *old_freq = DAC2_DIVTOSR (old_pclkdiv); | |
394 | } | |
395 | ||
396 | static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) | |
397 | { | |
398 | size_t i; | |
399 | uint32_t old_freq, new_freq, old_fmt, new_fmt; | |
400 | ||
401 | for (i = 0; i < NB_CHANNELS; ++i) { | |
402 | struct chan *d = &s->chan[i]; | |
403 | const struct chan_bits *b = &es1370_chan_bits[i]; | |
404 | ||
405 | new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt; | |
406 | old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt; | |
407 | ||
408 | b->calc_freq (s, ctl, &old_freq, &new_freq); | |
409 | ||
410 | if ((old_fmt != new_fmt) || (old_freq != new_freq)) { | |
411 | d->shift = (new_fmt & 1) + (new_fmt >> 1); | |
412 | ldebug ("channel %d, freq = %d, nchannels %d, fmt %d, shift %d\n", | |
413 | i, | |
414 | new_freq, | |
415 | 1 << (new_fmt & 1), | |
416 | (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8, | |
417 | d->shift); | |
418 | if (new_freq) { | |
1ea879e5 | 419 | struct audsettings as; |
c0fe3827 FB |
420 | |
421 | as.freq = new_freq; | |
422 | as.nchannels = 1 << (new_fmt & 1); | |
423 | as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8; | |
d929eba5 | 424 | as.endianness = 0; |
c0fe3827 | 425 | |
1d14ffa9 FB |
426 | if (i == ADC_CHANNEL) { |
427 | s->adc_voice = | |
428 | AUD_open_in ( | |
c0fe3827 | 429 | &s->card, |
1d14ffa9 FB |
430 | s->adc_voice, |
431 | "es1370.adc", | |
432 | s, | |
433 | es1370_adc_callback, | |
d929eba5 | 434 | &as |
1d14ffa9 FB |
435 | ); |
436 | } | |
437 | else { | |
438 | s->dac_voice[i] = | |
439 | AUD_open_out ( | |
c0fe3827 | 440 | &s->card, |
1d14ffa9 FB |
441 | s->dac_voice[i], |
442 | i ? "es1370.dac2" : "es1370.dac1", | |
443 | s, | |
444 | i ? es1370_dac2_callback : es1370_dac1_callback, | |
d929eba5 | 445 | &as |
1d14ffa9 FB |
446 | ); |
447 | } | |
448 | } | |
449 | } | |
450 | ||
451 | if (((ctl ^ s->ctl) & b->ctl_en) | |
452 | || ((sctl ^ s->sctl) & b->sctl_pause)) { | |
453 | int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause); | |
454 | ||
455 | if (i == ADC_CHANNEL) { | |
456 | AUD_set_active_in (s->adc_voice, on); | |
457 | } | |
458 | else { | |
459 | AUD_set_active_out (s->dac_voice[i], on); | |
460 | } | |
461 | } | |
462 | } | |
463 | ||
464 | s->ctl = ctl; | |
465 | s->sctl = sctl; | |
466 | } | |
467 | ||
468 | static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr) | |
469 | { | |
470 | addr &= 0xff; | |
471 | if (addr >= 0x30 && addr <= 0x3f) | |
472 | addr |= s->mempage << 8; | |
473 | return addr; | |
474 | } | |
475 | ||
476 | IO_WRITE_PROTO (es1370_writeb) | |
477 | { | |
478 | ES1370State *s = opaque; | |
1d14ffa9 FB |
479 | uint32_t shift, mask; |
480 | ||
8ead62cf FB |
481 | addr = es1370_fixup (s, addr); |
482 | ||
1d14ffa9 FB |
483 | switch (addr) { |
484 | case ES1370_REG_CONTROL: | |
485 | case ES1370_REG_CONTROL + 1: | |
486 | case ES1370_REG_CONTROL + 2: | |
487 | case ES1370_REG_CONTROL + 3: | |
488 | shift = (addr - ES1370_REG_CONTROL) << 3; | |
489 | mask = 0xff << shift; | |
490 | val = (s->ctl & ~mask) | ((val & 0xff) << shift); | |
491 | es1370_update_voices (s, val, s->sctl); | |
492 | print_ctl (val); | |
493 | break; | |
494 | case ES1370_REG_MEMPAGE: | |
495 | s->mempage = val; | |
496 | break; | |
497 | case ES1370_REG_SERIAL_CONTROL: | |
498 | case ES1370_REG_SERIAL_CONTROL + 1: | |
499 | case ES1370_REG_SERIAL_CONTROL + 2: | |
500 | case ES1370_REG_SERIAL_CONTROL + 3: | |
501 | shift = (addr - ES1370_REG_SERIAL_CONTROL) << 3; | |
502 | mask = 0xff << shift; | |
503 | val = (s->sctl & ~mask) | ((val & 0xff) << shift); | |
504 | es1370_maybe_lower_irq (s, val); | |
505 | es1370_update_voices (s, s->ctl, val); | |
506 | print_sctl (val); | |
507 | break; | |
508 | default: | |
509 | lwarn ("writeb %#x <- %#x\n", addr, val); | |
510 | break; | |
511 | } | |
512 | } | |
513 | ||
514 | IO_WRITE_PROTO (es1370_writew) | |
515 | { | |
516 | ES1370State *s = opaque; | |
517 | addr = es1370_fixup (s, addr); | |
518 | uint32_t shift, mask; | |
519 | struct chan *d = &s->chan[0]; | |
520 | ||
521 | switch (addr) { | |
522 | case ES1370_REG_CODEC: | |
523 | dolog ("ignored codec write address %#x, data %#x\n", | |
524 | (val >> 8) & 0xff, val & 0xff); | |
525 | s->codec = val; | |
526 | break; | |
527 | ||
528 | case ES1370_REG_CONTROL: | |
529 | case ES1370_REG_CONTROL + 2: | |
530 | shift = (addr != ES1370_REG_CONTROL) << 4; | |
531 | mask = 0xffff << shift; | |
532 | val = (s->ctl & ~mask) | ((val & 0xffff) << shift); | |
533 | es1370_update_voices (s, val, s->sctl); | |
534 | print_ctl (val); | |
535 | break; | |
536 | ||
537 | case ES1370_REG_ADC_SCOUNT: | |
538 | d++; | |
539 | case ES1370_REG_DAC2_SCOUNT: | |
540 | d++; | |
541 | case ES1370_REG_DAC1_SCOUNT: | |
542 | d->scount = (d->scount & ~0xffff) | (val & 0xffff); | |
543 | break; | |
544 | ||
545 | default: | |
546 | lwarn ("writew %#x <- %#x\n", addr, val); | |
547 | break; | |
548 | } | |
549 | } | |
550 | ||
551 | IO_WRITE_PROTO (es1370_writel) | |
552 | { | |
553 | ES1370State *s = opaque; | |
554 | struct chan *d = &s->chan[0]; | |
555 | ||
556 | addr = es1370_fixup (s, addr); | |
557 | ||
558 | switch (addr) { | |
559 | case ES1370_REG_CONTROL: | |
560 | es1370_update_voices (s, val, s->sctl); | |
561 | print_ctl (val); | |
562 | break; | |
563 | ||
564 | case ES1370_REG_MEMPAGE: | |
565 | s->mempage = val & 0xf; | |
566 | break; | |
567 | ||
568 | case ES1370_REG_SERIAL_CONTROL: | |
569 | es1370_maybe_lower_irq (s, val); | |
570 | es1370_update_voices (s, s->ctl, val); | |
571 | print_sctl (val); | |
572 | break; | |
573 | ||
574 | case ES1370_REG_ADC_SCOUNT: | |
575 | d++; | |
576 | case ES1370_REG_DAC2_SCOUNT: | |
577 | d++; | |
578 | case ES1370_REG_DAC1_SCOUNT: | |
579 | d->scount = (val & 0xffff) | (d->scount & ~0xffff); | |
580 | ldebug ("chan %d CURR_SAMP_CT %d, SAMP_CT %d\n", | |
581 | d - &s->chan[0], val >> 16, (val & 0xffff)); | |
582 | break; | |
583 | ||
584 | case ES1370_REG_ADC_FRAMEADR: | |
585 | d++; | |
586 | case ES1370_REG_DAC2_FRAMEADR: | |
587 | d++; | |
588 | case ES1370_REG_DAC1_FRAMEADR: | |
589 | d->frame_addr = val; | |
590 | ldebug ("chan %d frame address %#x\n", d - &s->chan[0], val); | |
591 | break; | |
592 | ||
946fc947 FB |
593 | case ES1370_REG_PHANTOM_FRAMECNT: |
594 | lwarn ("writing to phantom frame count %#x\n", val); | |
595 | break; | |
596 | case ES1370_REG_PHANTOM_FRAMEADR: | |
597 | lwarn ("writing to phantom frame address %#x\n", val); | |
598 | break; | |
599 | ||
1d14ffa9 FB |
600 | case ES1370_REG_ADC_FRAMECNT: |
601 | d++; | |
602 | case ES1370_REG_DAC2_FRAMECNT: | |
603 | d++; | |
604 | case ES1370_REG_DAC1_FRAMECNT: | |
605 | d->frame_cnt = val; | |
606 | d->leftover = 0; | |
607 | ldebug ("chan %d frame count %d, buffer size %d\n", | |
608 | d - &s->chan[0], val >> 16, val & 0xffff); | |
609 | break; | |
610 | ||
611 | default: | |
612 | lwarn ("writel %#x <- %#x\n", addr, val); | |
613 | break; | |
614 | } | |
615 | } | |
616 | ||
617 | IO_READ_PROTO (es1370_readb) | |
618 | { | |
619 | ES1370State *s = opaque; | |
620 | uint32_t val; | |
621 | ||
622 | addr = es1370_fixup (s, addr); | |
623 | ||
624 | switch (addr) { | |
625 | case 0x1b: /* Legacy */ | |
626 | lwarn ("Attempt to read from legacy register\n"); | |
627 | val = 5; | |
628 | break; | |
629 | case ES1370_REG_MEMPAGE: | |
630 | val = s->mempage; | |
631 | break; | |
632 | case ES1370_REG_CONTROL + 0: | |
633 | case ES1370_REG_CONTROL + 1: | |
634 | case ES1370_REG_CONTROL + 2: | |
635 | case ES1370_REG_CONTROL + 3: | |
636 | val = s->ctl >> ((addr - ES1370_REG_CONTROL) << 3); | |
637 | break; | |
638 | case ES1370_REG_STATUS + 0: | |
639 | case ES1370_REG_STATUS + 1: | |
640 | case ES1370_REG_STATUS + 2: | |
641 | case ES1370_REG_STATUS + 3: | |
642 | val = s->status >> ((addr - ES1370_REG_STATUS) << 3); | |
643 | break; | |
644 | default: | |
645 | val = ~0; | |
646 | lwarn ("readb %#x -> %#x\n", addr, val); | |
647 | break; | |
648 | } | |
649 | return val; | |
650 | } | |
651 | ||
652 | IO_READ_PROTO (es1370_readw) | |
653 | { | |
654 | ES1370State *s = opaque; | |
655 | struct chan *d = &s->chan[0]; | |
656 | uint32_t val; | |
657 | ||
658 | addr = es1370_fixup (s, addr); | |
659 | ||
660 | switch (addr) { | |
661 | case ES1370_REG_ADC_SCOUNT + 2: | |
662 | d++; | |
663 | case ES1370_REG_DAC2_SCOUNT + 2: | |
664 | d++; | |
665 | case ES1370_REG_DAC1_SCOUNT + 2: | |
666 | val = d->scount >> 16; | |
667 | break; | |
668 | ||
946fc947 FB |
669 | case ES1370_REG_ADC_FRAMECNT: |
670 | d++; | |
671 | case ES1370_REG_DAC2_FRAMECNT: | |
672 | d++; | |
673 | case ES1370_REG_DAC1_FRAMECNT: | |
674 | val = d->frame_cnt & 0xffff; | |
675 | break; | |
676 | ||
677 | case ES1370_REG_ADC_FRAMECNT + 2: | |
678 | d++; | |
679 | case ES1370_REG_DAC2_FRAMECNT + 2: | |
680 | d++; | |
681 | case ES1370_REG_DAC1_FRAMECNT + 2: | |
682 | val = d->frame_cnt >> 16; | |
683 | break; | |
684 | ||
1d14ffa9 FB |
685 | default: |
686 | val = ~0; | |
687 | lwarn ("readw %#x -> %#x\n", addr, val); | |
688 | break; | |
689 | } | |
690 | ||
691 | return val; | |
692 | } | |
693 | ||
694 | IO_READ_PROTO (es1370_readl) | |
695 | { | |
696 | ES1370State *s = opaque; | |
697 | uint32_t val; | |
698 | struct chan *d = &s->chan[0]; | |
699 | ||
700 | addr = es1370_fixup (s, addr); | |
701 | ||
702 | switch (addr) { | |
703 | case ES1370_REG_CONTROL: | |
704 | val = s->ctl; | |
705 | break; | |
706 | case ES1370_REG_STATUS: | |
707 | val = s->status; | |
708 | break; | |
709 | case ES1370_REG_MEMPAGE: | |
710 | val = s->mempage; | |
711 | break; | |
712 | case ES1370_REG_CODEC: | |
713 | val = s->codec; | |
714 | break; | |
715 | case ES1370_REG_SERIAL_CONTROL: | |
716 | val = s->sctl; | |
717 | break; | |
718 | ||
719 | case ES1370_REG_ADC_SCOUNT: | |
720 | d++; | |
721 | case ES1370_REG_DAC2_SCOUNT: | |
722 | d++; | |
723 | case ES1370_REG_DAC1_SCOUNT: | |
724 | val = d->scount; | |
725 | #ifdef DEBUG_ES1370 | |
726 | { | |
727 | uint32_t curr_count = d->scount >> 16; | |
728 | uint32_t count = d->scount & 0xffff; | |
729 | ||
730 | curr_count <<= d->shift; | |
731 | count <<= d->shift; | |
732 | dolog ("read scount curr %d, total %d\n", curr_count, count); | |
733 | } | |
734 | #endif | |
735 | break; | |
736 | ||
737 | case ES1370_REG_ADC_FRAMECNT: | |
738 | d++; | |
739 | case ES1370_REG_DAC2_FRAMECNT: | |
740 | d++; | |
741 | case ES1370_REG_DAC1_FRAMECNT: | |
742 | val = d->frame_cnt; | |
743 | #ifdef DEBUG_ES1370 | |
744 | { | |
745 | uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2; | |
746 | uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2; | |
747 | if (curr > size) | |
748 | dolog ("read framecnt curr %d, size %d %d\n", curr, size, | |
749 | curr > size); | |
750 | } | |
751 | #endif | |
752 | break; | |
753 | ||
754 | case ES1370_REG_ADC_FRAMEADR: | |
755 | d++; | |
756 | case ES1370_REG_DAC2_FRAMEADR: | |
757 | d++; | |
758 | case ES1370_REG_DAC1_FRAMEADR: | |
759 | val = d->frame_addr; | |
760 | break; | |
761 | ||
946fc947 FB |
762 | case ES1370_REG_PHANTOM_FRAMECNT: |
763 | val = ~0U; | |
764 | lwarn ("reading from phantom frame count\n"); | |
765 | break; | |
766 | case ES1370_REG_PHANTOM_FRAMEADR: | |
767 | val = ~0U; | |
768 | lwarn ("reading from phantom frame address\n"); | |
769 | break; | |
770 | ||
1d14ffa9 FB |
771 | default: |
772 | val = ~0U; | |
773 | lwarn ("readl %#x -> %#x\n", addr, val); | |
774 | break; | |
775 | } | |
776 | return val; | |
777 | } | |
778 | ||
1d14ffa9 FB |
779 | static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, |
780 | int max, int *irq) | |
781 | { | |
782 | uint8_t tmpbuf[4096]; | |
783 | uint32_t addr = d->frame_addr; | |
784 | int sc = d->scount & 0xffff; | |
785 | int csc = d->scount >> 16; | |
786 | int csc_bytes = (csc + 1) << d->shift; | |
787 | int cnt = d->frame_cnt >> 16; | |
788 | int size = d->frame_cnt & 0xffff; | |
789 | int left = ((size - cnt + 1) << 2) + d->leftover; | |
790 | int transfered = 0; | |
791 | int temp = audio_MIN (max, audio_MIN (left, csc_bytes)); | |
792 | int index = d - &s->chan[0]; | |
793 | ||
794 | addr += (cnt << 2) + d->leftover; | |
795 | ||
796 | if (index == ADC_CHANNEL) { | |
797 | while (temp) { | |
798 | int acquired, to_copy; | |
799 | ||
c0fe3827 | 800 | to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf)); |
1d14ffa9 FB |
801 | acquired = AUD_read (s->adc_voice, tmpbuf, to_copy); |
802 | if (!acquired) | |
803 | break; | |
804 | ||
805 | cpu_physical_memory_write (addr, tmpbuf, acquired); | |
806 | ||
807 | temp -= acquired; | |
808 | addr += acquired; | |
809 | transfered += acquired; | |
810 | } | |
811 | } | |
812 | else { | |
813 | SWVoiceOut *voice = s->dac_voice[index]; | |
814 | ||
815 | while (temp) { | |
816 | int copied, to_copy; | |
817 | ||
c0fe3827 | 818 | to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf)); |
1d14ffa9 FB |
819 | cpu_physical_memory_read (addr, tmpbuf, to_copy); |
820 | copied = AUD_write (voice, tmpbuf, to_copy); | |
821 | if (!copied) | |
822 | break; | |
823 | temp -= copied; | |
824 | addr += copied; | |
825 | transfered += copied; | |
826 | } | |
827 | } | |
828 | ||
829 | if (csc_bytes == transfered) { | |
830 | *irq = 1; | |
831 | d->scount = sc | (sc << 16); | |
832 | ldebug ("sc = %d, rate = %f\n", | |
833 | (sc + 1) << d->shift, | |
834 | (sc + 1) / (double) 44100); | |
835 | } | |
836 | else { | |
837 | *irq = 0; | |
838 | d->scount = sc | (((csc_bytes - transfered - 1) >> d->shift) << 16); | |
839 | } | |
840 | ||
841 | cnt += (transfered + d->leftover) >> 2; | |
842 | ||
843 | if (s->sctl & loop_sel) { | |
844 | /* Bah, how stupid is that having a 0 represent true value? | |
845 | i just spent few hours on this shit */ | |
946fc947 | 846 | AUD_log ("es1370: warning", "non looping mode\n"); |
1d14ffa9 FB |
847 | } |
848 | else { | |
849 | d->frame_cnt = size; | |
850 | ||
c0fe3827 | 851 | if ((uint32_t) cnt <= d->frame_cnt) |
1d14ffa9 FB |
852 | d->frame_cnt |= cnt << 16; |
853 | } | |
854 | ||
855 | d->leftover = (transfered + d->leftover) & 3; | |
856 | } | |
857 | ||
858 | static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) | |
859 | { | |
860 | uint32_t new_status = s->status; | |
861 | int max_bytes, irq; | |
862 | struct chan *d = &s->chan[chan]; | |
863 | const struct chan_bits *b = &es1370_chan_bits[chan]; | |
864 | ||
865 | if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) { | |
866 | return; | |
867 | } | |
868 | ||
869 | max_bytes = free_or_avail; | |
870 | max_bytes &= ~((1 << d->shift) - 1); | |
871 | if (!max_bytes) { | |
872 | return; | |
873 | } | |
874 | ||
875 | es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq); | |
876 | ||
877 | if (irq) { | |
878 | if (s->sctl & b->sctl_inten) { | |
879 | new_status |= b->stat_int; | |
880 | } | |
881 | } | |
882 | ||
883 | if (new_status != s->status) { | |
884 | es1370_update_status (s, new_status); | |
885 | } | |
886 | } | |
887 | ||
888 | static void es1370_dac1_callback (void *opaque, int free) | |
889 | { | |
890 | ES1370State *s = opaque; | |
891 | ||
892 | es1370_run_channel (s, DAC1_CHANNEL, free); | |
893 | } | |
894 | ||
895 | static void es1370_dac2_callback (void *opaque, int free) | |
896 | { | |
897 | ES1370State *s = opaque; | |
898 | ||
899 | es1370_run_channel (s, DAC2_CHANNEL, free); | |
900 | } | |
901 | ||
902 | static void es1370_adc_callback (void *opaque, int avail) | |
903 | { | |
904 | ES1370State *s = opaque; | |
905 | ||
906 | es1370_run_channel (s, ADC_CHANNEL, avail); | |
907 | } | |
908 | ||
e1a99dbd AK |
909 | static const MemoryRegionPortio es1370_portio[] = { |
910 | { 0, 0x40 * 4, 1, .write = es1370_writeb, }, | |
911 | { 0, 0x40 * 2, 2, .write = es1370_writew, }, | |
912 | { 0, 0x40, 4, .write = es1370_writel, }, | |
913 | { 0, 0x40 * 4, 1, .read = es1370_readb, }, | |
914 | { 0, 0x40 * 2, 2, .read = es1370_readw, }, | |
915 | { 0, 0x40, 4, .read = es1370_readl, }, | |
916 | PORTIO_END_OF_LIST() | |
917 | }; | |
1d14ffa9 | 918 | |
e1a99dbd AK |
919 | static const MemoryRegionOps es1370_io_ops = { |
920 | .old_portio = es1370_portio, | |
921 | .endianness = DEVICE_LITTLE_ENDIAN, | |
922 | }; | |
1d14ffa9 | 923 | |
3a14c2df JQ |
924 | static const VMStateDescription vmstate_es1370_channel = { |
925 | .name = "es1370_channel", | |
926 | .version_id = 2, | |
927 | .minimum_version_id = 2, | |
928 | .minimum_version_id_old = 2, | |
929 | .fields = (VMStateField []) { | |
930 | VMSTATE_UINT32(shift, struct chan), | |
931 | VMSTATE_UINT32(leftover, struct chan), | |
932 | VMSTATE_UINT32(scount, struct chan), | |
933 | VMSTATE_UINT32(frame_addr, struct chan), | |
934 | VMSTATE_UINT32(frame_cnt, struct chan), | |
935 | VMSTATE_END_OF_LIST() | |
1d14ffa9 | 936 | } |
3a14c2df | 937 | }; |
1d14ffa9 | 938 | |
3a14c2df | 939 | static int es1370_post_load (void *opaque, int version_id) |
1d14ffa9 FB |
940 | { |
941 | uint32_t ctl, sctl; | |
942 | ES1370State *s = opaque; | |
943 | size_t i; | |
944 | ||
1d14ffa9 | 945 | for (i = 0; i < NB_CHANNELS; ++i) { |
1d14ffa9 FB |
946 | if (i == ADC_CHANNEL) { |
947 | if (s->adc_voice) { | |
c0fe3827 | 948 | AUD_close_in (&s->card, s->adc_voice); |
1d14ffa9 FB |
949 | s->adc_voice = NULL; |
950 | } | |
951 | } | |
952 | else { | |
953 | if (s->dac_voice[i]) { | |
c0fe3827 | 954 | AUD_close_out (&s->card, s->dac_voice[i]); |
1d14ffa9 FB |
955 | s->dac_voice[i] = NULL; |
956 | } | |
957 | } | |
958 | } | |
959 | ||
3a14c2df JQ |
960 | ctl = s->ctl; |
961 | sctl = s->sctl; | |
1d14ffa9 FB |
962 | s->ctl = 0; |
963 | s->sctl = 0; | |
964 | es1370_update_voices (s, ctl, sctl); | |
965 | return 0; | |
966 | } | |
967 | ||
3a14c2df JQ |
968 | static const VMStateDescription vmstate_es1370 = { |
969 | .name = "es1370", | |
970 | .version_id = 2, | |
971 | .minimum_version_id = 2, | |
972 | .minimum_version_id_old = 2, | |
973 | .post_load = es1370_post_load, | |
974 | .fields = (VMStateField []) { | |
975 | VMSTATE_PCI_DEVICE(dev, ES1370State), | |
976 | VMSTATE_STRUCT_ARRAY(chan, ES1370State, NB_CHANNELS, 2, | |
977 | vmstate_es1370_channel, struct chan), | |
978 | VMSTATE_UINT32(ctl, ES1370State), | |
979 | VMSTATE_UINT32(status, ES1370State), | |
980 | VMSTATE_UINT32(mempage, ES1370State), | |
981 | VMSTATE_UINT32(codec, ES1370State), | |
982 | VMSTATE_UINT32(sctl, ES1370State), | |
983 | VMSTATE_END_OF_LIST() | |
984 | } | |
985 | }; | |
986 | ||
1d14ffa9 FB |
987 | static void es1370_on_reset (void *opaque) |
988 | { | |
989 | ES1370State *s = opaque; | |
990 | es1370_reset (s); | |
991 | } | |
992 | ||
81a322d4 | 993 | static int es1370_initfn (PCIDevice *dev) |
1d14ffa9 | 994 | { |
b6f6d0e2 | 995 | ES1370State *s = DO_UPCAST (ES1370State, dev, dev); |
e5944641 | 996 | uint8_t *c = s->dev.config; |
1d14ffa9 | 997 | |
d3e2f135 | 998 | c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8; |
1d14ffa9 | 999 | |
0b8c537f | 1000 | #if 0 |
d3e2f135 MT |
1001 | c[PCI_CAPABILITY_LIST] = 0xdc; |
1002 | c[PCI_INTERRUPT_LINE] = 10; | |
1d14ffa9 FB |
1003 | c[0xdc] = 0x00; |
1004 | #endif | |
1005 | ||
d3e2f135 MT |
1006 | /* TODO: RST# value should be 0. */ |
1007 | c[PCI_INTERRUPT_PIN] = 1; | |
1008 | c[PCI_MIN_GNT] = 0x0c; | |
1009 | c[PCI_MAX_LAT] = 0x80; | |
1d14ffa9 | 1010 | |
e1a99dbd | 1011 | memory_region_init_io (&s->io, &es1370_io_ops, s, "es1370", 256); |
e824b2cc | 1012 | pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); |
a08d4367 | 1013 | qemu_register_reset (es1370_on_reset, s); |
c0fe3827 | 1014 | |
1a7dafce | 1015 | AUD_register_card ("es1370", &s->card); |
1d14ffa9 | 1016 | es1370_reset (s); |
81a322d4 | 1017 | return 0; |
6806e595 GH |
1018 | } |
1019 | ||
e1a99dbd AK |
1020 | static int es1370_exitfn(PCIDevice *dev) |
1021 | { | |
1022 | ES1370State *s = DO_UPCAST (ES1370State, dev, dev); | |
1023 | ||
1024 | memory_region_destroy (&s->io); | |
1025 | return 0; | |
1026 | } | |
1027 | ||
6806e595 GH |
1028 | int es1370_init (PCIBus *bus) |
1029 | { | |
b6f6d0e2 | 1030 | pci_create_simple (bus, -1, "ES1370"); |
1d14ffa9 FB |
1031 | return 0; |
1032 | } | |
6806e595 GH |
1033 | |
1034 | static PCIDeviceInfo es1370_info = { | |
1035 | .qdev.name = "ES1370", | |
f3519986 | 1036 | .qdev.desc = "ENSONIQ AudioPCI ES1370", |
e5944641 | 1037 | .qdev.size = sizeof (ES1370State), |
be73cfe2 | 1038 | .qdev.vmsd = &vmstate_es1370, |
6806e595 | 1039 | .init = es1370_initfn, |
e1a99dbd | 1040 | .exit = es1370_exitfn, |
0b8c537f IY |
1041 | .vendor_id = PCI_VENDOR_ID_ENSONIQ, |
1042 | .device_id = PCI_DEVICE_ID_ENSONIQ_ES1370, | |
1043 | .class_id = PCI_CLASS_MULTIMEDIA_AUDIO, | |
1044 | #if 1 | |
1045 | .subsystem_vendor_id = 0x4942, | |
1046 | .subsystem_id = 0x4c4c, | |
1047 | #else | |
1048 | .subsystem_vendor_id = 0x1274, | |
1049 | .subsystem_id = 0x1371, | |
1050 | #endif | |
6806e595 GH |
1051 | }; |
1052 | ||
b6f6d0e2 | 1053 | static void es1370_register (void) |
6806e595 | 1054 | { |
0c3271c5 | 1055 | pci_qdev_register (&es1370_info); |
6806e595 | 1056 | } |
0c3271c5 | 1057 | device_init (es1370_register); |
6806e595 | 1058 |