[qemu.git] / hw / ppc_chrp.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"

#define MAX_IDE_BUS 2

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    return 0;
}

static CPUWriteMemoryFunc *unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc *unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
                             const char *boot_device, DisplayState *ds,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char buf[1024];
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    unsigned long bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    nvram_t nvram;
#if 0
    MacIONVRAMState *nvr;
    int nvram_mem_index;
#endif
    m48t59_t *m48t59;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index;
    int ide_mem_index[2];
    int ppc_boot_device;
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "default";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        envs[i] = env;
    }
    if (env->nip < 0xFFF80000) {
        /* Special test for PowerPC 601:
         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
         * But the NVRAM is located at 0xFFF04000...
         */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

    /* allocate and load BIOS */
    bios_offset = ram_size + vga_ram_size;
    if (bios_name == NULL)
        bios_name = BIOS_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
    bios_size = load_image(buf, phys_ram_base + bios_offset);
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
        exit(1);
    }
    bios_size = (bios_size + 0xfff) & ~0xfff;
    if (bios_size > 0x00080000) {
        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }
    cpu_register_physical_memory((uint32_t)(-bios_size),
                                 bios_size, bios_offset | IO_MEM_ROM);

    /* allocate and load VGA BIOS */
    vga_bios_offset = bios_offset + bios_size;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        phys_ram_base[vga_bios_offset] = 'N';
        phys_ram_base[vga_bios_offset + 1] = 'D';
        phys_ram_base[vga_bios_offset + 2] = 'R';
        phys_ram_base[vga_bios_offset + 3] = 'V';
        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
                     vga_bios_size);
        vga_bios_size += 8;
    }
    vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;

    if (linux_boot) {
        kernel_base = KERNEL_LOAD_ADDR;
        /* now we can load the kernel */
        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
        if (kernel_size < 0) {
            cpu_abort(env, "qemu: could not load kernel '%s'\n",
                      kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image(initrd_filename,
                                     phys_ram_base + initrd_base);
            if (initrd_size < 0) {
                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
                          initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            cpu_abort(env, "Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
                 ram_size, vga_ram_size,
                 vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    /* XXX: use Mac Serial port */
    serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]);
    for(i = 0; i < nb_nics; i++) {
        if (!nd_table[i].model)
            nd_table[i].model = "ne2k_pci";
        pci_nic_init(pci_bus, &nd_table[i], -1);
    }
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
        if (index != -1)
            hd[i] = drives_table[index].bdrv;
        else
            hd[i] = NULL;
    }
#if 1
    ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]);
    ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]);
#else
    pci_cmd646_ide_init(pci_bus, &hd[0], 0);
#endif
    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);

    dbdma_init(&dbdma_mem_index);

    macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
               cuda_mem_index, NULL, 2, ide_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, 3, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    nvram.opaque = nvr;
    nvram.read_fn = &macio_nvram_read;
    nvram.write_fn = &macio_nvram_write;
#else
    m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
    nvram.opaque = m48t59;
    nvram.read_fn = &m48t59_read;
    nvram.write_fn = &m48t59_write;
#endif
    PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
                         ppc_boot_device, kernel_base, kernel_size,
                         kernel_cmdline,
                         initrd_base, initrd_size,
                         /* XXX: need an option to load a NVRAM image */
                         0,
                         graphic_width, graphic_height, graphic_depth);
    /* No PCI init: the BIOS will do it */

    /* Special port to get debug messages from Open-Firmware */
    register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
}

QEMUMachine core99_machine = {
    "mac99",
    "Mac99 based PowerMAC",
    ppc_core99_init,
    BIOS_SIZE + VGA_RAM_SIZE,
};
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
87ecb68b PB	28	#include "nvram.h"
	29	#include "pc.h"
	30	#include "pci.h"
	31	#include "net.h"
	32	#include "sysemu.h"
	33	#include "boards.h"
267002cd	34
e4bcb14c TS	35	#define MAX_IDE_BUS 2
e4bcb14c TS	36
0aa6a4a2 FB	37	/* UniN device */
	38	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
	39	{
	40	}
	41
	42	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
	43	{
	44	return 0;
	45	}
	46
	47	static CPUWriteMemoryFunc *unin_write[] = {
	48	&unin_writel,
	49	&unin_writel,
	50	&unin_writel,
	51	};
	52
	53	static CPUReadMemoryFunc *unin_read[] = {
	54	&unin_readl,
	55	&unin_readl,
	56	&unin_readl,
	57	};
	58
3cbee15b	59	/* PowerPC Mac99 hardware initialisation */
00f82b8a	60	static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
6ac0e82d	61	const char boot_device, DisplayState ds,
3cbee15b JM	62	const char *kernel_filename,
	63	const char *kernel_cmdline,
	64	const char *initrd_filename,
	65	const char *cpu_model)
64201201	66	{
aaed909a	67	CPUState env = NULL, envs[MAX_CPUS];
64201201	68	char buf[1024];
e9df014c	69	qemu_irq pic, *openpic_irqs;
aef445bd	70	int unin_memory;
d5295253 FB	71	int linux_boot, i;
d5295253 FB	72	unsigned long bios_offset, vga_bios_offset;
b6b8bd18	73	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	74	PCIBus *pci_bus;
3cbee15b JM	75	nvram_t nvram;
	76	#if 0
	77	MacIONVRAMState *nvr;
	78	int nvram_mem_index;
	79	#endif
	80	m48t59_t *m48t59;
d5295253	81	int vga_bios_size, bios_size;
d537cf6c	82	qemu_irq *dummy_irq;
3cbee15b JM	83	int pic_mem_index, dbdma_mem_index, cuda_mem_index;
3cbee15b JM	84	int ide_mem_index[2];
28c5af54	85	int ppc_boot_device;
e4bcb14c TS	86	int index;
e4bcb14c TS	87	BlockDriverState hd[MAX_IDE_BUS MAX_IDE_DEVS];
46e50e9d	88
64201201 FB	89	linux_boot = (kernel_filename != NULL);
64201201 FB	90
c68ea704	91	/* init CPUs */
94fc95cd	92	if (cpu_model == NULL)
d12f4c38	93	cpu_model = "default";
e9df014c	94	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	95	env = cpu_init(cpu_model);
	96	if (!env) {
	97	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	98	exit(1);
	99	}
e9df014c JM	100	/* Set time-base frequency to 100 Mhz */
e9df014c JM	101	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	102	#if 0
e9df014c	103	env->osi_call = vga_osi_call;
3cbee15b	104	#endif
fe33cc71	105	qemu_register_reset(&cpu_ppc_reset, env);
e9df014c JM	106	envs[i] = env;
e9df014c JM	107	}
4c823cff JM	108	if (env->nip < 0xFFF80000) {
	109	/* Special test for PowerPC 601:
	110	* the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
	111	* But the NVRAM is located at 0xFFF04000...
	112	*/
	113	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	114	}
c68ea704	115
64201201 FB	116	/* allocate RAM */
	117	cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
	118
	119	/* allocate and load BIOS */
	120	bios_offset = ram_size + vga_ram_size;
1192dad8 JM	121	if (bios_name == NULL)
	122	bios_name = BIOS_FILENAME;
	123	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
d5295253 FB	124	bios_size = load_image(buf, phys_ram_base + bios_offset);
d5295253 FB	125	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
4a057712	126	cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
64201201 FB	127	exit(1);
64201201 FB	128	}
d5295253	129	bios_size = (bios_size + 0xfff) & ~0xfff;
4c823cff JM	130	if (bios_size > 0x00080000) {
	131	/* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
	132	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	133	}
4a057712	134	cpu_register_physical_memory((uint32_t)(-bios_size),
d5295253	135	bios_size, bios_offset \| IO_MEM_ROM);
3b46e624	136
d5295253 FB	137	/* allocate and load VGA BIOS */
	138	vga_bios_offset = bios_offset + bios_size;
	139	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	140	vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
	141	if (vga_bios_size < 0) {
	142	/* if no bios is present, we can still work */
	143	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
	144	vga_bios_size = 0;
	145	} else {
	146	/* set a specific header (XXX: find real Apple format for NDRV
	147	drivers) */
	148	phys_ram_base[vga_bios_offset] = 'N';
	149	phys_ram_base[vga_bios_offset + 1] = 'D';
	150	phys_ram_base[vga_bios_offset + 2] = 'R';
	151	phys_ram_base[vga_bios_offset + 3] = 'V';
5fafdf24	152	cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
d5295253 FB	153	vga_bios_size);
	154	vga_bios_size += 8;
	155	}
	156	vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
3b46e624	157
b6b8bd18 FB	158	if (linux_boot) {
	159	kernel_base = KERNEL_LOAD_ADDR;
	160	/* now we can load the kernel */
	161	kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
	162	if (kernel_size < 0) {
4a057712 JM	163	cpu_abort(env, "qemu: could not load kernel '%s'\n",
4a057712 JM	164	kernel_filename);
b6b8bd18 FB	165	exit(1);
	166	}
	167	/* load initrd */
	168	if (initrd_filename) {
	169	initrd_base = INITRD_LOAD_ADDR;
	170	initrd_size = load_image(initrd_filename,
	171	phys_ram_base + initrd_base);
	172	if (initrd_size < 0) {
4a057712 JM	173	cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
4a057712 JM	174	initrd_filename);
b6b8bd18 FB	175	exit(1);
	176	}
	177	} else {
	178	initrd_base = 0;
	179	initrd_size = 0;
	180	}
6ac0e82d	181	ppc_boot_device = 'm';
b6b8bd18 FB	182	} else {
	183	kernel_base = 0;
	184	kernel_size = 0;
	185	initrd_base = 0;
	186	initrd_size = 0;
28c5af54 JM	187	ppc_boot_device = '\0';
	188	/* We consider that NewWorld PowerMac never have any floppy drive
	189	* For now, OHW cannot boot from the network.
	190	*/
0d913fdb JM	191	for (i = 0; boot_device[i] != '\0'; i++) {
	192	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	193	ppc_boot_device = boot_device[i];
28c5af54	194	break;
0d913fdb	195	}
28c5af54 JM	196	}
	197	if (ppc_boot_device == '\0') {
	198	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	199	exit(1);
	200	}
b6b8bd18	201	}
0aa6a4a2	202
3cbee15b	203	isa_mem_base = 0x80000000;
aef445bd	204
3cbee15b JM	205	/* Register 8 MB of ISA IO space */
3cbee15b JM	206	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	207
3cbee15b JM	208	/* UniN init */
	209	unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
	210	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	211
3cbee15b JM	212	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	213	openpic_irqs[0] =
	214	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	215	for (i = 0; i < smp_cpus; i++) {
	216	/* Mac99 IRQ connection between OpenPIC outputs pins
	217	* and PowerPC input pins
	218	*/
	219	switch (PPC_INPUT(env)) {
	220	case PPC_FLAGS_INPUT_6xx:
	221	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	222	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	223	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	224	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	225	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	226	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	227	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	228	/* Not connected ? */
	229	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	230	/* Check this */
	231	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	232	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	233	break;
00af685f	234	#if defined(TARGET_PPC64)
3cbee15b JM	235	case PPC_FLAGS_INPUT_970:
	236	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	237	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	238	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	239	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	240	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	241	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	242	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	243	/* Not connected ? */
	244	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	245	/* Check this */
	246	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	247	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	248	break;
00af685f	249	#endif /* defined(TARGET_PPC64) */
3cbee15b JM	250	default:
	251	cpu_abort(env, "Bus model not supported on mac99 machine\n");
	252	exit(1);
0aa6a4a2	253	}
3cbee15b JM	254	}
	255	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	256	pci_bus = pci_pmac_init(pic);
	257	/* init basic PC hardware */
	258	pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
	259	ram_size, vga_ram_size,
	260	vga_bios_offset, vga_bios_size);
aae9366a	261
3cbee15b JM	262	/* XXX: suppress that */
	263	dummy_irq = i8259_init(NULL);
	264
	265	/* XXX: use Mac Serial port */
b6cd0ea1	266	serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]);
3cbee15b JM	267	for(i = 0; i < nb_nics; i++) {
	268	if (!nd_table[i].model)
	269	nd_table[i].model = "ne2k_pci";
	270	pci_nic_init(pci_bus, &nd_table[i], -1);
	271	}
e4bcb14c TS	272	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	273	fprintf(stderr, "qemu: too many IDE bus\n");
	274	exit(1);
	275	}
	276	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
	277	index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	278	if (index != -1)
	279	hd[i] = drives_table[index].bdrv;
	280	else
	281	hd[i] = NULL;
	282	}
0aa6a4a2	283	#if 1
e4bcb14c TS	284	ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]);
e4bcb14c TS	285	ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]);
0aa6a4a2	286	#else
e4bcb14c	287	pci_cmd646_ide_init(pci_bus, &hd[0], 0);
0aa6a4a2	288	#endif
3cbee15b JM	289	/* cuda also initialize ADB */
3cbee15b JM	290	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	291
3cbee15b JM	292	adb_kbd_init(&adb_bus);
3cbee15b JM	293	adb_mouse_init(&adb_bus);
3b46e624	294
3cbee15b	295	dbdma_init(&dbdma_mem_index);
3b46e624	296
3cbee15b	297	macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
74e91155	298	cuda_mem_index, NULL, 2, ide_mem_index);
0d92ed30 PB	299
0d92ed30 PB	300	if (usb_enabled) {
e24ad6f1	301	usb_ohci_init_pci(pci_bus, 3, -1);
0d92ed30 PB	302	}
0d92ed30 PB	303
b6b8bd18 FB	304	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	305	graphic_depth = 15;
3cbee15b JM	306	#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
3cbee15b JM	307	/* The NewWorld NVRAM is not located in the MacIO device */
74e91155	308	nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
3cbee15b	309	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	310	macio_nvram_map(nvr, 0xFFF04000);
3cbee15b JM	311	nvram.opaque = nvr;
	312	nvram.read_fn = &macio_nvram_read;
	313	nvram.write_fn = &macio_nvram_write;
	314	#else
	315	m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
	316	nvram.opaque = m48t59;
	317	nvram.read_fn = &m48t59_read;
	318	nvram.write_fn = &m48t59_write;
	319	#endif
6ac0e82d AZ	320	PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
6ac0e82d AZ	321	ppc_boot_device, kernel_base, kernel_size,
b6b8bd18 FB	322	kernel_cmdline,
b6b8bd18 FB	323	initrd_base, initrd_size,
64201201	324	/* XXX: need an option to load a NVRAM image */
b6b8bd18 FB	325	0,
	326	graphic_width, graphic_height, graphic_depth);
	327	/* No PCI init: the BIOS will do it */
0aa6a4a2 FB	328
	329	/* Special port to get debug messages from Open-Firmware */
	330	register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
aae9366a	331	}
0aa6a4a2 FB	332
0aa6a4a2 FB	333	QEMUMachine core99_machine = {
0289b2c1 FB	334	"mac99",
0289b2c1 FB	335	"Mac99 based PowerMAC",
0aa6a4a2	336	ppc_core99_init,
7fb4fdcf	337	BIOS_SIZE + VGA_RAM_SIZE,
0aa6a4a2	338	};