]> Git Repo - qemu.git/blame - hw/vfio_pci.c
memory: use AddressSpace for MemoryListener filtering
[qemu.git] / hw / vfio_pci.c
CommitLineData
65501a74
AW
1/*
2 * vfio based device assignment support
3 *
4 * Copyright Red Hat, Inc. 2012
5 *
6 * Authors:
7 * Alex Williamson <[email protected]>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik ([email protected])
15 * Copyright (c) 2007, Neocleus, Guy Zana ([email protected])
16 * Copyright (C) 2008, Qumranet, Amit Shah ([email protected])
17 * Copyright (C) 2008, Red Hat, Amit Shah ([email protected])
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda ([email protected])
19 */
20
21#include <dirent.h>
22#include <unistd.h>
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/stat.h>
26#include <sys/types.h>
27#include <linux/vfio.h>
28
29#include "config.h"
30#include "event_notifier.h"
31#include "exec-memory.h"
32#include "kvm.h"
33#include "memory.h"
34#include "msi.h"
35#include "msix.h"
5c97e5eb
AW
36#include "pci.h"
37#include "qemu-common.h"
65501a74 38#include "qemu-error.h"
5c97e5eb 39#include "qemu-queue.h"
65501a74 40#include "range.h"
65501a74
AW
41
42/* #define DEBUG_VFIO */
43#ifdef DEBUG_VFIO
44#define DPRINTF(fmt, ...) \
45 do { fprintf(stderr, "vfio: " fmt, ## __VA_ARGS__); } while (0)
46#else
47#define DPRINTF(fmt, ...) \
48 do { } while (0)
49#endif
50
5c97e5eb
AW
51typedef struct VFIOBAR {
52 off_t fd_offset; /* offset of BAR within device fd */
53 int fd; /* device fd, allows us to pass VFIOBAR as opaque data */
54 MemoryRegion mem; /* slow, read/write access */
55 MemoryRegion mmap_mem; /* direct mapped access */
56 void *mmap;
57 size_t size;
58 uint32_t flags; /* VFIO region flags (rd/wr/mmap) */
59 uint8_t nr; /* cache the BAR number for debug */
60} VFIOBAR;
61
62typedef struct VFIOINTx {
63 bool pending; /* interrupt pending */
64 bool kvm_accel; /* set when QEMU bypass through KVM enabled */
65 uint8_t pin; /* which pin to pull for qemu_set_irq */
66 EventNotifier interrupt; /* eventfd triggered on interrupt */
67 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
68 PCIINTxRoute route; /* routing info for QEMU bypass */
69 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
70 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
71} VFIOINTx;
72
73struct VFIODevice;
74
75typedef struct VFIOMSIVector {
76 EventNotifier interrupt; /* eventfd triggered on interrupt */
77 struct VFIODevice *vdev; /* back pointer to device */
78 int virq; /* KVM irqchip route for QEMU bypass */
79 bool use;
80} VFIOMSIVector;
81
82enum {
83 VFIO_INT_NONE = 0,
84 VFIO_INT_INTx = 1,
85 VFIO_INT_MSI = 2,
86 VFIO_INT_MSIX = 3,
87};
88
89struct VFIOGroup;
90
91typedef struct VFIOContainer {
92 int fd; /* /dev/vfio/vfio, empowered by the attached groups */
93 struct {
94 /* enable abstraction to support various iommu backends */
95 union {
96 MemoryListener listener; /* Used by type1 iommu */
97 };
98 void (*release)(struct VFIOContainer *);
99 } iommu_data;
100 QLIST_HEAD(, VFIOGroup) group_list;
101 QLIST_ENTRY(VFIOContainer) next;
102} VFIOContainer;
103
104/* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */
105typedef struct VFIOMSIXInfo {
106 uint8_t table_bar;
107 uint8_t pba_bar;
108 uint16_t entries;
109 uint32_t table_offset;
110 uint32_t pba_offset;
111 MemoryRegion mmap_mem;
112 void *mmap;
113} VFIOMSIXInfo;
114
115typedef struct VFIODevice {
116 PCIDevice pdev;
117 int fd;
118 VFIOINTx intx;
119 unsigned int config_size;
120 off_t config_offset; /* Offset of config space region within device fd */
121 unsigned int rom_size;
122 off_t rom_offset; /* Offset of ROM region within device fd */
123 int msi_cap_size;
124 VFIOMSIVector *msi_vectors;
125 VFIOMSIXInfo *msix;
126 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
127 int interrupt; /* Current interrupt type */
128 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
129 PCIHostDeviceAddress host;
130 QLIST_ENTRY(VFIODevice) next;
131 struct VFIOGroup *group;
132 bool reset_works;
133} VFIODevice;
134
135typedef struct VFIOGroup {
136 int fd;
137 int groupid;
138 VFIOContainer *container;
139 QLIST_HEAD(, VFIODevice) device_list;
140 QLIST_ENTRY(VFIOGroup) next;
141 QLIST_ENTRY(VFIOGroup) container_next;
142} VFIOGroup;
143
65501a74
AW
144#define MSIX_CAP_LENGTH 12
145
146static QLIST_HEAD(, VFIOContainer)
147 container_list = QLIST_HEAD_INITIALIZER(container_list);
148
149static QLIST_HEAD(, VFIOGroup)
150 group_list = QLIST_HEAD_INITIALIZER(group_list);
151
152static void vfio_disable_interrupts(VFIODevice *vdev);
153static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
154static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled);
155
156/*
157 * Common VFIO interrupt disable
158 */
159static void vfio_disable_irqindex(VFIODevice *vdev, int index)
160{
161 struct vfio_irq_set irq_set = {
162 .argsz = sizeof(irq_set),
163 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER,
164 .index = index,
165 .start = 0,
166 .count = 0,
167 };
168
169 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
65501a74
AW
170}
171
172/*
173 * INTx
174 */
175static void vfio_unmask_intx(VFIODevice *vdev)
176{
177 struct vfio_irq_set irq_set = {
178 .argsz = sizeof(irq_set),
179 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK,
180 .index = VFIO_PCI_INTX_IRQ_INDEX,
181 .start = 0,
182 .count = 1,
183 };
184
185 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
186}
187
ea486926
AW
188/*
189 * Disabling BAR mmaping can be slow, but toggling it around INTx can
190 * also be a huge overhead. We try to get the best of both worlds by
191 * waiting until an interrupt to disable mmaps (subsequent transitions
192 * to the same state are effectively no overhead). If the interrupt has
193 * been serviced and the time gap is long enough, we re-enable mmaps for
194 * performance. This works well for things like graphics cards, which
195 * may not use their interrupt at all and are penalized to an unusable
196 * level by read/write BAR traps. Other devices, like NICs, have more
197 * regular interrupts and see much better latency by staying in non-mmap
198 * mode. We therefore set the default mmap_timeout such that a ping
199 * is just enough to keep the mmap disabled. Users can experiment with
200 * other options with the x-intx-mmap-timeout-ms parameter (a value of
201 * zero disables the timer).
202 */
203static void vfio_intx_mmap_enable(void *opaque)
204{
205 VFIODevice *vdev = opaque;
206
207 if (vdev->intx.pending) {
208 qemu_mod_timer(vdev->intx.mmap_timer,
209 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
210 return;
211 }
212
213 vfio_mmap_set_enabled(vdev, true);
214}
215
65501a74
AW
216static void vfio_intx_interrupt(void *opaque)
217{
218 VFIODevice *vdev = opaque;
219
220 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
221 return;
222 }
223
224 DPRINTF("%s(%04x:%02x:%02x.%x) Pin %c\n", __func__, vdev->host.domain,
225 vdev->host.bus, vdev->host.slot, vdev->host.function,
226 'A' + vdev->intx.pin);
227
228 vdev->intx.pending = true;
229 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);
ea486926
AW
230 vfio_mmap_set_enabled(vdev, false);
231 if (vdev->intx.mmap_timeout) {
232 qemu_mod_timer(vdev->intx.mmap_timer,
233 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
234 }
65501a74
AW
235}
236
237static void vfio_eoi(VFIODevice *vdev)
238{
239 if (!vdev->intx.pending) {
240 return;
241 }
242
243 DPRINTF("%s(%04x:%02x:%02x.%x) EOI\n", __func__, vdev->host.domain,
244 vdev->host.bus, vdev->host.slot, vdev->host.function);
245
246 vdev->intx.pending = false;
247 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
248 vfio_unmask_intx(vdev);
249}
250
65501a74
AW
251static int vfio_enable_intx(VFIODevice *vdev)
252{
65501a74 253 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
1a403133
AW
254 int ret, argsz;
255 struct vfio_irq_set *irq_set;
256 int32_t *pfd;
65501a74 257
ea486926 258 if (!pin) {
65501a74
AW
259 return 0;
260 }
261
262 vfio_disable_interrupts(vdev);
263
264 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
265 ret = event_notifier_init(&vdev->intx.interrupt, 0);
266 if (ret) {
267 error_report("vfio: Error: event_notifier_init failed\n");
268 return ret;
269 }
270
1a403133
AW
271 argsz = sizeof(*irq_set) + sizeof(*pfd);
272
273 irq_set = g_malloc0(argsz);
274 irq_set->argsz = argsz;
275 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
276 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
277 irq_set->start = 0;
278 irq_set->count = 1;
279 pfd = (int32_t *)&irq_set->data;
280
281 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
282 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
65501a74 283
1a403133
AW
284 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
285 g_free(irq_set);
286 if (ret) {
65501a74 287 error_report("vfio: Error: Failed to setup INTx fd: %m\n");
1a403133 288 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
ce59af2d 289 event_notifier_cleanup(&vdev->intx.interrupt);
65501a74
AW
290 return -errno;
291 }
292
65501a74
AW
293 vdev->interrupt = VFIO_INT_INTx;
294
295 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
296 vdev->host.bus, vdev->host.slot, vdev->host.function);
297
298 return 0;
299}
300
301static void vfio_disable_intx(VFIODevice *vdev)
302{
303 int fd;
304
ea486926 305 qemu_del_timer(vdev->intx.mmap_timer);
65501a74
AW
306 vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);
307 vdev->intx.pending = false;
308 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
309 vfio_mmap_set_enabled(vdev, true);
310
311 fd = event_notifier_get_fd(&vdev->intx.interrupt);
312 qemu_set_fd_handler(fd, NULL, NULL, vdev);
313 event_notifier_cleanup(&vdev->intx.interrupt);
314
315 vdev->interrupt = VFIO_INT_NONE;
316
317 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
318 vdev->host.bus, vdev->host.slot, vdev->host.function);
319}
320
321/*
322 * MSI/X
323 */
324static void vfio_msi_interrupt(void *opaque)
325{
326 VFIOMSIVector *vector = opaque;
327 VFIODevice *vdev = vector->vdev;
328 int nr = vector - vdev->msi_vectors;
329
330 if (!event_notifier_test_and_clear(&vector->interrupt)) {
331 return;
332 }
333
334 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__,
335 vdev->host.domain, vdev->host.bus, vdev->host.slot,
336 vdev->host.function, nr);
337
338 if (vdev->interrupt == VFIO_INT_MSIX) {
339 msix_notify(&vdev->pdev, nr);
340 } else if (vdev->interrupt == VFIO_INT_MSI) {
341 msi_notify(&vdev->pdev, nr);
342 } else {
343 error_report("vfio: MSI interrupt receieved, but not enabled?\n");
344 }
345}
346
347static int vfio_enable_vectors(VFIODevice *vdev, bool msix)
348{
349 struct vfio_irq_set *irq_set;
350 int ret = 0, i, argsz;
351 int32_t *fds;
352
353 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
354
355 irq_set = g_malloc0(argsz);
356 irq_set->argsz = argsz;
357 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
358 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
359 irq_set->start = 0;
360 irq_set->count = vdev->nr_vectors;
361 fds = (int32_t *)&irq_set->data;
362
363 for (i = 0; i < vdev->nr_vectors; i++) {
364 if (!vdev->msi_vectors[i].use) {
365 fds[i] = -1;
366 continue;
367 }
368
369 fds[i] = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
370 }
371
372 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
373
374 g_free(irq_set);
375
65501a74
AW
376 return ret;
377}
378
379static int vfio_msix_vector_use(PCIDevice *pdev,
380 unsigned int nr, MSIMessage msg)
381{
382 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
383 VFIOMSIVector *vector;
384 int ret;
385
386 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d used\n", __func__,
387 vdev->host.domain, vdev->host.bus, vdev->host.slot,
388 vdev->host.function, nr);
389
65501a74
AW
390 vector = &vdev->msi_vectors[nr];
391 vector->vdev = vdev;
392 vector->use = true;
393
394 msix_vector_use(pdev, nr);
395
396 if (event_notifier_init(&vector->interrupt, 0)) {
397 error_report("vfio: Error: event_notifier_init failed\n");
398 }
399
400 /*
401 * Attempt to enable route through KVM irqchip,
402 * default to userspace handling if unavailable.
403 */
404 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
405 if (vector->virq < 0 ||
406 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
407 vector->virq) < 0) {
408 if (vector->virq >= 0) {
409 kvm_irqchip_release_virq(kvm_state, vector->virq);
410 vector->virq = -1;
411 }
412 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
413 vfio_msi_interrupt, NULL, vector);
414 }
415
416 /*
417 * We don't want to have the host allocate all possible MSI vectors
418 * for a device if they're not in use, so we shutdown and incrementally
419 * increase them as needed.
420 */
421 if (vdev->nr_vectors < nr + 1) {
65501a74
AW
422 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
423 vdev->nr_vectors = nr + 1;
424 ret = vfio_enable_vectors(vdev, true);
425 if (ret) {
426 error_report("vfio: failed to enable vectors, %d\n", ret);
427 }
65501a74 428 } else {
1a403133
AW
429 int argsz;
430 struct vfio_irq_set *irq_set;
431 int32_t *pfd;
432
433 argsz = sizeof(*irq_set) + sizeof(*pfd);
434
435 irq_set = g_malloc0(argsz);
436 irq_set->argsz = argsz;
437 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
438 VFIO_IRQ_SET_ACTION_TRIGGER;
439 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
440 irq_set->start = nr;
441 irq_set->count = 1;
442 pfd = (int32_t *)&irq_set->data;
443
444 *pfd = event_notifier_get_fd(&vector->interrupt);
445
446 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
447 g_free(irq_set);
65501a74
AW
448 if (ret) {
449 error_report("vfio: failed to modify vector, %d\n", ret);
450 }
65501a74
AW
451 }
452
453 return 0;
454}
455
456static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
457{
458 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
459 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
1a403133
AW
460 int argsz;
461 struct vfio_irq_set *irq_set;
462 int32_t *pfd;
65501a74
AW
463
464 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d released\n", __func__,
465 vdev->host.domain, vdev->host.bus, vdev->host.slot,
466 vdev->host.function, nr);
467
468 /*
469 * XXX What's the right thing to do here? This turns off the interrupt
470 * completely, but do we really just want to switch the interrupt to
471 * bouncing through userspace and let msix.c drop it? Not sure.
472 */
473 msix_vector_unuse(pdev, nr);
1a403133
AW
474
475 argsz = sizeof(*irq_set) + sizeof(*pfd);
476
477 irq_set = g_malloc0(argsz);
478 irq_set->argsz = argsz;
479 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
480 VFIO_IRQ_SET_ACTION_TRIGGER;
481 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
482 irq_set->start = nr;
483 irq_set->count = 1;
484 pfd = (int32_t *)&irq_set->data;
485
486 *pfd = -1;
487
488 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
489
490 g_free(irq_set);
65501a74
AW
491
492 if (vector->virq < 0) {
493 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
494 NULL, NULL, NULL);
495 } else {
496 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
497 vector->virq);
498 kvm_irqchip_release_virq(kvm_state, vector->virq);
499 vector->virq = -1;
500 }
501
502 event_notifier_cleanup(&vector->interrupt);
503 vector->use = false;
504}
505
506/* TODO This should move to msi.c */
507static MSIMessage msi_get_msg(PCIDevice *pdev, unsigned int vector)
508{
509 uint16_t flags = pci_get_word(pdev->config + pdev->msi_cap + PCI_MSI_FLAGS);
510 bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
511 MSIMessage msg;
512
513 if (msi64bit) {
514 msg.address = pci_get_quad(pdev->config +
515 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
516 } else {
517 msg.address = pci_get_long(pdev->config +
518 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
519 }
520
521 msg.data = pci_get_word(pdev->config + pdev->msi_cap +
522 (msi64bit ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32));
523 msg.data += vector;
524
525 return msg;
526}
527
fd704adc
AW
528static void vfio_enable_msix(VFIODevice *vdev)
529{
530 vfio_disable_interrupts(vdev);
531
532 vdev->msi_vectors = g_malloc0(vdev->msix->entries * sizeof(VFIOMSIVector));
533
534 vdev->interrupt = VFIO_INT_MSIX;
535
536 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
537 vfio_msix_vector_release)) {
538 error_report("vfio: msix_set_vector_notifiers failed\n");
539 }
540
541 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
542 vdev->host.bus, vdev->host.slot, vdev->host.function);
543}
544
65501a74
AW
545static void vfio_enable_msi(VFIODevice *vdev)
546{
547 int ret, i;
548
549 vfio_disable_interrupts(vdev);
550
551 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
552retry:
553 vdev->msi_vectors = g_malloc0(vdev->nr_vectors * sizeof(VFIOMSIVector));
554
555 for (i = 0; i < vdev->nr_vectors; i++) {
556 MSIMessage msg;
557 VFIOMSIVector *vector = &vdev->msi_vectors[i];
558
559 vector->vdev = vdev;
560 vector->use = true;
561
562 if (event_notifier_init(&vector->interrupt, 0)) {
563 error_report("vfio: Error: event_notifier_init failed\n");
564 }
565
566 msg = msi_get_msg(&vdev->pdev, i);
567
568 /*
569 * Attempt to enable route through KVM irqchip,
570 * default to userspace handling if unavailable.
571 */
572 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
573 if (vector->virq < 0 ||
574 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
575 vector->virq) < 0) {
576 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
577 vfio_msi_interrupt, NULL, vector);
578 }
579 }
580
581 ret = vfio_enable_vectors(vdev, false);
582 if (ret) {
583 if (ret < 0) {
584 error_report("vfio: Error: Failed to setup MSI fds: %m\n");
585 } else if (ret != vdev->nr_vectors) {
586 error_report("vfio: Error: Failed to enable %d "
587 "MSI vectors, retry with %d\n", vdev->nr_vectors, ret);
588 }
589
590 for (i = 0; i < vdev->nr_vectors; i++) {
591 VFIOMSIVector *vector = &vdev->msi_vectors[i];
592 if (vector->virq >= 0) {
593 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
594 vector->virq);
595 kvm_irqchip_release_virq(kvm_state, vector->virq);
596 vector->virq = -1;
597 } else {
598 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
599 NULL, NULL, NULL);
600 }
601 event_notifier_cleanup(&vector->interrupt);
602 }
603
604 g_free(vdev->msi_vectors);
605
606 if (ret > 0 && ret != vdev->nr_vectors) {
607 vdev->nr_vectors = ret;
608 goto retry;
609 }
610 vdev->nr_vectors = 0;
611
612 return;
613 }
614
fd704adc
AW
615 vdev->interrupt = VFIO_INT_MSI;
616
65501a74
AW
617 DPRINTF("%s(%04x:%02x:%02x.%x) Enabled %d MSI vectors\n", __func__,
618 vdev->host.domain, vdev->host.bus, vdev->host.slot,
619 vdev->host.function, vdev->nr_vectors);
620}
621
fd704adc
AW
622static void vfio_disable_msi_common(VFIODevice *vdev)
623{
624 g_free(vdev->msi_vectors);
625 vdev->msi_vectors = NULL;
626 vdev->nr_vectors = 0;
627 vdev->interrupt = VFIO_INT_NONE;
628
629 vfio_enable_intx(vdev);
630}
631
632static void vfio_disable_msix(VFIODevice *vdev)
633{
634 msix_unset_vector_notifiers(&vdev->pdev);
635
636 if (vdev->nr_vectors) {
637 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
638 }
639
640 vfio_disable_msi_common(vdev);
641
642 DPRINTF("%s(%04x:%02x:%02x.%x, msi%s)\n", __func__,
643 vdev->host.domain, vdev->host.bus, vdev->host.slot,
644 vdev->host.function, msix ? "x" : "");
645}
646
647static void vfio_disable_msi(VFIODevice *vdev)
65501a74
AW
648{
649 int i;
650
fd704adc 651 vfio_disable_irqindex(vdev, VFIO_PCI_MSI_IRQ_INDEX);
65501a74
AW
652
653 for (i = 0; i < vdev->nr_vectors; i++) {
654 VFIOMSIVector *vector = &vdev->msi_vectors[i];
655
656 if (!vector->use) {
657 continue;
658 }
659
660 if (vector->virq >= 0) {
661 kvm_irqchip_remove_irqfd_notifier(kvm_state,
662 &vector->interrupt, vector->virq);
663 kvm_irqchip_release_virq(kvm_state, vector->virq);
664 vector->virq = -1;
665 } else {
666 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
667 NULL, NULL, NULL);
668 }
669
65501a74
AW
670 event_notifier_cleanup(&vector->interrupt);
671 }
672
fd704adc 673 vfio_disable_msi_common(vdev);
65501a74 674
fd704adc
AW
675 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
676 vdev->host.bus, vdev->host.slot, vdev->host.function);
65501a74
AW
677}
678
679/*
680 * IO Port/MMIO - Beware of the endians, VFIO is always little endian
681 */
682static void vfio_bar_write(void *opaque, target_phys_addr_t addr,
683 uint64_t data, unsigned size)
684{
685 VFIOBAR *bar = opaque;
686 union {
687 uint8_t byte;
688 uint16_t word;
689 uint32_t dword;
690 uint64_t qword;
691 } buf;
692
693 switch (size) {
694 case 1:
695 buf.byte = data;
696 break;
697 case 2:
698 buf.word = cpu_to_le16(data);
699 break;
700 case 4:
701 buf.dword = cpu_to_le32(data);
702 break;
703 default:
704 hw_error("vfio: unsupported write size, %d bytes\n", size);
705 break;
706 }
707
708 if (pwrite(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
709 error_report("%s(,0x%"TARGET_PRIxPHYS", 0x%"PRIx64", %d) failed: %m\n",
710 __func__, addr, data, size);
711 }
712
713 DPRINTF("%s(BAR%d+0x%"TARGET_PRIxPHYS", 0x%"PRIx64", %d)\n",
714 __func__, bar->nr, addr, data, size);
715
716 /*
717 * A read or write to a BAR always signals an INTx EOI. This will
718 * do nothing if not pending (including not in INTx mode). We assume
719 * that a BAR access is in response to an interrupt and that BAR
720 * accesses will service the interrupt. Unfortunately, we don't know
721 * which access will service the interrupt, so we're potentially
722 * getting quite a few host interrupts per guest interrupt.
723 */
3a4f2816 724 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
65501a74
AW
725}
726
727static uint64_t vfio_bar_read(void *opaque,
728 target_phys_addr_t addr, unsigned size)
729{
730 VFIOBAR *bar = opaque;
731 union {
732 uint8_t byte;
733 uint16_t word;
734 uint32_t dword;
735 uint64_t qword;
736 } buf;
737 uint64_t data = 0;
738
739 if (pread(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
740 error_report("%s(,0x%"TARGET_PRIxPHYS", %d) failed: %m\n",
741 __func__, addr, size);
742 return (uint64_t)-1;
743 }
744
745 switch (size) {
746 case 1:
747 data = buf.byte;
748 break;
749 case 2:
750 data = le16_to_cpu(buf.word);
751 break;
752 case 4:
753 data = le32_to_cpu(buf.dword);
754 break;
755 default:
756 hw_error("vfio: unsupported read size, %d bytes\n", size);
757 break;
758 }
759
760 DPRINTF("%s(BAR%d+0x%"TARGET_PRIxPHYS", %d) = 0x%"PRIx64"\n",
761 __func__, bar->nr, addr, size, data);
762
763 /* Same as write above */
3a4f2816 764 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
65501a74
AW
765
766 return data;
767}
768
769static const MemoryRegionOps vfio_bar_ops = {
770 .read = vfio_bar_read,
771 .write = vfio_bar_write,
772 .endianness = DEVICE_LITTLE_ENDIAN,
773};
774
775/*
776 * PCI config space
777 */
778static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
779{
780 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
781 uint32_t val = 0;
782
783 /*
784 * We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX
785 * capabilities, and the multifunction bit below. We let VFIO handle
786 * virtualizing everything else. Performance is not a concern here.
787 */
788 if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||
789 (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
790 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||
791 (pdev->cap_present & QEMU_PCI_CAP_MSI &&
792 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {
793
794 val = pci_default_read_config(pdev, addr, len);
795 } else {
796 if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {
797 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m\n",
798 __func__, vdev->host.domain, vdev->host.bus,
799 vdev->host.slot, vdev->host.function, addr, len);
800 return -errno;
801 }
802 val = le32_to_cpu(val);
803 }
804
805 /* Multifunction bit is virualized in QEMU */
806 if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {
807 uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;
808
809 if (len == 4) {
810 mask <<= 16;
811 }
812
813 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
814 val |= mask;
815 } else {
816 val &= ~mask;
817 }
818 }
819
820 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,
821 vdev->host.domain, vdev->host.bus, vdev->host.slot,
822 vdev->host.function, addr, len, val);
823
824 return val;
825}
826
827static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
828 uint32_t val, int len)
829{
830 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
831 uint32_t val_le = cpu_to_le32(val);
832
833 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, 0x%x, len=0x%x)\n", __func__,
834 vdev->host.domain, vdev->host.bus, vdev->host.slot,
835 vdev->host.function, addr, val, len);
836
837 /* Write everything to VFIO, let it filter out what we can't write */
838 if (pwrite(vdev->fd, &val_le, len, vdev->config_offset + addr) != len) {
839 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m\n",
840 __func__, vdev->host.domain, vdev->host.bus,
841 vdev->host.slot, vdev->host.function, addr, val, len);
842 }
843
844 /* Write standard header bits to emulation */
845 if (addr < PCI_CONFIG_HEADER_SIZE) {
846 pci_default_write_config(pdev, addr, val, len);
847 return;
848 }
849
850 /* MSI/MSI-X Enabling/Disabling */
851 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
852 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
853 int is_enabled, was_enabled = msi_enabled(pdev);
854
855 pci_default_write_config(pdev, addr, val, len);
856
857 is_enabled = msi_enabled(pdev);
858
859 if (!was_enabled && is_enabled) {
860 vfio_enable_msi(vdev);
861 } else if (was_enabled && !is_enabled) {
fd704adc 862 vfio_disable_msi(vdev);
65501a74
AW
863 }
864 }
865
866 if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
867 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
868 int is_enabled, was_enabled = msix_enabled(pdev);
869
870 pci_default_write_config(pdev, addr, val, len);
871
872 is_enabled = msix_enabled(pdev);
873
874 if (!was_enabled && is_enabled) {
fd704adc 875 vfio_enable_msix(vdev);
65501a74 876 } else if (was_enabled && !is_enabled) {
fd704adc 877 vfio_disable_msix(vdev);
65501a74
AW
878 }
879 }
880}
881
882/*
883 * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86
884 */
af6bc27e
AW
885static int vfio_dma_unmap(VFIOContainer *container,
886 target_phys_addr_t iova, ram_addr_t size)
887{
888 struct vfio_iommu_type1_dma_unmap unmap = {
889 .argsz = sizeof(unmap),
890 .flags = 0,
891 .iova = iova,
892 .size = size,
893 };
894
895 if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
896 DPRINTF("VFIO_UNMAP_DMA: %d\n", -errno);
897 return -errno;
898 }
899
900 return 0;
901}
902
65501a74
AW
903static int vfio_dma_map(VFIOContainer *container, target_phys_addr_t iova,
904 ram_addr_t size, void *vaddr, bool readonly)
905{
906 struct vfio_iommu_type1_dma_map map = {
907 .argsz = sizeof(map),
908 .flags = VFIO_DMA_MAP_FLAG_READ,
5976cdd5 909 .vaddr = (__u64)(uintptr_t)vaddr,
65501a74
AW
910 .iova = iova,
911 .size = size,
912 };
913
914 if (!readonly) {
915 map.flags |= VFIO_DMA_MAP_FLAG_WRITE;
916 }
917
12af1344
AW
918 /*
919 * Try the mapping, if it fails with EBUSY, unmap the region and try
920 * again. This shouldn't be necessary, but we sometimes see it in
921 * the the VGA ROM space.
922 */
923 if (ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0 ||
924 (errno == EBUSY && vfio_dma_unmap(container, iova, size) == 0 &&
925 ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0)) {
926 return 0;
65501a74
AW
927 }
928
12af1344
AW
929 DPRINTF("VFIO_MAP_DMA: %d\n", -errno);
930 return -errno;
65501a74
AW
931}
932
65501a74
AW
933static bool vfio_listener_skipped_section(MemoryRegionSection *section)
934{
935 return !memory_region_is_ram(section->mr);
936}
937
938static void vfio_listener_region_add(MemoryListener *listener,
939 MemoryRegionSection *section)
940{
941 VFIOContainer *container = container_of(listener, VFIOContainer,
942 iommu_data.listener);
943 target_phys_addr_t iova, end;
944 void *vaddr;
945 int ret;
946
947 if (vfio_listener_skipped_section(section)) {
948 DPRINTF("vfio: SKIPPING region_add %"TARGET_PRIxPHYS" - %"PRIx64"\n",
949 section->offset_within_address_space,
950 section->offset_within_address_space + section->size - 1);
951 return;
952 }
953
954 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
955 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
956 error_report("%s received unaligned region\n", __func__);
957 return;
958 }
959
960 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
961 end = (section->offset_within_address_space + section->size) &
962 TARGET_PAGE_MASK;
963
964 if (iova >= end) {
965 return;
966 }
967
968 vaddr = memory_region_get_ram_ptr(section->mr) +
969 section->offset_within_region +
970 (iova - section->offset_within_address_space);
971
972 DPRINTF("vfio: region_add %"TARGET_PRIxPHYS" - %"TARGET_PRIxPHYS" [%p]\n",
973 iova, end - 1, vaddr);
974
975 ret = vfio_dma_map(container, iova, end - iova, vaddr, section->readonly);
976 if (ret) {
977 error_report("vfio_dma_map(%p, 0x%"TARGET_PRIxPHYS", "
978 "0x%"TARGET_PRIxPHYS", %p) = %d (%m)\n",
979 container, iova, end - iova, vaddr, ret);
980 }
981}
982
983static void vfio_listener_region_del(MemoryListener *listener,
984 MemoryRegionSection *section)
985{
986 VFIOContainer *container = container_of(listener, VFIOContainer,
987 iommu_data.listener);
988 target_phys_addr_t iova, end;
989 int ret;
990
991 if (vfio_listener_skipped_section(section)) {
992 DPRINTF("vfio: SKIPPING region_del %"TARGET_PRIxPHYS" - %"PRIx64"\n",
993 section->offset_within_address_space,
994 section->offset_within_address_space + section->size - 1);
995 return;
996 }
997
998 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
999 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
1000 error_report("%s received unaligned region\n", __func__);
1001 return;
1002 }
1003
1004 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
1005 end = (section->offset_within_address_space + section->size) &
1006 TARGET_PAGE_MASK;
1007
1008 if (iova >= end) {
1009 return;
1010 }
1011
1012 DPRINTF("vfio: region_del %"TARGET_PRIxPHYS" - %"TARGET_PRIxPHYS"\n",
1013 iova, end - 1);
1014
1015 ret = vfio_dma_unmap(container, iova, end - iova);
1016 if (ret) {
1017 error_report("vfio_dma_unmap(%p, 0x%"TARGET_PRIxPHYS", "
1018 "0x%"TARGET_PRIxPHYS") = %d (%m)\n",
1019 container, iova, end - iova, ret);
1020 }
1021}
1022
1023static MemoryListener vfio_memory_listener = {
65501a74
AW
1024 .region_add = vfio_listener_region_add,
1025 .region_del = vfio_listener_region_del,
65501a74
AW
1026};
1027
1028static void vfio_listener_release(VFIOContainer *container)
1029{
1030 memory_listener_unregister(&container->iommu_data.listener);
1031}
1032
1033/*
1034 * Interrupt setup
1035 */
1036static void vfio_disable_interrupts(VFIODevice *vdev)
1037{
1038 switch (vdev->interrupt) {
1039 case VFIO_INT_INTx:
1040 vfio_disable_intx(vdev);
1041 break;
1042 case VFIO_INT_MSI:
fd704adc 1043 vfio_disable_msi(vdev);
65501a74
AW
1044 break;
1045 case VFIO_INT_MSIX:
fd704adc 1046 vfio_disable_msix(vdev);
65501a74
AW
1047 break;
1048 }
1049}
1050
1051static int vfio_setup_msi(VFIODevice *vdev, int pos)
1052{
1053 uint16_t ctrl;
1054 bool msi_64bit, msi_maskbit;
1055 int ret, entries;
1056
65501a74
AW
1057 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1058 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1059 return -errno;
1060 }
1061 ctrl = le16_to_cpu(ctrl);
1062
1063 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1064 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1065 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1066
1067 DPRINTF("%04x:%02x:%02x.%x PCI MSI CAP @0x%x\n", vdev->host.domain,
1068 vdev->host.bus, vdev->host.slot, vdev->host.function, pos);
1069
1070 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1071 if (ret < 0) {
e43b9a5a
AW
1072 if (ret == -ENOTSUP) {
1073 return 0;
1074 }
65501a74
AW
1075 error_report("vfio: msi_init failed\n");
1076 return ret;
1077 }
1078 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1079
1080 return 0;
1081}
1082
1083/*
1084 * We don't have any control over how pci_add_capability() inserts
1085 * capabilities into the chain. In order to setup MSI-X we need a
1086 * MemoryRegion for the BAR. In order to setup the BAR and not
1087 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1088 * need to first look for where the MSI-X table lives. So we
1089 * unfortunately split MSI-X setup across two functions.
1090 */
1091static int vfio_early_setup_msix(VFIODevice *vdev)
1092{
1093 uint8_t pos;
1094 uint16_t ctrl;
1095 uint32_t table, pba;
1096
1097 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1098 if (!pos) {
1099 return 0;
1100 }
1101
1102 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1103 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1104 return -errno;
1105 }
1106
1107 if (pread(vdev->fd, &table, sizeof(table),
1108 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1109 return -errno;
1110 }
1111
1112 if (pread(vdev->fd, &pba, sizeof(pba),
1113 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1114 return -errno;
1115 }
1116
1117 ctrl = le16_to_cpu(ctrl);
1118 table = le32_to_cpu(table);
1119 pba = le32_to_cpu(pba);
1120
1121 vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
1122 vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1123 vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1124 vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1125 vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1126 vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1127
1128 DPRINTF("%04x:%02x:%02x.%x "
1129 "PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d\n",
1130 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1131 vdev->host.function, pos, vdev->msix->table_bar,
1132 vdev->msix->table_offset, vdev->msix->entries);
1133
1134 return 0;
1135}
1136
1137static int vfio_setup_msix(VFIODevice *vdev, int pos)
1138{
1139 int ret;
1140
65501a74
AW
1141 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1142 &vdev->bars[vdev->msix->table_bar].mem,
1143 vdev->msix->table_bar, vdev->msix->table_offset,
1144 &vdev->bars[vdev->msix->pba_bar].mem,
1145 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1146 if (ret < 0) {
e43b9a5a
AW
1147 if (ret == -ENOTSUP) {
1148 return 0;
1149 }
65501a74
AW
1150 error_report("vfio: msix_init failed\n");
1151 return ret;
1152 }
1153
65501a74
AW
1154 return 0;
1155}
1156
1157static void vfio_teardown_msi(VFIODevice *vdev)
1158{
1159 msi_uninit(&vdev->pdev);
1160
1161 if (vdev->msix) {
65501a74
AW
1162 msix_uninit(&vdev->pdev, &vdev->bars[vdev->msix->table_bar].mem,
1163 &vdev->bars[vdev->msix->pba_bar].mem);
1164 }
1165}
1166
1167/*
1168 * Resource setup
1169 */
1170static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled)
1171{
1172 int i;
1173
1174 for (i = 0; i < PCI_ROM_SLOT; i++) {
1175 VFIOBAR *bar = &vdev->bars[i];
1176
1177 if (!bar->size) {
1178 continue;
1179 }
1180
1181 memory_region_set_enabled(&bar->mmap_mem, enabled);
1182 if (vdev->msix && vdev->msix->table_bar == i) {
1183 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled);
1184 }
1185 }
1186}
1187
1188static void vfio_unmap_bar(VFIODevice *vdev, int nr)
1189{
1190 VFIOBAR *bar = &vdev->bars[nr];
1191
1192 if (!bar->size) {
1193 return;
1194 }
1195
1196 memory_region_del_subregion(&bar->mem, &bar->mmap_mem);
1197 munmap(bar->mmap, memory_region_size(&bar->mmap_mem));
1198
1199 if (vdev->msix && vdev->msix->table_bar == nr) {
1200 memory_region_del_subregion(&bar->mem, &vdev->msix->mmap_mem);
1201 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));
1202 }
1203
1204 memory_region_destroy(&bar->mem);
1205}
1206
1207static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
1208 void **map, size_t size, off_t offset,
1209 const char *name)
1210{
1211 int ret = 0;
1212
1213 if (size && bar->flags & VFIO_REGION_INFO_FLAG_MMAP) {
1214 int prot = 0;
1215
1216 if (bar->flags & VFIO_REGION_INFO_FLAG_READ) {
1217 prot |= PROT_READ;
1218 }
1219
1220 if (bar->flags & VFIO_REGION_INFO_FLAG_WRITE) {
1221 prot |= PROT_WRITE;
1222 }
1223
1224 *map = mmap(NULL, size, prot, MAP_SHARED,
1225 bar->fd, bar->fd_offset + offset);
1226 if (*map == MAP_FAILED) {
1227 *map = NULL;
1228 ret = -errno;
1229 goto empty_region;
1230 }
1231
1232 memory_region_init_ram_ptr(submem, name, size, *map);
1233 } else {
1234empty_region:
1235 /* Create a zero sized sub-region to make cleanup easy. */
1236 memory_region_init(submem, name, 0);
1237 }
1238
1239 memory_region_add_subregion(mem, offset, submem);
1240
1241 return ret;
1242}
1243
1244static void vfio_map_bar(VFIODevice *vdev, int nr)
1245{
1246 VFIOBAR *bar = &vdev->bars[nr];
1247 unsigned size = bar->size;
1248 char name[64];
1249 uint32_t pci_bar;
1250 uint8_t type;
1251 int ret;
1252
1253 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1254 if (!size) {
1255 return;
1256 }
1257
1258 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d",
1259 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1260 vdev->host.function, nr);
1261
1262 /* Determine what type of BAR this is for registration */
1263 ret = pread(vdev->fd, &pci_bar, sizeof(pci_bar),
1264 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1265 if (ret != sizeof(pci_bar)) {
1266 error_report("vfio: Failed to read BAR %d (%m)\n", nr);
1267 return;
1268 }
1269
1270 pci_bar = le32_to_cpu(pci_bar);
1271 type = pci_bar & (pci_bar & PCI_BASE_ADDRESS_SPACE_IO ?
1272 ~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
1273
1274 /* A "slow" read/write mapping underlies all BARs */
1275 memory_region_init_io(&bar->mem, &vfio_bar_ops, bar, name, size);
1276 pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
1277
1278 /*
1279 * We can't mmap areas overlapping the MSIX vector table, so we
1280 * potentially insert a direct-mapped subregion before and after it.
1281 */
1282 if (vdev->msix && vdev->msix->table_bar == nr) {
1283 size = vdev->msix->table_offset & TARGET_PAGE_MASK;
1284 }
1285
1286 strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
1287 if (vfio_mmap_bar(bar, &bar->mem,
1288 &bar->mmap_mem, &bar->mmap, size, 0, name)) {
1289 error_report("%s unsupported. Performance may be slow\n", name);
1290 }
1291
1292 if (vdev->msix && vdev->msix->table_bar == nr) {
1293 unsigned start;
1294
1295 start = TARGET_PAGE_ALIGN(vdev->msix->table_offset +
1296 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE));
1297
1298 size = start < bar->size ? bar->size - start : 0;
1299 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
1300 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */
1301 if (vfio_mmap_bar(bar, &bar->mem, &vdev->msix->mmap_mem,
1302 &vdev->msix->mmap, size, start, name)) {
1303 error_report("%s unsupported. Performance may be slow\n", name);
1304 }
1305 }
1306}
1307
1308static void vfio_map_bars(VFIODevice *vdev)
1309{
1310 int i;
1311
1312 for (i = 0; i < PCI_ROM_SLOT; i++) {
1313 vfio_map_bar(vdev, i);
1314 }
1315}
1316
1317static void vfio_unmap_bars(VFIODevice *vdev)
1318{
1319 int i;
1320
1321 for (i = 0; i < PCI_ROM_SLOT; i++) {
1322 vfio_unmap_bar(vdev, i);
1323 }
1324}
1325
1326/*
1327 * General setup
1328 */
1329static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1330{
1331 uint8_t tmp, next = 0xff;
1332
1333 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1334 tmp = pdev->config[tmp + 1]) {
1335 if (tmp > pos && tmp < next) {
1336 next = tmp;
1337 }
1338 }
1339
1340 return next - pos;
1341}
1342
1343static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
1344{
1345 PCIDevice *pdev = &vdev->pdev;
1346 uint8_t cap_id, next, size;
1347 int ret;
1348
1349 cap_id = pdev->config[pos];
1350 next = pdev->config[pos + 1];
1351
1352 /*
1353 * If it becomes important to configure capabilities to their actual
1354 * size, use this as the default when it's something we don't recognize.
1355 * Since QEMU doesn't actually handle many of the config accesses,
1356 * exact size doesn't seem worthwhile.
1357 */
1358 size = vfio_std_cap_max_size(pdev, pos);
1359
1360 /*
1361 * pci_add_capability always inserts the new capability at the head
1362 * of the chain. Therefore to end up with a chain that matches the
1363 * physical device, we insert from the end by making this recursive.
1364 * This is also why we pre-caclulate size above as cached config space
1365 * will be changed as we unwind the stack.
1366 */
1367 if (next) {
1368 ret = vfio_add_std_cap(vdev, next);
1369 if (ret) {
1370 return ret;
1371 }
1372 } else {
1373 pdev->config[PCI_CAPABILITY_LIST] = 0; /* Begin the rebuild */
1374 }
1375
1376 switch (cap_id) {
1377 case PCI_CAP_ID_MSI:
1378 ret = vfio_setup_msi(vdev, pos);
1379 break;
1380 case PCI_CAP_ID_MSIX:
1381 ret = vfio_setup_msix(vdev, pos);
1382 break;
1383 default:
1384 ret = pci_add_capability(pdev, cap_id, pos, size);
1385 break;
1386 }
1387
1388 if (ret < 0) {
1389 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability "
1390 "0x%x[0x%x]@0x%x: %d\n", vdev->host.domain,
1391 vdev->host.bus, vdev->host.slot, vdev->host.function,
1392 cap_id, size, pos, ret);
1393 return ret;
1394 }
1395
1396 return 0;
1397}
1398
1399static int vfio_add_capabilities(VFIODevice *vdev)
1400{
1401 PCIDevice *pdev = &vdev->pdev;
1402
1403 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1404 !pdev->config[PCI_CAPABILITY_LIST]) {
1405 return 0; /* Nothing to add */
1406 }
1407
1408 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1409}
1410
1411static int vfio_load_rom(VFIODevice *vdev)
1412{
1413 uint64_t size = vdev->rom_size;
1414 char name[32];
1415 off_t off = 0, voff = vdev->rom_offset;
1416 ssize_t bytes;
1417 void *ptr;
1418
1419 /* If loading ROM from file, pci handles it */
1420 if (vdev->pdev.romfile || !vdev->pdev.rom_bar || !size) {
1421 return 0;
1422 }
1423
1424 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1425 vdev->host.bus, vdev->host.slot, vdev->host.function);
1426
1427 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
1428 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1429 vdev->host.function);
1430 memory_region_init_ram(&vdev->pdev.rom, name, size);
1431 ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
1432 memset(ptr, 0xff, size);
1433
1434 while (size) {
1435 bytes = pread(vdev->fd, ptr + off, size, voff + off);
1436 if (bytes == 0) {
1437 break; /* expect that we could get back less than the ROM BAR */
1438 } else if (bytes > 0) {
1439 off += bytes;
1440 size -= bytes;
1441 } else {
1442 if (errno == EINTR || errno == EAGAIN) {
1443 continue;
1444 }
1445 error_report("vfio: Error reading device ROM: %m\n");
1446 memory_region_destroy(&vdev->pdev.rom);
1447 return -errno;
1448 }
1449 }
1450
1451 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, 0, &vdev->pdev.rom);
1452 vdev->pdev.has_rom = true;
1453 return 0;
1454}
1455
1456static int vfio_connect_container(VFIOGroup *group)
1457{
1458 VFIOContainer *container;
1459 int ret, fd;
1460
1461 if (group->container) {
1462 return 0;
1463 }
1464
1465 QLIST_FOREACH(container, &container_list, next) {
1466 if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) {
1467 group->container = container;
1468 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1469 return 0;
1470 }
1471 }
1472
1473 fd = qemu_open("/dev/vfio/vfio", O_RDWR);
1474 if (fd < 0) {
1475 error_report("vfio: failed to open /dev/vfio/vfio: %m\n");
1476 return -errno;
1477 }
1478
1479 ret = ioctl(fd, VFIO_GET_API_VERSION);
1480 if (ret != VFIO_API_VERSION) {
1481 error_report("vfio: supported vfio version: %d, "
1482 "reported version: %d\n", VFIO_API_VERSION, ret);
1483 close(fd);
1484 return -EINVAL;
1485 }
1486
1487 container = g_malloc0(sizeof(*container));
1488 container->fd = fd;
1489
1490 if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
1491 ret = ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
1492 if (ret) {
1493 error_report("vfio: failed to set group container: %m\n");
1494 g_free(container);
1495 close(fd);
1496 return -errno;
1497 }
1498
1499 ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
1500 if (ret) {
1501 error_report("vfio: failed to set iommu for container: %m\n");
1502 g_free(container);
1503 close(fd);
1504 return -errno;
1505 }
1506
1507 container->iommu_data.listener = vfio_memory_listener;
1508 container->iommu_data.release = vfio_listener_release;
1509
f6790af6 1510 memory_listener_register(&container->iommu_data.listener, &address_space_memory);
65501a74
AW
1511 } else {
1512 error_report("vfio: No available IOMMU models\n");
1513 g_free(container);
1514 close(fd);
1515 return -EINVAL;
1516 }
1517
1518 QLIST_INIT(&container->group_list);
1519 QLIST_INSERT_HEAD(&container_list, container, next);
1520
1521 group->container = container;
1522 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1523
1524 return 0;
1525}
1526
1527static void vfio_disconnect_container(VFIOGroup *group)
1528{
1529 VFIOContainer *container = group->container;
1530
1531 if (ioctl(group->fd, VFIO_GROUP_UNSET_CONTAINER, &container->fd)) {
1532 error_report("vfio: error disconnecting group %d from container\n",
1533 group->groupid);
1534 }
1535
1536 QLIST_REMOVE(group, container_next);
1537 group->container = NULL;
1538
1539 if (QLIST_EMPTY(&container->group_list)) {
1540 if (container->iommu_data.release) {
1541 container->iommu_data.release(container);
1542 }
1543 QLIST_REMOVE(container, next);
1544 DPRINTF("vfio_disconnect_container: close container->fd\n");
1545 close(container->fd);
1546 g_free(container);
1547 }
1548}
1549
1550static VFIOGroup *vfio_get_group(int groupid)
1551{
1552 VFIOGroup *group;
1553 char path[32];
1554 struct vfio_group_status status = { .argsz = sizeof(status) };
1555
1556 QLIST_FOREACH(group, &group_list, next) {
1557 if (group->groupid == groupid) {
1558 return group;
1559 }
1560 }
1561
1562 group = g_malloc0(sizeof(*group));
1563
1564 snprintf(path, sizeof(path), "/dev/vfio/%d", groupid);
1565 group->fd = qemu_open(path, O_RDWR);
1566 if (group->fd < 0) {
1567 error_report("vfio: error opening %s: %m\n", path);
1568 g_free(group);
1569 return NULL;
1570 }
1571
1572 if (ioctl(group->fd, VFIO_GROUP_GET_STATUS, &status)) {
1573 error_report("vfio: error getting group status: %m\n");
1574 close(group->fd);
1575 g_free(group);
1576 return NULL;
1577 }
1578
1579 if (!(status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
1580 error_report("vfio: error, group %d is not viable, please ensure "
1581 "all devices within the iommu_group are bound to their "
1582 "vfio bus driver.\n", groupid);
1583 close(group->fd);
1584 g_free(group);
1585 return NULL;
1586 }
1587
1588 group->groupid = groupid;
1589 QLIST_INIT(&group->device_list);
1590
1591 if (vfio_connect_container(group)) {
1592 error_report("vfio: failed to setup container for group %d\n", groupid);
1593 close(group->fd);
1594 g_free(group);
1595 return NULL;
1596 }
1597
1598 QLIST_INSERT_HEAD(&group_list, group, next);
1599
1600 return group;
1601}
1602
1603static void vfio_put_group(VFIOGroup *group)
1604{
1605 if (!QLIST_EMPTY(&group->device_list)) {
1606 return;
1607 }
1608
1609 vfio_disconnect_container(group);
1610 QLIST_REMOVE(group, next);
1611 DPRINTF("vfio_put_group: close group->fd\n");
1612 close(group->fd);
1613 g_free(group);
1614}
1615
1616static int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vdev)
1617{
1618 struct vfio_device_info dev_info = { .argsz = sizeof(dev_info) };
1619 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
1620 int ret, i;
1621
1622 ret = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, name);
1623 if (ret < 0) {
1624 error_report("vfio: error getting device %s from group %d: %m\n",
1625 name, group->groupid);
1626 error_report("Verify all devices in group %d are bound to vfio-pci "
1627 "or pci-stub and not already in use\n", group->groupid);
1628 return ret;
1629 }
1630
1631 vdev->fd = ret;
1632 vdev->group = group;
1633 QLIST_INSERT_HEAD(&group->device_list, vdev, next);
1634
1635 /* Sanity check device */
1636 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_INFO, &dev_info);
1637 if (ret) {
1638 error_report("vfio: error getting device info: %m\n");
1639 goto error;
1640 }
1641
1642 DPRINTF("Device %s flags: %u, regions: %u, irgs: %u\n", name,
1643 dev_info.flags, dev_info.num_regions, dev_info.num_irqs);
1644
1645 if (!(dev_info.flags & VFIO_DEVICE_FLAGS_PCI)) {
1646 error_report("vfio: Um, this isn't a PCI device\n");
1647 goto error;
1648 }
1649
1650 vdev->reset_works = !!(dev_info.flags & VFIO_DEVICE_FLAGS_RESET);
1651 if (!vdev->reset_works) {
1652 error_report("Warning, device %s does not support reset\n", name);
1653 }
1654
1655 if (dev_info.num_regions != VFIO_PCI_NUM_REGIONS) {
1656 error_report("vfio: unexpected number of io regions %u\n",
1657 dev_info.num_regions);
1658 goto error;
1659 }
1660
1661 if (dev_info.num_irqs != VFIO_PCI_NUM_IRQS) {
1662 error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
1663 goto error;
1664 }
1665
1666 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
1667 reg_info.index = i;
1668
1669 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1670 if (ret) {
1671 error_report("vfio: Error getting region %d info: %m\n", i);
1672 goto error;
1673 }
1674
1675 DPRINTF("Device %s region %d:\n", name, i);
1676 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1677 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1678 (unsigned long)reg_info.flags);
1679
1680 vdev->bars[i].flags = reg_info.flags;
1681 vdev->bars[i].size = reg_info.size;
1682 vdev->bars[i].fd_offset = reg_info.offset;
1683 vdev->bars[i].fd = vdev->fd;
1684 vdev->bars[i].nr = i;
1685 }
1686
1687 reg_info.index = VFIO_PCI_ROM_REGION_INDEX;
1688
1689 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1690 if (ret) {
1691 error_report("vfio: Error getting ROM info: %m\n");
1692 goto error;
1693 }
1694
1695 DPRINTF("Device %s ROM:\n", name);
1696 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1697 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1698 (unsigned long)reg_info.flags);
1699
1700 vdev->rom_size = reg_info.size;
1701 vdev->rom_offset = reg_info.offset;
1702
1703 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX;
1704
1705 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1706 if (ret) {
1707 error_report("vfio: Error getting config info: %m\n");
1708 goto error;
1709 }
1710
1711 DPRINTF("Device %s config:\n", name);
1712 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1713 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1714 (unsigned long)reg_info.flags);
1715
1716 vdev->config_size = reg_info.size;
1717 vdev->config_offset = reg_info.offset;
1718
1719error:
1720 if (ret) {
1721 QLIST_REMOVE(vdev, next);
1722 vdev->group = NULL;
1723 close(vdev->fd);
1724 }
1725 return ret;
1726}
1727
1728static void vfio_put_device(VFIODevice *vdev)
1729{
1730 QLIST_REMOVE(vdev, next);
1731 vdev->group = NULL;
1732 DPRINTF("vfio_put_device: close vdev->fd\n");
1733 close(vdev->fd);
1734 if (vdev->msix) {
1735 g_free(vdev->msix);
1736 vdev->msix = NULL;
1737 }
1738}
1739
1740static int vfio_initfn(PCIDevice *pdev)
1741{
1742 VFIODevice *pvdev, *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1743 VFIOGroup *group;
1744 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name;
1745 ssize_t len;
1746 struct stat st;
1747 int groupid;
1748 int ret;
1749
1750 /* Check that the host device exists */
1751 snprintf(path, sizeof(path),
1752 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/",
1753 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1754 vdev->host.function);
1755 if (stat(path, &st) < 0) {
1756 error_report("vfio: error: no such host device: %s\n", path);
1757 return -errno;
1758 }
1759
1760 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1);
1761
1762 len = readlink(path, iommu_group_path, PATH_MAX);
1763 if (len <= 0) {
1764 error_report("vfio: error no iommu_group for device\n");
1765 return -errno;
1766 }
1767
1768 iommu_group_path[len] = 0;
1769 group_name = basename(iommu_group_path);
1770
1771 if (sscanf(group_name, "%d", &groupid) != 1) {
1772 error_report("vfio: error reading %s: %m\n", path);
1773 return -errno;
1774 }
1775
1776 DPRINTF("%s(%04x:%02x:%02x.%x) group %d\n", __func__, vdev->host.domain,
1777 vdev->host.bus, vdev->host.slot, vdev->host.function, groupid);
1778
1779 group = vfio_get_group(groupid);
1780 if (!group) {
1781 error_report("vfio: failed to get group %d\n", groupid);
1782 return -ENOENT;
1783 }
1784
1785 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x",
1786 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1787 vdev->host.function);
1788
1789 QLIST_FOREACH(pvdev, &group->device_list, next) {
1790 if (pvdev->host.domain == vdev->host.domain &&
1791 pvdev->host.bus == vdev->host.bus &&
1792 pvdev->host.slot == vdev->host.slot &&
1793 pvdev->host.function == vdev->host.function) {
1794
1795 error_report("vfio: error: device %s is already attached\n", path);
1796 vfio_put_group(group);
1797 return -EBUSY;
1798 }
1799 }
1800
1801 ret = vfio_get_device(group, path, vdev);
1802 if (ret) {
1803 error_report("vfio: failed to get device %s\n", path);
1804 vfio_put_group(group);
1805 return ret;
1806 }
1807
1808 /* Get a copy of config space */
1809 ret = pread(vdev->fd, vdev->pdev.config,
1810 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
1811 vdev->config_offset);
1812 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
1813 ret = ret < 0 ? -errno : -EFAULT;
1814 error_report("vfio: Failed to read device config space\n");
1815 goto out_put;
1816 }
1817
1818 /*
1819 * Clear host resource mapping info. If we choose not to register a
1820 * BAR, such as might be the case with the option ROM, we can get
1821 * confusing, unwritable, residual addresses from the host here.
1822 */
1823 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
1824 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
1825
1826 vfio_load_rom(vdev);
1827
1828 ret = vfio_early_setup_msix(vdev);
1829 if (ret) {
1830 goto out_put;
1831 }
1832
1833 vfio_map_bars(vdev);
1834
1835 ret = vfio_add_capabilities(vdev);
1836 if (ret) {
1837 goto out_teardown;
1838 }
1839
1840 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
ea486926
AW
1841 vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock,
1842 vfio_intx_mmap_enable, vdev);
65501a74
AW
1843 ret = vfio_enable_intx(vdev);
1844 if (ret) {
1845 goto out_teardown;
1846 }
1847 }
1848
1849 return 0;
1850
1851out_teardown:
1852 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1853 vfio_teardown_msi(vdev);
1854 vfio_unmap_bars(vdev);
1855out_put:
1856 vfio_put_device(vdev);
1857 vfio_put_group(group);
1858 return ret;
1859}
1860
1861static void vfio_exitfn(PCIDevice *pdev)
1862{
1863 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1864 VFIOGroup *group = vdev->group;
1865
1866 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1867 vfio_disable_interrupts(vdev);
ea486926
AW
1868 if (vdev->intx.mmap_timer) {
1869 qemu_free_timer(vdev->intx.mmap_timer);
1870 }
65501a74
AW
1871 vfio_teardown_msi(vdev);
1872 vfio_unmap_bars(vdev);
1873 vfio_put_device(vdev);
1874 vfio_put_group(group);
1875}
1876
1877static void vfio_pci_reset(DeviceState *dev)
1878{
1879 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
1880 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
5834a83f 1881 uint16_t cmd;
65501a74 1882
5834a83f
AW
1883 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1884 vdev->host.bus, vdev->host.slot, vdev->host.function);
1885
1886 vfio_disable_interrupts(vdev);
65501a74 1887
5834a83f
AW
1888 /*
1889 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1890 * Also put INTx Disable in known state.
1891 */
1892 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
1893 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1894 PCI_COMMAND_INTX_DISABLE);
1895 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
1896
1897 if (vdev->reset_works) {
1898 if (ioctl(vdev->fd, VFIO_DEVICE_RESET)) {
1899 error_report("vfio: Error unable to reset physical device "
1900 "(%04x:%02x:%02x.%x): %m\n", vdev->host.domain,
1901 vdev->host.bus, vdev->host.slot, vdev->host.function);
1902 }
65501a74 1903 }
5834a83f
AW
1904
1905 vfio_enable_intx(vdev);
65501a74
AW
1906}
1907
1908static Property vfio_pci_dev_properties[] = {
1909 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIODevice, host),
ea486926
AW
1910 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIODevice,
1911 intx.mmap_timeout, 1100),
65501a74
AW
1912 /*
1913 * TODO - support passed fds... is this necessary?
1914 * DEFINE_PROP_STRING("vfiofd", VFIODevice, vfiofd_name),
1915 * DEFINE_PROP_STRING("vfiogroupfd, VFIODevice, vfiogroupfd_name),
1916 */
1917 DEFINE_PROP_END_OF_LIST(),
1918};
1919
1920
1921static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
1922{
1923 DeviceClass *dc = DEVICE_CLASS(klass);
1924 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
1925
1926 dc->reset = vfio_pci_reset;
1927 dc->props = vfio_pci_dev_properties;
1928 pdc->init = vfio_initfn;
1929 pdc->exit = vfio_exitfn;
1930 pdc->config_read = vfio_pci_read_config;
1931 pdc->config_write = vfio_pci_write_config;
1932}
1933
1934static const TypeInfo vfio_pci_dev_info = {
1935 .name = "vfio-pci",
1936 .parent = TYPE_PCI_DEVICE,
1937 .instance_size = sizeof(VFIODevice),
1938 .class_init = vfio_pci_dev_class_init,
1939};
1940
1941static void register_vfio_pci_dev_type(void)
1942{
1943 type_register_static(&vfio_pci_dev_info);
1944}
1945
1946type_init(register_vfio_pci_dev_type)
This page took 0.252682 seconds and 4 git commands to generate.