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[qemu.git] / target / s390x / cpu.c
CommitLineData
29e4bcb2
AF
1/*
2 * QEMU S/390 CPU
3 *
1ac1a749
AF
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
29e4bcb2 6 * Copyright (c) 2012 SUSE LINUX Products GmbH
70bada03 7 * Copyright (c) 2012 IBM Corp.
29e4bcb2
AF
8 *
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2.1 of the License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
18 *
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, see
21 * <http://www.gnu.org/licenses/lgpl-2.1.html>
70bada03
JF
22 * Contributions after 2012-12-11 are licensed under the terms of the
23 * GNU GPL, version 2 or (at your option) any later version.
29e4bcb2
AF
24 */
25
9615495a 26#include "qemu/osdep.h"
da34e65c 27#include "qapi/error.h"
564b863d 28#include "cpu.h"
4e58b838 29#include "internal.h"
f16bbb9b
DH
30#include "kvm_s390x.h"
31#include "sysemu/kvm.h"
29e4bcb2 32#include "qemu-common.h"
f348b6d1 33#include "qemu/cutils.h"
1de7afc9 34#include "qemu/timer.h"
eb24f7c6 35#include "qemu/error-report.h"
eb24f7c6 36#include "trace.h"
96b1a8bb 37#include "qapi/visitor.h"
63c91552 38#include "exec/exec-all.h"
ca5c1457 39#include "hw/qdev-properties.h"
c7396bbb 40#ifndef CONFIG_USER_ONLY
741da0d3 41#include "hw/hw.h"
904e5fd5 42#include "sysemu/arch_init.h"
96b1a8bb 43#include "sysemu/sysemu.h"
904e5fd5
VM
44#endif
45
70bada03
JF
46#define CR0_RESET 0xE0UL
47#define CR14_RESET 0xC2000000UL;
48
f45748f1
AF
49static void s390_cpu_set_pc(CPUState *cs, vaddr value)
50{
51 S390CPU *cpu = S390_CPU(cs);
52
53 cpu->env.psw.addr = value;
54}
55
8c2e1b00
AF
56static bool s390_cpu_has_work(CPUState *cs)
57{
58 S390CPU *cpu = S390_CPU(cs);
8c2e1b00 59
4beab671
DH
60 /* STOPPED cpus can never wake up */
61 if (s390_cpu_get_state(cpu) != CPU_STATE_LOAD &&
62 s390_cpu_get_state(cpu) != CPU_STATE_OPERATING) {
63 return false;
64 }
65
8417f904
DH
66 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
67 return false;
68 }
69
70 return s390_cpu_has_int(cpu);
8c2e1b00
AF
71}
72
29c6157c
CB
73#if !defined(CONFIG_USER_ONLY)
74/* S390CPUClass::load_normal() */
75static void s390_cpu_load_normal(CPUState *s)
76{
77 S390CPU *cpu = S390_CPU(s);
fdfba1a2 78 cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
29c6157c 79 cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64;
eb24f7c6 80 s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
29c6157c
CB
81}
82#endif
83
f5ae2a4f 84/* S390CPUClass::cpu_reset() */
29e4bcb2
AF
85static void s390_cpu_reset(CPUState *s)
86{
87 S390CPU *cpu = S390_CPU(s);
88 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
89 CPUS390XState *env = &cpu->env;
90
819bd309 91 env->pfault_token = -1UL;
b073c875 92 env->bpbc = false;
f5ae2a4f 93 scc->parent_reset(s);
18ff9494 94 cpu->env.sigp_order = 0;
eb24f7c6 95 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
f5ae2a4f
CB
96}
97
98/* S390CPUClass::initial_reset() */
99static void s390_cpu_initial_reset(CPUState *s)
100{
101 S390CPU *cpu = S390_CPU(s);
102 CPUS390XState *env = &cpu->env;
103
104 s390_cpu_reset(s);
cb4f4bc3
CB
105 /* initial reset does not clear everything! */
106 memset(&env->start_initial_reset_fields, 0,
107 offsetof(CPUS390XState, end_reset_fields) -
108 offsetof(CPUS390XState, start_initial_reset_fields));
f5ae2a4f
CB
109
110 /* architectured initial values for CR 0 and 14 */
111 env->cregs[0] = CR0_RESET;
112 env->cregs[14] = CR14_RESET;
819bd309 113
3da0ab35
AJ
114 /* architectured initial value for Breaking-Event-Address register */
115 env->gbea = 1;
116
819bd309 117 env->pfault_token = -1UL;
49f5c9e9 118
4a33565f
AJ
119 /* tininess for underflow is detected before rounding */
120 set_float_detect_tininess(float_tininess_before_rounding,
121 &env->fpu_status);
122
49f5c9e9
TH
123 /* Reset state inside the kernel that we cannot access yet from QEMU. */
124 if (kvm_enabled()) {
99607144 125 kvm_s390_reset_vcpu(cpu);
49f5c9e9 126 }
f5ae2a4f
CB
127}
128
129/* CPUClass:reset() */
130static void s390_cpu_full_reset(CPUState *s)
131{
132 S390CPU *cpu = S390_CPU(s);
133 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
134 CPUS390XState *env = &cpu->env;
135
29e4bcb2 136 scc->parent_reset(s);
18ff9494 137 cpu->env.sigp_order = 0;
eb24f7c6 138 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
29e4bcb2 139
1f5c00cf 140 memset(env, 0, offsetof(CPUS390XState, end_reset_fields));
70bada03
JF
141
142 /* architectured initial values for CR 0 and 14 */
143 env->cregs[0] = CR0_RESET;
144 env->cregs[14] = CR14_RESET;
819bd309 145
3da0ab35
AJ
146 /* architectured initial value for Breaking-Event-Address register */
147 env->gbea = 1;
148
819bd309
DD
149 env->pfault_token = -1UL;
150
4a33565f
AJ
151 /* tininess for underflow is detected before rounding */
152 set_float_detect_tininess(float_tininess_before_rounding,
153 &env->fpu_status);
154
99607144 155 /* Reset state inside the kernel that we cannot access yet from QEMU. */
50a2c6e5
PB
156 if (kvm_enabled()) {
157 kvm_s390_reset_vcpu(cpu);
158 }
29e4bcb2
AF
159}
160
70bada03
JF
161#if !defined(CONFIG_USER_ONLY)
162static void s390_cpu_machine_reset_cb(void *opaque)
163{
164 S390CPU *cpu = opaque;
165
14e6fe12 166 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
70bada03
JF
167}
168#endif
169
dbad6b74
PC
170static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
171{
172 info->mach = bfd_mach_s390_64;
173 info->print_insn = print_insn_s390;
174}
175
1f136632
AF
176static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
177{
14a10fc3 178 CPUState *cs = CPU(dev);
1f136632 179 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
1e70ba24 180#if !defined(CONFIG_USER_ONLY)
c6644fc8 181 S390CPU *cpu = S390_CPU(dev);
1e70ba24 182#endif
c6644fc8
MR
183 Error *err = NULL;
184
41868f84
DH
185 /* the model has to be realized before qemu_init_vcpu() due to kvm */
186 s390_realize_cpu_model(cs, &err);
187 if (err) {
188 goto out;
189 }
190
96b1a8bb 191#if !defined(CONFIG_USER_ONLY)
ca5c1457
DH
192 if (cpu->env.core_id >= max_cpus) {
193 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
194 ", maximum core-id: %d", cpu->env.core_id,
195 max_cpus - 1);
96b1a8bb
MR
196 goto out;
197 }
88556edd 198
ca5c1457
DH
199 if (cpu_exists(cpu->env.core_id)) {
200 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
201 ", it already exists", cpu->env.core_id);
96b1a8bb
MR
202 goto out;
203 }
96b1a8bb 204
ca5c1457 205 /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */
1e70ba24
DH
206 cs->cpu_index = cpu->env.core_id;
207#endif
208
ce5b1bbf 209 cpu_exec_realizefn(cs, &err);
c6644fc8 210 if (err != NULL) {
96b1a8bb 211 goto out;
c6644fc8 212 }
1f136632 213
c6644fc8
MR
214#if !defined(CONFIG_USER_ONLY)
215 qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
216#endif
73d510c9 217 s390_cpu_gdb_init(cs);
14a10fc3 218 qemu_init_vcpu(cs);
159855f0 219#if !defined(CONFIG_USER_ONLY)
14e6fe12 220 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
159855f0 221#else
14a10fc3 222 cpu_reset(cs);
159855f0 223#endif
1f136632 224
96b1a8bb 225 scc->parent_realize(dev, &err);
96b1a8bb
MR
226out:
227 error_propagate(errp, err);
228}
229
8f22e0df
AF
230static void s390_cpu_initfn(Object *obj)
231{
c05efcb1 232 CPUState *cs = CPU(obj);
8f22e0df
AF
233 S390CPU *cpu = S390_CPU(obj);
234 CPUS390XState *env = &cpu->env;
8f22e0df
AF
235#if !defined(CONFIG_USER_ONLY)
236 struct tm tm;
237#endif
238
c05efcb1 239 cs->env_ptr = env;
ef3027af
MR
240 cs->halted = 1;
241 cs->exception_index = EXCP_HLT;
0754f604 242 s390_cpu_model_register_props(obj);
8f22e0df
AF
243#if !defined(CONFIG_USER_ONLY)
244 qemu_get_timedate(&tm, 0);
245 env->tod_offset = TOD_UNIX_EPOCH +
246 (time2tod(mktimegm(&tm)) * 1000000000ULL);
247 env->tod_basetime = 0;
bc72ad67
AB
248 env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
249 env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
eb24f7c6 250 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
8f22e0df 251#endif
8f22e0df
AF
252}
253
d5627ce8
AF
254static void s390_cpu_finalize(Object *obj)
255{
256#if !defined(CONFIG_USER_ONLY)
257 S390CPU *cpu = S390_CPU(obj);
258
259 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
3cda44f7 260 g_free(cpu->irqstate);
d5627ce8
AF
261#endif
262}
263
75973bfe 264#if !defined(CONFIG_USER_ONLY)
eb24f7c6
DH
265static bool disabled_wait(CPUState *cpu)
266{
267 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
268 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
269}
270
75973bfe
DH
271static unsigned s390_count_running_cpus(void)
272{
273 CPUState *cpu;
274 int nr_running = 0;
275
276 CPU_FOREACH(cpu) {
277 uint8_t state = S390_CPU(cpu)->env.cpu_state;
278 if (state == CPU_STATE_OPERATING ||
279 state == CPU_STATE_LOAD) {
eb24f7c6
DH
280 if (!disabled_wait(cpu)) {
281 nr_running++;
282 }
75973bfe
DH
283 }
284 }
285
286 return nr_running;
287}
288
eb24f7c6 289unsigned int s390_cpu_halt(S390CPU *cpu)
75973bfe
DH
290{
291 CPUState *cs = CPU(cpu);
eb24f7c6 292 trace_cpu_halt(cs->cpu_index);
75973bfe 293
eb24f7c6
DH
294 if (!cs->halted) {
295 cs->halted = 1;
296 cs->exception_index = EXCP_HLT;
75973bfe 297 }
eb24f7c6
DH
298
299 return s390_count_running_cpus();
75973bfe
DH
300}
301
eb24f7c6 302void s390_cpu_unhalt(S390CPU *cpu)
75973bfe
DH
303{
304 CPUState *cs = CPU(cpu);
eb24f7c6 305 trace_cpu_unhalt(cs->cpu_index);
75973bfe 306
eb24f7c6
DH
307 if (cs->halted) {
308 cs->halted = 0;
309 cs->exception_index = -1;
310 }
311}
312
313unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
314 {
315 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
316
317 switch (cpu_state) {
318 case CPU_STATE_STOPPED:
319 case CPU_STATE_CHECK_STOP:
320 /* halt the cpu for common infrastructure */
321 s390_cpu_halt(cpu);
322 break;
323 case CPU_STATE_OPERATING:
324 case CPU_STATE_LOAD:
741a4ec1
DH
325 /*
326 * Starting a CPU with a PSW WAIT bit set:
327 * KVM: handles this internally and triggers another WAIT exit.
328 * TCG: will actually try to continue to run. Don't unhalt, will
329 * be done when the CPU actually has work (an interrupt).
330 */
331 if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) {
332 s390_cpu_unhalt(cpu);
333 }
eb24f7c6
DH
334 break;
335 default:
336 error_report("Requested CPU state is not a valid S390 CPU state: %u",
337 cpu_state);
338 exit(1);
75973bfe 339 }
c9e659c9
DH
340 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
341 kvm_s390_set_cpu_state(cpu, cpu_state);
342 }
eb24f7c6 343 cpu->env.cpu_state = cpu_state;
75973bfe
DH
344
345 return s390_count_running_cpus();
346}
b6089b05
DH
347
348int s390_get_clock(uint8_t *tod_high, uint64_t *tod_low)
349{
7edd4a49
CW
350 int r = 0;
351
b6089b05 352 if (kvm_enabled()) {
7edd4a49
CW
353 r = kvm_s390_get_clock_ext(tod_high, tod_low);
354 if (r == -ENXIO) {
355 return kvm_s390_get_clock(tod_high, tod_low);
356 }
357 } else {
358 /* Fixme TCG */
359 *tod_high = 0;
360 *tod_low = 0;
b6089b05 361 }
7edd4a49
CW
362
363 return r;
b6089b05
DH
364}
365
366int s390_set_clock(uint8_t *tod_high, uint64_t *tod_low)
367{
7edd4a49
CW
368 int r = 0;
369
b6089b05 370 if (kvm_enabled()) {
7edd4a49
CW
371 r = kvm_s390_set_clock_ext(tod_high, tod_low);
372 if (r == -ENXIO) {
373 return kvm_s390_set_clock(tod_high, tod_low);
374 }
b6089b05
DH
375 }
376 /* Fixme TCG */
7edd4a49 377 return r;
b6089b05
DH
378}
379
380int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit)
381{
382 if (kvm_enabled()) {
383 return kvm_s390_set_mem_limit(new_limit, hw_limit);
384 }
385 return 0;
386}
387
388void s390_cmma_reset(void)
389{
390 if (kvm_enabled()) {
391 kvm_s390_cmma_reset();
392 }
393}
394
b6089b05
DH
395int s390_get_memslot_count(void)
396{
397 if (kvm_enabled()) {
398 return kvm_s390_get_memslot_count();
399 } else {
400 return MAX_AVAIL_SLOTS;
401 }
402}
403
404int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id,
405 int vq, bool assign)
406{
407 if (kvm_enabled()) {
408 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
409 } else {
410 return 0;
411 }
412}
413
414void s390_crypto_reset(void)
415{
416 if (kvm_enabled()) {
417 kvm_s390_crypto_reset();
418 }
419}
420
421bool s390_get_squash_mcss(void)
422{
423 if (object_property_get_bool(OBJECT(qdev_get_machine()), "s390-squash-mcss",
424 NULL)) {
425 return true;
426 }
427
428 return false;
429}
5e7164c5
DH
430
431void s390_enable_css_support(S390CPU *cpu)
432{
433 if (kvm_enabled()) {
434 kvm_s390_enable_css_support(cpu);
435 }
436}
75973bfe
DH
437#endif
438
b3820e6c
DH
439static gchar *s390_gdb_arch_name(CPUState *cs)
440{
441 return g_strdup("s390:64-bit");
442}
443
ca5c1457 444static Property s390x_cpu_properties[] = {
1e70ba24 445#if !defined(CONFIG_USER_ONLY)
ca5c1457 446 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
1e70ba24 447#endif
ca5c1457
DH
448 DEFINE_PROP_END_OF_LIST()
449};
450
29e4bcb2
AF
451static void s390_cpu_class_init(ObjectClass *oc, void *data)
452{
453 S390CPUClass *scc = S390_CPU_CLASS(oc);
454 CPUClass *cc = CPU_CLASS(scc);
c7396bbb 455 DeviceClass *dc = DEVICE_CLASS(oc);
29e4bcb2 456
bf853881
PMD
457 device_class_set_parent_realize(dc, s390_cpu_realizefn,
458 &scc->parent_realize);
ca5c1457 459 dc->props = s390x_cpu_properties;
0347ab84 460 dc->user_creatable = true;
1f136632 461
29e4bcb2 462 scc->parent_reset = cc->reset;
29c6157c
CB
463#if !defined(CONFIG_USER_ONLY)
464 scc->load_normal = s390_cpu_load_normal;
465#endif
f5ae2a4f
CB
466 scc->cpu_reset = s390_cpu_reset;
467 scc->initial_cpu_reset = s390_cpu_initial_reset;
468 cc->reset = s390_cpu_full_reset;
41868f84 469 cc->class_by_name = s390_cpu_class_by_name,
8c2e1b00 470 cc->has_work = s390_cpu_has_work;
b114588c 471#ifdef CONFIG_TCG
97a8ea5a 472 cc->do_interrupt = s390_cpu_do_interrupt;
b114588c 473#endif
878096ee 474 cc->dump_state = s390_cpu_dump_state;
f45748f1 475 cc->set_pc = s390_cpu_set_pc;
5b50e790
AF
476 cc->gdb_read_register = s390_cpu_gdb_read_register;
477 cc->gdb_write_register = s390_cpu_gdb_write_register;
7510454e
AF
478#ifdef CONFIG_USER_ONLY
479 cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
480#else
00b941e5 481 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
ef1df130 482 cc->vmsd = &vmstate_s390_cpu;
9b4f38e1 483 cc->write_elf64_note = s390_cpu_write_elf64_note;
b114588c 484#ifdef CONFIG_TCG
02bb9bbf 485 cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
311918b9 486 cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
44977a8f 487 cc->do_unaligned_access = s390x_cpu_do_unaligned_access;
b114588c 488#endif
00b941e5 489#endif
dbad6b74 490 cc->disas_set_info = s390_cpu_disas_set_info;
74d7fc7f 491#ifdef CONFIG_TCG
55c3ceef 492 cc->tcg_initialize = s390x_translate_init;
74d7fc7f 493#endif
dbad6b74 494
73d510c9
DH
495 cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
496 cc->gdb_core_xml_file = "s390x-core64.xml";
b3820e6c 497 cc->gdb_arch_name = s390_gdb_arch_name;
4c315c27 498
6efadc90 499 s390_cpu_model_class_register_props(oc);
29e4bcb2
AF
500}
501
502static const TypeInfo s390_cpu_type_info = {
503 .name = TYPE_S390_CPU,
504 .parent = TYPE_CPU,
505 .instance_size = sizeof(S390CPU),
8f22e0df 506 .instance_init = s390_cpu_initfn,
d5627ce8 507 .instance_finalize = s390_cpu_finalize,
41868f84 508 .abstract = true,
29e4bcb2
AF
509 .class_size = sizeof(S390CPUClass),
510 .class_init = s390_cpu_class_init,
511};
512
513static void s390_cpu_register_types(void)
514{
515 type_register_static(&s390_cpu_type_info);
516}
517
518type_init(s390_cpu_register_types)
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