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79b97bf2 JQ |
1 | /* |
2 | * QEMU ISA MM VGA Emulator. | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
47df5154 | 24 | #include "qemu/osdep.h" |
83c9f4ca | 25 | #include "hw/hw.h" |
866e2b37 | 26 | #include "hw/display/vga.h" |
47b43a1f | 27 | #include "vga_int.h" |
28ecbaee | 28 | #include "ui/pixel_ops.h" |
79b97bf2 | 29 | |
4a1e244e GH |
30 | #define VGA_RAM_SIZE (8192 * 1024) |
31 | ||
79b97bf2 JQ |
32 | typedef struct ISAVGAMMState { |
33 | VGACommonState vga; | |
34 | int it_shift; | |
35 | } ISAVGAMMState; | |
36 | ||
37 | /* Memory mapped interface */ | |
a8170e5e | 38 | static uint32_t vga_mm_readb (void *opaque, hwaddr addr) |
79b97bf2 JQ |
39 | { |
40 | ISAVGAMMState *s = opaque; | |
41 | ||
42 | return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff; | |
43 | } | |
44 | ||
45 | static void vga_mm_writeb (void *opaque, | |
a8170e5e | 46 | hwaddr addr, uint32_t value) |
79b97bf2 JQ |
47 | { |
48 | ISAVGAMMState *s = opaque; | |
49 | ||
50 | vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); | |
51 | } | |
52 | ||
a8170e5e | 53 | static uint32_t vga_mm_readw (void *opaque, hwaddr addr) |
79b97bf2 JQ |
54 | { |
55 | ISAVGAMMState *s = opaque; | |
56 | ||
57 | return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff; | |
58 | } | |
59 | ||
60 | static void vga_mm_writew (void *opaque, | |
a8170e5e | 61 | hwaddr addr, uint32_t value) |
79b97bf2 JQ |
62 | { |
63 | ISAVGAMMState *s = opaque; | |
64 | ||
65 | vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); | |
66 | } | |
67 | ||
a8170e5e | 68 | static uint32_t vga_mm_readl (void *opaque, hwaddr addr) |
79b97bf2 JQ |
69 | { |
70 | ISAVGAMMState *s = opaque; | |
71 | ||
72 | return vga_ioport_read(&s->vga, addr >> s->it_shift); | |
73 | } | |
74 | ||
75 | static void vga_mm_writel (void *opaque, | |
a8170e5e | 76 | hwaddr addr, uint32_t value) |
79b97bf2 JQ |
77 | { |
78 | ISAVGAMMState *s = opaque; | |
79 | ||
80 | vga_ioport_write(&s->vga, addr >> s->it_shift, value); | |
81 | } | |
82 | ||
b1950430 AK |
83 | static const MemoryRegionOps vga_mm_ctrl_ops = { |
84 | .old_mmio = { | |
85 | .read = { | |
86 | vga_mm_readb, | |
87 | vga_mm_readw, | |
88 | vga_mm_readl, | |
89 | }, | |
90 | .write = { | |
91 | vga_mm_writeb, | |
92 | vga_mm_writew, | |
93 | vga_mm_writel, | |
94 | }, | |
95 | }, | |
96 | .endianness = DEVICE_NATIVE_ENDIAN, | |
79b97bf2 JQ |
97 | }; |
98 | ||
a8170e5e AK |
99 | static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base, |
100 | hwaddr ctrl_base, int it_shift, | |
be20f9e9 | 101 | MemoryRegion *address_space) |
79b97bf2 | 102 | { |
b1950430 | 103 | MemoryRegion *s_ioport_ctrl, *vga_io_memory; |
79b97bf2 JQ |
104 | |
105 | s->it_shift = it_shift; | |
7267c094 | 106 | s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl)); |
2c9b15ca | 107 | memory_region_init_io(s_ioport_ctrl, NULL, &vga_mm_ctrl_ops, s, |
b1950430 | 108 | "vga-mm-ctrl", 0x100000); |
bd8f2f5d | 109 | memory_region_set_flush_coalesced(s_ioport_ctrl); |
b1950430 | 110 | |
7267c094 | 111 | vga_io_memory = g_malloc(sizeof(*vga_io_memory)); |
b1950430 | 112 | /* XXX: endianness? */ |
2c9b15ca | 113 | memory_region_init_io(vga_io_memory, NULL, &vga_mem_ops, &s->vga, |
b1950430 | 114 | "vga-mem", 0x20000); |
79b97bf2 | 115 | |
0be71e32 | 116 | vmstate_register(NULL, 0, &vmstate_vga_common, s); |
79b97bf2 | 117 | |
be20f9e9 | 118 | memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl); |
79b97bf2 | 119 | s->vga.bank_offset = 0; |
be20f9e9 | 120 | memory_region_add_subregion(address_space, |
b1950430 AK |
121 | vram_base + 0x000a0000, vga_io_memory); |
122 | memory_region_set_coalescing(vga_io_memory); | |
79b97bf2 JQ |
123 | } |
124 | ||
a8170e5e AK |
125 | int isa_vga_mm_init(hwaddr vram_base, |
126 | hwaddr ctrl_base, int it_shift, | |
be20f9e9 | 127 | MemoryRegion *address_space) |
79b97bf2 JQ |
128 | { |
129 | ISAVGAMMState *s; | |
130 | ||
7267c094 | 131 | s = g_malloc0(sizeof(*s)); |
79b97bf2 | 132 | |
4a1e244e | 133 | s->vga.vram_size_mb = VGA_RAM_SIZE >> 20; |
e2bbfc8e | 134 | vga_common_init(&s->vga, NULL, true); |
be20f9e9 | 135 | vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space); |
79b97bf2 | 136 | |
5643706a | 137 | s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s); |
79b97bf2 | 138 | |
83118327 | 139 | vga_init_vbe(&s->vga, NULL, address_space); |
79b97bf2 JQ |
140 | return 0; |
141 | } |