]> Git Repo - qemu.git/blame - hw/nvram/mac_nvram.c
util: move declarations out of qemu-common.h
[qemu.git] / hw / nvram / mac_nvram.c
CommitLineData
3cbee15b
JM
1/*
2 * PowerMac NVRAM emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
0430891c 25#include "qemu/osdep.h"
83c9f4ca 26#include "hw/hw.h"
ec0503b4 27#include "hw/nvram/openbios_firmware_abi.h"
9c17d615 28#include "sysemu/sysemu.h"
83c9f4ca 29#include "hw/ppc/mac.h"
f348b6d1 30#include "qemu/cutils.h"
2d9907a3 31#include <zlib.h>
3cbee15b 32
ea026b2f
BS
33/* debug NVR */
34//#define DEBUG_NVR
35
36#ifdef DEBUG_NVR
001faf32
BS
37#define NVR_DPRINTF(fmt, ...) \
38 do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0)
ea026b2f 39#else
001faf32 40#define NVR_DPRINTF(fmt, ...)
ea026b2f
BS
41#endif
42
bd89f43f
AJ
43#define DEF_SYSTEM_SIZE 0xc10
44
3cbee15b 45/* macio style NVRAM device */
a8170e5e 46static void macio_nvram_writeb(void *opaque, hwaddr addr,
23c5e4ca 47 uint64_t value, unsigned size)
3cbee15b
JM
48{
49 MacIONVRAMState *s = opaque;
74e91155 50
68af3f24 51 addr = (addr >> s->it_shift) & (s->size - 1);
3cbee15b 52 s->data[addr] = value;
2f448e41
AM
53 NVR_DPRINTF("writeb addr %04" HWADDR_PRIx " val %" PRIx64 "\n",
54 addr, value);
3cbee15b
JM
55}
56
a8170e5e 57static uint64_t macio_nvram_readb(void *opaque, hwaddr addr,
23c5e4ca 58 unsigned size)
3cbee15b
JM
59{
60 MacIONVRAMState *s = opaque;
61 uint32_t value;
62
68af3f24 63 addr = (addr >> s->it_shift) & (s->size - 1);
3cbee15b 64 value = s->data[addr];
2f448e41
AM
65 NVR_DPRINTF("readb addr %04" HWADDR_PRIx " val %" PRIx32 "\n",
66 addr, value);
3cbee15b
JM
67
68 return value;
69}
70
23c5e4ca
AK
71static const MemoryRegionOps macio_nvram_ops = {
72 .read = macio_nvram_readb,
73 .write = macio_nvram_writeb,
b19eae18
AG
74 .valid.min_access_size = 1,
75 .valid.max_access_size = 4,
76 .impl.min_access_size = 1,
77 .impl.max_access_size = 1,
d8c6d07f 78 .endianness = DEVICE_BIG_ENDIAN,
3cbee15b
JM
79};
80
8e470f8a
JQ
81static const VMStateDescription vmstate_macio_nvram = {
82 .name = "macio_nvram",
83 .version_id = 1,
84 .minimum_version_id = 1,
35d08458 85 .fields = (VMStateField[]) {
8e470f8a
JQ
86 VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, 0, size),
87 VMSTATE_END_OF_LIST()
88 }
89};
9b64997f 90
9b64997f 91
95ed3b7c 92static void macio_nvram_reset(DeviceState *dev)
6e6b7363
BS
93{
94}
95
95ed3b7c 96static void macio_nvram_realizefn(DeviceState *dev, Error **errp)
3cbee15b 97{
95ed3b7c
AF
98 SysBusDevice *d = SYS_BUS_DEVICE(dev);
99 MacIONVRAMState *s = MACIO_NVRAM(dev);
74e91155 100
95ed3b7c 101 s->data = g_malloc0(s->size);
3f7cbbbd 102
eedfac6f
PB
103 memory_region_init_io(&s->mem, OBJECT(s), &macio_nvram_ops, s,
104 "macio-nvram", s->size << s->it_shift);
95ed3b7c
AF
105 sysbus_init_mmio(d, &s->mem);
106}
107
108static void macio_nvram_unrealizefn(DeviceState *dev, Error **errp)
109{
110 MacIONVRAMState *s = MACIO_NVRAM(dev);
111
112 g_free(s->data);
113}
3cbee15b 114
95ed3b7c
AF
115static Property macio_nvram_properties[] = {
116 DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0),
117 DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0),
118 DEFINE_PROP_END_OF_LIST()
119};
120
121static void macio_nvram_class_init(ObjectClass *oc, void *data)
122{
123 DeviceClass *dc = DEVICE_CLASS(oc);
124
125 dc->realize = macio_nvram_realizefn;
126 dc->unrealize = macio_nvram_unrealizefn;
127 dc->reset = macio_nvram_reset;
128 dc->vmsd = &vmstate_macio_nvram;
129 dc->props = macio_nvram_properties;
175fe9e7 130 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
3cbee15b
JM
131}
132
95ed3b7c
AF
133static const TypeInfo macio_nvram_type_info = {
134 .name = TYPE_MACIO_NVRAM,
135 .parent = TYPE_SYS_BUS_DEVICE,
136 .instance_size = sizeof(MacIONVRAMState),
137 .class_init = macio_nvram_class_init,
138};
139
140static void macio_nvram_register_types(void)
74e91155 141{
95ed3b7c 142 type_register_static(&macio_nvram_type_info);
74e91155
JM
143}
144
95efd11c 145/* Set up a system OpenBIOS NVRAM partition */
2d9907a3
AG
146static void pmac_format_nvram_partition_of(MacIONVRAMState *nvr, int off,
147 int len)
3cbee15b 148{
95efd11c 149 unsigned int i;
2d9907a3 150 uint32_t start = off, end;
95efd11c
BS
151 struct OpenBIOS_nvpart_v1 *part_header;
152
153 // OpenBIOS nvram variables
154 // Variable partition
2d9907a3 155 part_header = (struct OpenBIOS_nvpart_v1 *)&nvr->data[start];
95efd11c
BS
156 part_header->signature = OPENBIOS_PART_SYSTEM;
157 pstrcpy(part_header->name, sizeof(part_header->name), "system");
158
159 end = start + sizeof(struct OpenBIOS_nvpart_v1);
160 for (i = 0; i < nb_prom_envs; i++)
161 end = OpenBIOS_set_var(nvr->data, end, prom_envs[i]);
162
163 // End marker
164 nvr->data[end++] = '\0';
165
166 end = start + ((end - start + 15) & ~15);
bd89f43f
AJ
167 /* XXX: OpenBIOS is not able to grow up a partition. Leave some space for
168 new variables. */
169 if (end < DEF_SYSTEM_SIZE)
170 end = DEF_SYSTEM_SIZE;
95efd11c
BS
171 OpenBIOS_finish_partition(part_header, end - start);
172
173 // free partition
174 start = end;
175 part_header = (struct OpenBIOS_nvpart_v1 *)&nvr->data[start];
176 part_header->signature = OPENBIOS_PART_FREE;
177 pstrcpy(part_header->name, sizeof(part_header->name), "free");
178
179 end = len;
180 OpenBIOS_finish_partition(part_header, end - start);
3cbee15b 181}
95ed3b7c 182
2d9907a3
AG
183#define OSX_NVRAM_SIGNATURE (0x5A)
184
185/* Set up a Mac OS X NVRAM partition */
186static void pmac_format_nvram_partition_osx(MacIONVRAMState *nvr, int off,
187 int len)
188{
189 uint32_t start = off;
190 struct OpenBIOS_nvpart_v1 *part_header;
191 unsigned char *data = &nvr->data[start];
192
193 /* empty partition */
194 part_header = (struct OpenBIOS_nvpart_v1 *)data;
195 part_header->signature = OSX_NVRAM_SIGNATURE;
196 pstrcpy(part_header->name, sizeof(part_header->name), "wwwwwwwwwwww");
197
198 OpenBIOS_finish_partition(part_header, len);
199
200 /* Generation */
201 stl_be_p(&data[20], 2);
202
203 /* Adler32 checksum */
204 stl_be_p(&data[16], adler32(0, &data[20], len - 20));
205}
206
207/* Set up NVRAM with OF and OSX partitions */
208void pmac_format_nvram_partition(MacIONVRAMState *nvr, int len)
209{
210 /*
211 * Mac OS X expects side "B" of the flash at the second half of NVRAM,
212 * so we use half of the chip for OF and the other half for a free OSX
213 * partition.
214 */
215 pmac_format_nvram_partition_of(nvr, 0, len / 2);
216 pmac_format_nvram_partition_osx(nvr, len / 2, len / 2);
217}
95ed3b7c 218type_init(macio_nvram_register_types)
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