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b6f6e3d3 AL |
1 | #ifndef QEMU_SMBIOS_H |
2 | #define QEMU_SMBIOS_H | |
3 | /* | |
4 | * SMBIOS Support | |
5 | * | |
6 | * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. | |
7 | * | |
8 | * Authors: | |
9 | * Alex Williamson <[email protected]> | |
10 | * | |
11 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
12 | * the COPYING file in the top-level directory. | |
13 | * | |
14 | */ | |
15 | ||
4f953d2f MA |
16 | #include "qemu/option.h" |
17 | ||
2e6e8d7a GS |
18 | #define SMBIOS_MAX_TYPE 127 |
19 | ||
4f953d2f | 20 | void smbios_entry_add(QemuOpts *opts); |
c97294ec | 21 | void smbios_set_cpuid(uint32_t version, uint32_t features); |
e6667f71 | 22 | void smbios_set_defaults(const char *manufacturer, const char *product, |
c97294ec | 23 | const char *version, bool legacy_mode); |
e6667f71 | 24 | uint8_t *smbios_get_table_legacy(size_t *length); |
c97294ec GS |
25 | void smbios_get_tables(uint8_t **tables, size_t *tables_len, |
26 | uint8_t **anchor, size_t *anchor_len); | |
b6f6e3d3 AL |
27 | |
28 | /* | |
29 | * SMBIOS spec defined tables | |
30 | */ | |
31 | ||
e41fca3d GS |
32 | /* SMBIOS entry point (anchor). |
33 | * BIOS must place this at a 16-bit-aligned address between 0xf0000 and 0xfffff. | |
34 | */ | |
35 | struct smbios_entry_point { | |
36 | uint8_t anchor_string[4]; | |
37 | uint8_t checksum; | |
38 | uint8_t length; | |
39 | uint8_t smbios_major_version; | |
40 | uint8_t smbios_minor_version; | |
41 | uint16_t max_structure_size; | |
42 | uint8_t entry_point_revision; | |
43 | uint8_t formatted_area[5]; | |
44 | uint8_t intermediate_anchor_string[5]; | |
45 | uint8_t intermediate_checksum; | |
46 | uint16_t structure_table_length; | |
47 | uint32_t structure_table_address; | |
48 | uint16_t number_of_structures; | |
49 | uint8_t smbios_bcd_revision; | |
50 | } QEMU_PACKED; | |
51 | ||
b6f6e3d3 AL |
52 | /* This goes at the beginning of every SMBIOS structure. */ |
53 | struct smbios_structure_header { | |
54 | uint8_t type; | |
55 | uint8_t length; | |
56 | uint16_t handle; | |
541dc0d4 | 57 | } QEMU_PACKED; |
b6f6e3d3 AL |
58 | |
59 | /* SMBIOS type 0 - BIOS Information */ | |
60 | struct smbios_type_0 { | |
61 | struct smbios_structure_header header; | |
62 | uint8_t vendor_str; | |
63 | uint8_t bios_version_str; | |
64 | uint16_t bios_starting_address_segment; | |
65 | uint8_t bios_release_date_str; | |
66 | uint8_t bios_rom_size; | |
84351843 | 67 | uint64_t bios_characteristics; |
b6f6e3d3 AL |
68 | uint8_t bios_characteristics_extension_bytes[2]; |
69 | uint8_t system_bios_major_release; | |
70 | uint8_t system_bios_minor_release; | |
71 | uint8_t embedded_controller_major_release; | |
72 | uint8_t embedded_controller_minor_release; | |
541dc0d4 | 73 | } QEMU_PACKED; |
b6f6e3d3 AL |
74 | |
75 | /* SMBIOS type 1 - System Information */ | |
76 | struct smbios_type_1 { | |
77 | struct smbios_structure_header header; | |
78 | uint8_t manufacturer_str; | |
79 | uint8_t product_name_str; | |
80 | uint8_t version_str; | |
81 | uint8_t serial_number_str; | |
82 | uint8_t uuid[16]; | |
83 | uint8_t wake_up_type; | |
84 | uint8_t sku_number_str; | |
85 | uint8_t family_str; | |
541dc0d4 | 86 | } QEMU_PACKED; |
b6f6e3d3 | 87 | |
e41fca3d GS |
88 | /* SMBIOS type 2 - Base Board */ |
89 | struct smbios_type_2 { | |
90 | struct smbios_structure_header header; | |
91 | uint8_t manufacturer_str; | |
92 | uint8_t product_str; | |
93 | uint8_t version_str; | |
94 | uint8_t serial_number_str; | |
95 | uint8_t asset_tag_number_str; | |
96 | uint8_t feature_flags; | |
97 | uint8_t location_str; | |
98 | uint16_t chassis_handle; | |
99 | uint8_t board_type; | |
100 | uint8_t contained_element_count; | |
101 | /* contained elements follow */ | |
102 | } QEMU_PACKED; | |
103 | ||
104 | /* SMBIOS type 3 - System Enclosure (v2.7) */ | |
b6f6e3d3 AL |
105 | struct smbios_type_3 { |
106 | struct smbios_structure_header header; | |
107 | uint8_t manufacturer_str; | |
108 | uint8_t type; | |
109 | uint8_t version_str; | |
110 | uint8_t serial_number_str; | |
111 | uint8_t asset_tag_number_str; | |
112 | uint8_t boot_up_state; | |
113 | uint8_t power_supply_state; | |
114 | uint8_t thermal_state; | |
115 | uint8_t security_status; | |
116 | uint32_t oem_defined; | |
117 | uint8_t height; | |
118 | uint8_t number_of_power_cords; | |
119 | uint8_t contained_element_count; | |
e41fca3d GS |
120 | uint8_t sku_number_str; |
121 | /* contained elements follow */ | |
541dc0d4 | 122 | } QEMU_PACKED; |
b6f6e3d3 | 123 | |
e41fca3d | 124 | /* SMBIOS type 4 - Processor Information (v2.6) */ |
b6f6e3d3 AL |
125 | struct smbios_type_4 { |
126 | struct smbios_structure_header header; | |
127 | uint8_t socket_designation_str; | |
128 | uint8_t processor_type; | |
129 | uint8_t processor_family; | |
130 | uint8_t processor_manufacturer_str; | |
131 | uint32_t processor_id[2]; | |
132 | uint8_t processor_version_str; | |
133 | uint8_t voltage; | |
134 | uint16_t external_clock; | |
135 | uint16_t max_speed; | |
136 | uint16_t current_speed; | |
137 | uint8_t status; | |
138 | uint8_t processor_upgrade; | |
139 | uint16_t l1_cache_handle; | |
140 | uint16_t l2_cache_handle; | |
141 | uint16_t l3_cache_handle; | |
e41fca3d GS |
142 | uint8_t serial_number_str; |
143 | uint8_t asset_tag_number_str; | |
144 | uint8_t part_number_str; | |
145 | uint8_t core_count; | |
146 | uint8_t core_enabled; | |
147 | uint8_t thread_count; | |
148 | uint16_t processor_characteristics; | |
149 | uint16_t processor_family2; | |
541dc0d4 | 150 | } QEMU_PACKED; |
b6f6e3d3 | 151 | |
e41fca3d | 152 | /* SMBIOS type 16 - Physical Memory Array (v2.7) */ |
b6f6e3d3 AL |
153 | struct smbios_type_16 { |
154 | struct smbios_structure_header header; | |
155 | uint8_t location; | |
156 | uint8_t use; | |
157 | uint8_t error_correction; | |
158 | uint32_t maximum_capacity; | |
159 | uint16_t memory_error_information_handle; | |
160 | uint16_t number_of_memory_devices; | |
e41fca3d | 161 | uint64_t extended_maximum_capacity; |
541dc0d4 | 162 | } QEMU_PACKED; |
e41fca3d GS |
163 | |
164 | /* SMBIOS type 17 - Memory Device (v2.8) */ | |
b6f6e3d3 AL |
165 | struct smbios_type_17 { |
166 | struct smbios_structure_header header; | |
167 | uint16_t physical_memory_array_handle; | |
168 | uint16_t memory_error_information_handle; | |
169 | uint16_t total_width; | |
170 | uint16_t data_width; | |
171 | uint16_t size; | |
172 | uint8_t form_factor; | |
173 | uint8_t device_set; | |
174 | uint8_t device_locator_str; | |
175 | uint8_t bank_locator_str; | |
176 | uint8_t memory_type; | |
177 | uint16_t type_detail; | |
e41fca3d GS |
178 | uint16_t speed; |
179 | uint8_t manufacturer_str; | |
180 | uint8_t serial_number_str; | |
181 | uint8_t asset_tag_number_str; | |
182 | uint8_t part_number_str; | |
183 | uint8_t attributes; | |
184 | uint32_t extended_size; | |
0d73394a GS |
185 | uint16_t configured_clock_speed; |
186 | uint16_t minimum_voltage; | |
187 | uint16_t maximum_voltage; | |
188 | uint16_t configured_voltage; | |
541dc0d4 | 189 | } QEMU_PACKED; |
b6f6e3d3 | 190 | |
e41fca3d | 191 | /* SMBIOS type 19 - Memory Array Mapped Address (v2.7) */ |
b6f6e3d3 AL |
192 | struct smbios_type_19 { |
193 | struct smbios_structure_header header; | |
194 | uint32_t starting_address; | |
195 | uint32_t ending_address; | |
196 | uint16_t memory_array_handle; | |
197 | uint8_t partition_width; | |
e41fca3d GS |
198 | uint64_t extended_starting_address; |
199 | uint64_t extended_ending_address; | |
541dc0d4 | 200 | } QEMU_PACKED; |
b6f6e3d3 AL |
201 | |
202 | /* SMBIOS type 32 - System Boot Information */ | |
203 | struct smbios_type_32 { | |
204 | struct smbios_structure_header header; | |
205 | uint8_t reserved[6]; | |
206 | uint8_t boot_status; | |
541dc0d4 | 207 | } QEMU_PACKED; |
b6f6e3d3 AL |
208 | |
209 | /* SMBIOS type 127 -- End-of-table */ | |
210 | struct smbios_type_127 { | |
211 | struct smbios_structure_header header; | |
541dc0d4 | 212 | } QEMU_PACKED; |
b6f6e3d3 AL |
213 | |
214 | #endif /*QEMU_SMBIOS_H */ |