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1d14ffa9 FB |
1 | /* |
2 | * QEMU ES1370 emulation | |
3 | * | |
4 | * Copyright (c) 2005 Vassili Karpov (malc) | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* #define DEBUG_ES1370 */ | |
26 | /* #define VERBOSE_ES1370 */ | |
27 | #define SILENT_ES1370 | |
28 | ||
6086a565 | 29 | #include "qemu/osdep.h" |
83c9f4ca | 30 | #include "hw/hw.h" |
8a824e4d | 31 | #include "hw/audio/soundhw.h" |
87ecb68b | 32 | #include "audio/audio.h" |
83c9f4ca | 33 | #include "hw/pci/pci.h" |
9c17d615 | 34 | #include "sysemu/dma.h" |
1d14ffa9 FB |
35 | |
36 | /* Missing stuff: | |
37 | SCTRL_P[12](END|ST)INC | |
38 | SCTRL_P1SCTRLD | |
39 | SCTRL_P2DACSEN | |
40 | CTRL_DAC_SYNC | |
41 | MIDI | |
42 | non looped mode | |
43 | surely more | |
44 | */ | |
45 | ||
46 | /* | |
47 | Following macros and samplerate array were copied verbatim from | |
48 | Linux kernel 2.4.30: drivers/sound/es1370.c | |
49 | ||
50 | Copyright (C) 1998-2001, 2003 Thomas Sailer ([email protected]) | |
51 | */ | |
52 | ||
53 | /* Start blatant GPL violation */ | |
54 | ||
55 | #define ES1370_REG_CONTROL 0x00 | |
56 | #define ES1370_REG_STATUS 0x04 | |
57 | #define ES1370_REG_UART_DATA 0x08 | |
58 | #define ES1370_REG_UART_STATUS 0x09 | |
59 | #define ES1370_REG_UART_CONTROL 0x09 | |
60 | #define ES1370_REG_UART_TEST 0x0a | |
61 | #define ES1370_REG_MEMPAGE 0x0c | |
62 | #define ES1370_REG_CODEC 0x10 | |
63 | #define ES1370_REG_SERIAL_CONTROL 0x20 | |
64 | #define ES1370_REG_DAC1_SCOUNT 0x24 | |
65 | #define ES1370_REG_DAC2_SCOUNT 0x28 | |
66 | #define ES1370_REG_ADC_SCOUNT 0x2c | |
67 | ||
68 | #define ES1370_REG_DAC1_FRAMEADR 0xc30 | |
69 | #define ES1370_REG_DAC1_FRAMECNT 0xc34 | |
70 | #define ES1370_REG_DAC2_FRAMEADR 0xc38 | |
71 | #define ES1370_REG_DAC2_FRAMECNT 0xc3c | |
72 | #define ES1370_REG_ADC_FRAMEADR 0xd30 | |
73 | #define ES1370_REG_ADC_FRAMECNT 0xd34 | |
74 | #define ES1370_REG_PHANTOM_FRAMEADR 0xd38 | |
75 | #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c | |
76 | ||
77 | static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 }; | |
78 | ||
79 | #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2) | |
80 | #define DAC2_DIVTOSR(x) (1411200/((x)+2)) | |
81 | ||
82 | #define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ | |
83 | #define CTRL_XCTL1 0x40000000 /* electret mic bias */ | |
84 | #define CTRL_OPEN 0x20000000 /* no function, can be read and written */ | |
85 | #define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ | |
86 | #define CTRL_SH_PCLKDIV 16 | |
87 | #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */ | |
88 | #define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ | |
89 | #define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */ | |
90 | #define CTRL_SH_WTSRSEL 12 | |
91 | #define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ | |
92 | #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ | |
93 | #define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */ | |
94 | #define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ | |
95 | #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ | |
96 | #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ | |
97 | #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ | |
98 | #define CTRL_ADC_EN 0x00000010 /* enable ADC */ | |
99 | #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ | |
100 | #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */ | |
101 | #define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ | |
102 | #define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ | |
103 | ||
104 | #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ | |
105 | #define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */ | |
106 | #define STAT_CBUSY 0x00000200 /* 1 = codec busy */ | |
107 | #define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ | |
108 | #define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */ | |
109 | #define STAT_SH_VC 5 | |
110 | #define STAT_MCCB 0x00000010 /* CCB int pending */ | |
111 | #define STAT_UART 0x00000008 /* UART int pending */ | |
112 | #define STAT_DAC1 0x00000004 /* DAC1 int pending */ | |
113 | #define STAT_DAC2 0x00000002 /* DAC2 int pending */ | |
114 | #define STAT_ADC 0x00000001 /* ADC int pending */ | |
115 | ||
116 | #define USTAT_RXINT 0x80 /* UART rx int pending */ | |
117 | #define USTAT_TXINT 0x04 /* UART tx int pending */ | |
118 | #define USTAT_TXRDY 0x02 /* UART tx ready */ | |
119 | #define USTAT_RXRDY 0x01 /* UART rx ready */ | |
120 | ||
121 | #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */ | |
122 | #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */ | |
123 | #define UCTRL_ENA_TXINT 0x20 /* enable TX int */ | |
124 | #define UCTRL_CNTRL 0x03 /* control field */ | |
125 | #define UCTRL_CNTRL_SWR 0x03 /* software reset command */ | |
126 | ||
127 | #define SCTRL_P2ENDINC 0x00380000 /* */ | |
128 | #define SCTRL_SH_P2ENDINC 19 | |
129 | #define SCTRL_P2STINC 0x00070000 /* */ | |
130 | #define SCTRL_SH_P2STINC 16 | |
131 | #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ | |
132 | #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ | |
133 | #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ | |
134 | #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ | |
135 | #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ | |
136 | #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ | |
137 | #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ | |
138 | #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ | |
139 | #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */ | |
140 | #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */ | |
141 | #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ | |
142 | #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ | |
143 | #define SCTRL_R1FMT 0x00000030 /* format mask */ | |
144 | #define SCTRL_SH_R1FMT 4 | |
145 | #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ | |
146 | #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ | |
147 | #define SCTRL_P2FMT 0x0000000c /* format mask */ | |
148 | #define SCTRL_SH_P2FMT 2 | |
149 | #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ | |
150 | #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ | |
151 | #define SCTRL_P1FMT 0x00000003 /* format mask */ | |
152 | #define SCTRL_SH_P1FMT 0 | |
153 | ||
154 | /* End blatant GPL violation */ | |
155 | ||
156 | #define NB_CHANNELS 3 | |
157 | #define DAC1_CHANNEL 0 | |
158 | #define DAC2_CHANNEL 1 | |
159 | #define ADC_CHANNEL 2 | |
160 | ||
1d14ffa9 FB |
161 | static void es1370_dac1_callback (void *opaque, int free); |
162 | static void es1370_dac2_callback (void *opaque, int free); | |
163 | static void es1370_adc_callback (void *opaque, int avail); | |
164 | ||
165 | #ifdef DEBUG_ES1370 | |
166 | ||
167 | #define ldebug(...) AUD_log ("es1370", __VA_ARGS__) | |
168 | ||
169 | static void print_ctl (uint32_t val) | |
170 | { | |
171 | char buf[1024]; | |
172 | ||
173 | buf[0] = '\0'; | |
174 | #define a(n) if (val & CTRL_##n) strcat (buf, " "#n) | |
175 | a (ADC_STOP); | |
176 | a (XCTL1); | |
177 | a (OPEN); | |
178 | a (MSFMTSEL); | |
179 | a (M_SBB); | |
180 | a (DAC_SYNC); | |
181 | a (CCB_INTRM); | |
182 | a (M_CB); | |
183 | a (XCTL0); | |
184 | a (BREQ); | |
185 | a (DAC1_EN); | |
186 | a (DAC2_EN); | |
187 | a (ADC_EN); | |
188 | a (UART_EN); | |
189 | a (JYSTK_EN); | |
190 | a (CDC_EN); | |
191 | a (SERR_DIS); | |
192 | #undef a | |
193 | AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n", | |
194 | (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV, | |
195 | DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), | |
196 | dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], | |
197 | buf); | |
198 | } | |
199 | ||
200 | static void print_sctl (uint32_t val) | |
201 | { | |
202 | static const char *fmt_names[] = {"8M", "8S", "16M", "16S"}; | |
203 | char buf[1024]; | |
204 | ||
205 | buf[0] = '\0'; | |
206 | ||
207 | #define a(n) if (val & SCTRL_##n) strcat (buf, " "#n) | |
208 | #define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n) | |
209 | b (R1LOOPSEL); | |
210 | b (P2LOOPSEL); | |
211 | b (P1LOOPSEL); | |
212 | a (P2PAUSE); | |
213 | a (P1PAUSE); | |
214 | a (R1INTEN); | |
215 | a (P2INTEN); | |
216 | a (P1INTEN); | |
217 | a (P1SCTRLD); | |
218 | a (P2DACSEN); | |
219 | if (buf[0]) { | |
220 | strcat (buf, "\n "); | |
221 | } | |
222 | else { | |
223 | buf[0] = ' '; | |
224 | buf[1] = '\0'; | |
225 | } | |
226 | #undef b | |
227 | #undef a | |
228 | AUD_log ("es1370", | |
229 | "%s" | |
230 | "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n", | |
231 | buf, | |
232 | (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC, | |
233 | (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC, | |
234 | fmt_names [(val >> SCTRL_SH_R1FMT) & 3], | |
235 | fmt_names [(val >> SCTRL_SH_P2FMT) & 3], | |
236 | fmt_names [(val >> SCTRL_SH_P1FMT) & 3] | |
237 | ); | |
238 | } | |
239 | #else | |
240 | #define ldebug(...) | |
241 | #define print_ctl(...) | |
242 | #define print_sctl(...) | |
243 | #endif | |
244 | ||
245 | #ifdef VERBOSE_ES1370 | |
246 | #define dolog(...) AUD_log ("es1370", __VA_ARGS__) | |
247 | #else | |
248 | #define dolog(...) | |
249 | #endif | |
250 | ||
251 | #ifndef SILENT_ES1370 | |
946fc947 | 252 | #define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__) |
1d14ffa9 FB |
253 | #else |
254 | #define lwarn(...) | |
255 | #endif | |
256 | ||
257 | struct chan { | |
258 | uint32_t shift; | |
259 | uint32_t leftover; | |
260 | uint32_t scount; | |
261 | uint32_t frame_addr; | |
262 | uint32_t frame_cnt; | |
263 | }; | |
264 | ||
265 | typedef struct ES1370State { | |
e5944641 | 266 | PCIDevice dev; |
c0fe3827 | 267 | QEMUSoundCard card; |
e1a99dbd | 268 | MemoryRegion io; |
1d14ffa9 FB |
269 | struct chan chan[NB_CHANNELS]; |
270 | SWVoiceOut *dac_voice[2]; | |
271 | SWVoiceIn *adc_voice; | |
272 | ||
273 | uint32_t ctl; | |
274 | uint32_t status; | |
275 | uint32_t mempage; | |
276 | uint32_t codec; | |
277 | uint32_t sctl; | |
278 | } ES1370State; | |
279 | ||
1d14ffa9 FB |
280 | struct chan_bits { |
281 | uint32_t ctl_en; | |
282 | uint32_t stat_int; | |
283 | uint32_t sctl_pause; | |
284 | uint32_t sctl_inten; | |
285 | uint32_t sctl_fmt; | |
286 | uint32_t sctl_sh_fmt; | |
287 | uint32_t sctl_loopsel; | |
288 | void (*calc_freq) (ES1370State *s, uint32_t ctl, | |
289 | uint32_t *old_freq, uint32_t *new_freq); | |
290 | }; | |
291 | ||
0d769044 C |
292 | #define TYPE_ES1370 "ES1370" |
293 | #define ES1370(obj) \ | |
294 | OBJECT_CHECK(ES1370State, (obj), TYPE_ES1370) | |
295 | ||
1d14ffa9 FB |
296 | static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, |
297 | uint32_t *old_freq, uint32_t *new_freq); | |
298 | static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, | |
299 | uint32_t *old_freq, | |
300 | uint32_t *new_freq); | |
301 | ||
302 | static const struct chan_bits es1370_chan_bits[] = { | |
303 | {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN, | |
304 | SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL, | |
305 | es1370_dac1_calc_freq}, | |
306 | ||
307 | {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN, | |
308 | SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL, | |
309 | es1370_dac2_and_adc_calc_freq}, | |
310 | ||
311 | {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN, | |
312 | SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL, | |
313 | es1370_dac2_and_adc_calc_freq} | |
314 | }; | |
315 | ||
316 | static void es1370_update_status (ES1370State *s, uint32_t new_status) | |
317 | { | |
318 | uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC); | |
319 | ||
320 | if (level) { | |
321 | s->status = new_status | STAT_INTR; | |
322 | } | |
323 | else { | |
324 | s->status = new_status & ~STAT_INTR; | |
325 | } | |
9e64f8a3 | 326 | pci_set_irq(&s->dev, !!level); |
1d14ffa9 FB |
327 | } |
328 | ||
329 | static void es1370_reset (ES1370State *s) | |
330 | { | |
331 | size_t i; | |
332 | ||
333 | s->ctl = 1; | |
334 | s->status = 0x60; | |
335 | s->mempage = 0; | |
336 | s->codec = 0; | |
337 | s->sctl = 0; | |
338 | ||
339 | for (i = 0; i < NB_CHANNELS; ++i) { | |
340 | struct chan *d = &s->chan[i]; | |
341 | d->scount = 0; | |
342 | d->leftover = 0; | |
343 | if (i == ADC_CHANNEL) { | |
c0fe3827 | 344 | AUD_close_in (&s->card, s->adc_voice); |
1d14ffa9 FB |
345 | s->adc_voice = NULL; |
346 | } | |
347 | else { | |
c0fe3827 | 348 | AUD_close_out (&s->card, s->dac_voice[i]); |
1d14ffa9 FB |
349 | s->dac_voice[i] = NULL; |
350 | } | |
351 | } | |
9e64f8a3 | 352 | pci_irq_deassert(&s->dev); |
1d14ffa9 FB |
353 | } |
354 | ||
355 | static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl) | |
356 | { | |
357 | uint32_t new_status = s->status; | |
358 | ||
359 | if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) { | |
360 | new_status &= ~STAT_DAC1; | |
361 | } | |
362 | ||
363 | if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) { | |
364 | new_status &= ~STAT_DAC2; | |
365 | } | |
366 | ||
367 | if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) { | |
368 | new_status &= ~STAT_ADC; | |
369 | } | |
370 | ||
371 | if (new_status != s->status) { | |
372 | es1370_update_status (s, new_status); | |
373 | } | |
374 | } | |
375 | ||
376 | static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, | |
377 | uint32_t *old_freq, uint32_t *new_freq) | |
378 | ||
379 | { | |
380 | *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; | |
381 | *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; | |
382 | } | |
383 | ||
384 | static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, | |
385 | uint32_t *old_freq, | |
386 | uint32_t *new_freq) | |
387 | ||
388 | { | |
389 | uint32_t old_pclkdiv, new_pclkdiv; | |
390 | ||
391 | new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; | |
392 | old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; | |
393 | *new_freq = DAC2_DIVTOSR (new_pclkdiv); | |
394 | *old_freq = DAC2_DIVTOSR (old_pclkdiv); | |
395 | } | |
396 | ||
397 | static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) | |
398 | { | |
399 | size_t i; | |
400 | uint32_t old_freq, new_freq, old_fmt, new_fmt; | |
401 | ||
402 | for (i = 0; i < NB_CHANNELS; ++i) { | |
403 | struct chan *d = &s->chan[i]; | |
404 | const struct chan_bits *b = &es1370_chan_bits[i]; | |
405 | ||
406 | new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt; | |
407 | old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt; | |
408 | ||
409 | b->calc_freq (s, ctl, &old_freq, &new_freq); | |
410 | ||
411 | if ((old_fmt != new_fmt) || (old_freq != new_freq)) { | |
412 | d->shift = (new_fmt & 1) + (new_fmt >> 1); | |
f8687bab | 413 | ldebug ("channel %zu, freq = %d, nchannels %d, fmt %d, shift %d\n", |
1d14ffa9 FB |
414 | i, |
415 | new_freq, | |
416 | 1 << (new_fmt & 1), | |
417 | (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8, | |
418 | d->shift); | |
419 | if (new_freq) { | |
1ea879e5 | 420 | struct audsettings as; |
c0fe3827 FB |
421 | |
422 | as.freq = new_freq; | |
423 | as.nchannels = 1 << (new_fmt & 1); | |
424 | as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8; | |
d929eba5 | 425 | as.endianness = 0; |
c0fe3827 | 426 | |
1d14ffa9 FB |
427 | if (i == ADC_CHANNEL) { |
428 | s->adc_voice = | |
429 | AUD_open_in ( | |
c0fe3827 | 430 | &s->card, |
1d14ffa9 FB |
431 | s->adc_voice, |
432 | "es1370.adc", | |
433 | s, | |
434 | es1370_adc_callback, | |
d929eba5 | 435 | &as |
1d14ffa9 FB |
436 | ); |
437 | } | |
438 | else { | |
439 | s->dac_voice[i] = | |
440 | AUD_open_out ( | |
c0fe3827 | 441 | &s->card, |
1d14ffa9 FB |
442 | s->dac_voice[i], |
443 | i ? "es1370.dac2" : "es1370.dac1", | |
444 | s, | |
445 | i ? es1370_dac2_callback : es1370_dac1_callback, | |
d929eba5 | 446 | &as |
1d14ffa9 FB |
447 | ); |
448 | } | |
449 | } | |
450 | } | |
451 | ||
452 | if (((ctl ^ s->ctl) & b->ctl_en) | |
453 | || ((sctl ^ s->sctl) & b->sctl_pause)) { | |
454 | int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause); | |
455 | ||
456 | if (i == ADC_CHANNEL) { | |
457 | AUD_set_active_in (s->adc_voice, on); | |
458 | } | |
459 | else { | |
460 | AUD_set_active_out (s->dac_voice[i], on); | |
461 | } | |
462 | } | |
463 | } | |
464 | ||
465 | s->ctl = ctl; | |
466 | s->sctl = sctl; | |
467 | } | |
468 | ||
469 | static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr) | |
470 | { | |
471 | addr &= 0xff; | |
472 | if (addr >= 0x30 && addr <= 0x3f) | |
473 | addr |= s->mempage << 8; | |
474 | return addr; | |
475 | } | |
476 | ||
8307c294 | 477 | static void es1370_writeb(void *opaque, uint32_t addr, uint32_t val) |
1d14ffa9 FB |
478 | { |
479 | ES1370State *s = opaque; | |
1d14ffa9 FB |
480 | uint32_t shift, mask; |
481 | ||
8ead62cf FB |
482 | addr = es1370_fixup (s, addr); |
483 | ||
1d14ffa9 FB |
484 | switch (addr) { |
485 | case ES1370_REG_CONTROL: | |
486 | case ES1370_REG_CONTROL + 1: | |
487 | case ES1370_REG_CONTROL + 2: | |
488 | case ES1370_REG_CONTROL + 3: | |
489 | shift = (addr - ES1370_REG_CONTROL) << 3; | |
490 | mask = 0xff << shift; | |
491 | val = (s->ctl & ~mask) | ((val & 0xff) << shift); | |
492 | es1370_update_voices (s, val, s->sctl); | |
493 | print_ctl (val); | |
494 | break; | |
495 | case ES1370_REG_MEMPAGE: | |
496 | s->mempage = val; | |
497 | break; | |
498 | case ES1370_REG_SERIAL_CONTROL: | |
499 | case ES1370_REG_SERIAL_CONTROL + 1: | |
500 | case ES1370_REG_SERIAL_CONTROL + 2: | |
501 | case ES1370_REG_SERIAL_CONTROL + 3: | |
502 | shift = (addr - ES1370_REG_SERIAL_CONTROL) << 3; | |
503 | mask = 0xff << shift; | |
504 | val = (s->sctl & ~mask) | ((val & 0xff) << shift); | |
505 | es1370_maybe_lower_irq (s, val); | |
506 | es1370_update_voices (s, s->ctl, val); | |
507 | print_sctl (val); | |
508 | break; | |
509 | default: | |
510 | lwarn ("writeb %#x <- %#x\n", addr, val); | |
511 | break; | |
512 | } | |
513 | } | |
514 | ||
8307c294 | 515 | static void es1370_writew(void *opaque, uint32_t addr, uint32_t val) |
1d14ffa9 FB |
516 | { |
517 | ES1370State *s = opaque; | |
518 | addr = es1370_fixup (s, addr); | |
519 | uint32_t shift, mask; | |
520 | struct chan *d = &s->chan[0]; | |
521 | ||
522 | switch (addr) { | |
523 | case ES1370_REG_CODEC: | |
524 | dolog ("ignored codec write address %#x, data %#x\n", | |
525 | (val >> 8) & 0xff, val & 0xff); | |
526 | s->codec = val; | |
527 | break; | |
528 | ||
529 | case ES1370_REG_CONTROL: | |
530 | case ES1370_REG_CONTROL + 2: | |
531 | shift = (addr != ES1370_REG_CONTROL) << 4; | |
532 | mask = 0xffff << shift; | |
533 | val = (s->ctl & ~mask) | ((val & 0xffff) << shift); | |
534 | es1370_update_voices (s, val, s->sctl); | |
535 | print_ctl (val); | |
536 | break; | |
537 | ||
538 | case ES1370_REG_ADC_SCOUNT: | |
539 | d++; | |
540 | case ES1370_REG_DAC2_SCOUNT: | |
541 | d++; | |
542 | case ES1370_REG_DAC1_SCOUNT: | |
543 | d->scount = (d->scount & ~0xffff) | (val & 0xffff); | |
544 | break; | |
545 | ||
546 | default: | |
547 | lwarn ("writew %#x <- %#x\n", addr, val); | |
548 | break; | |
549 | } | |
550 | } | |
551 | ||
8307c294 | 552 | static void es1370_writel(void *opaque, uint32_t addr, uint32_t val) |
1d14ffa9 FB |
553 | { |
554 | ES1370State *s = opaque; | |
555 | struct chan *d = &s->chan[0]; | |
556 | ||
557 | addr = es1370_fixup (s, addr); | |
558 | ||
559 | switch (addr) { | |
560 | case ES1370_REG_CONTROL: | |
561 | es1370_update_voices (s, val, s->sctl); | |
562 | print_ctl (val); | |
563 | break; | |
564 | ||
565 | case ES1370_REG_MEMPAGE: | |
566 | s->mempage = val & 0xf; | |
567 | break; | |
568 | ||
569 | case ES1370_REG_SERIAL_CONTROL: | |
570 | es1370_maybe_lower_irq (s, val); | |
571 | es1370_update_voices (s, s->ctl, val); | |
572 | print_sctl (val); | |
573 | break; | |
574 | ||
575 | case ES1370_REG_ADC_SCOUNT: | |
576 | d++; | |
577 | case ES1370_REG_DAC2_SCOUNT: | |
578 | d++; | |
579 | case ES1370_REG_DAC1_SCOUNT: | |
580 | d->scount = (val & 0xffff) | (d->scount & ~0xffff); | |
f8687bab | 581 | ldebug ("chan %td CURR_SAMP_CT %d, SAMP_CT %d\n", |
1d14ffa9 FB |
582 | d - &s->chan[0], val >> 16, (val & 0xffff)); |
583 | break; | |
584 | ||
585 | case ES1370_REG_ADC_FRAMEADR: | |
586 | d++; | |
587 | case ES1370_REG_DAC2_FRAMEADR: | |
588 | d++; | |
589 | case ES1370_REG_DAC1_FRAMEADR: | |
590 | d->frame_addr = val; | |
f8687bab | 591 | ldebug ("chan %td frame address %#x\n", d - &s->chan[0], val); |
1d14ffa9 FB |
592 | break; |
593 | ||
946fc947 FB |
594 | case ES1370_REG_PHANTOM_FRAMECNT: |
595 | lwarn ("writing to phantom frame count %#x\n", val); | |
596 | break; | |
597 | case ES1370_REG_PHANTOM_FRAMEADR: | |
598 | lwarn ("writing to phantom frame address %#x\n", val); | |
599 | break; | |
600 | ||
1d14ffa9 FB |
601 | case ES1370_REG_ADC_FRAMECNT: |
602 | d++; | |
603 | case ES1370_REG_DAC2_FRAMECNT: | |
604 | d++; | |
605 | case ES1370_REG_DAC1_FRAMECNT: | |
606 | d->frame_cnt = val; | |
607 | d->leftover = 0; | |
f8687bab | 608 | ldebug ("chan %td frame count %d, buffer size %d\n", |
1d14ffa9 FB |
609 | d - &s->chan[0], val >> 16, val & 0xffff); |
610 | break; | |
611 | ||
612 | default: | |
613 | lwarn ("writel %#x <- %#x\n", addr, val); | |
614 | break; | |
615 | } | |
616 | } | |
617 | ||
8307c294 | 618 | static uint32_t es1370_readb(void *opaque, uint32_t addr) |
1d14ffa9 FB |
619 | { |
620 | ES1370State *s = opaque; | |
621 | uint32_t val; | |
622 | ||
623 | addr = es1370_fixup (s, addr); | |
624 | ||
625 | switch (addr) { | |
626 | case 0x1b: /* Legacy */ | |
627 | lwarn ("Attempt to read from legacy register\n"); | |
628 | val = 5; | |
629 | break; | |
630 | case ES1370_REG_MEMPAGE: | |
631 | val = s->mempage; | |
632 | break; | |
633 | case ES1370_REG_CONTROL + 0: | |
634 | case ES1370_REG_CONTROL + 1: | |
635 | case ES1370_REG_CONTROL + 2: | |
636 | case ES1370_REG_CONTROL + 3: | |
637 | val = s->ctl >> ((addr - ES1370_REG_CONTROL) << 3); | |
638 | break; | |
639 | case ES1370_REG_STATUS + 0: | |
640 | case ES1370_REG_STATUS + 1: | |
641 | case ES1370_REG_STATUS + 2: | |
642 | case ES1370_REG_STATUS + 3: | |
643 | val = s->status >> ((addr - ES1370_REG_STATUS) << 3); | |
644 | break; | |
645 | default: | |
646 | val = ~0; | |
647 | lwarn ("readb %#x -> %#x\n", addr, val); | |
648 | break; | |
649 | } | |
650 | return val; | |
651 | } | |
652 | ||
8307c294 | 653 | static uint32_t es1370_readw(void *opaque, uint32_t addr) |
1d14ffa9 FB |
654 | { |
655 | ES1370State *s = opaque; | |
656 | struct chan *d = &s->chan[0]; | |
657 | uint32_t val; | |
658 | ||
659 | addr = es1370_fixup (s, addr); | |
660 | ||
661 | switch (addr) { | |
662 | case ES1370_REG_ADC_SCOUNT + 2: | |
663 | d++; | |
664 | case ES1370_REG_DAC2_SCOUNT + 2: | |
665 | d++; | |
666 | case ES1370_REG_DAC1_SCOUNT + 2: | |
667 | val = d->scount >> 16; | |
668 | break; | |
669 | ||
946fc947 FB |
670 | case ES1370_REG_ADC_FRAMECNT: |
671 | d++; | |
672 | case ES1370_REG_DAC2_FRAMECNT: | |
673 | d++; | |
674 | case ES1370_REG_DAC1_FRAMECNT: | |
675 | val = d->frame_cnt & 0xffff; | |
676 | break; | |
677 | ||
678 | case ES1370_REG_ADC_FRAMECNT + 2: | |
679 | d++; | |
680 | case ES1370_REG_DAC2_FRAMECNT + 2: | |
681 | d++; | |
682 | case ES1370_REG_DAC1_FRAMECNT + 2: | |
683 | val = d->frame_cnt >> 16; | |
684 | break; | |
685 | ||
1d14ffa9 FB |
686 | default: |
687 | val = ~0; | |
688 | lwarn ("readw %#x -> %#x\n", addr, val); | |
689 | break; | |
690 | } | |
691 | ||
692 | return val; | |
693 | } | |
694 | ||
8307c294 | 695 | static uint32_t es1370_readl(void *opaque, uint32_t addr) |
1d14ffa9 FB |
696 | { |
697 | ES1370State *s = opaque; | |
698 | uint32_t val; | |
699 | struct chan *d = &s->chan[0]; | |
700 | ||
701 | addr = es1370_fixup (s, addr); | |
702 | ||
703 | switch (addr) { | |
704 | case ES1370_REG_CONTROL: | |
705 | val = s->ctl; | |
706 | break; | |
707 | case ES1370_REG_STATUS: | |
708 | val = s->status; | |
709 | break; | |
710 | case ES1370_REG_MEMPAGE: | |
711 | val = s->mempage; | |
712 | break; | |
713 | case ES1370_REG_CODEC: | |
714 | val = s->codec; | |
715 | break; | |
716 | case ES1370_REG_SERIAL_CONTROL: | |
717 | val = s->sctl; | |
718 | break; | |
719 | ||
720 | case ES1370_REG_ADC_SCOUNT: | |
721 | d++; | |
722 | case ES1370_REG_DAC2_SCOUNT: | |
723 | d++; | |
724 | case ES1370_REG_DAC1_SCOUNT: | |
725 | val = d->scount; | |
726 | #ifdef DEBUG_ES1370 | |
727 | { | |
728 | uint32_t curr_count = d->scount >> 16; | |
729 | uint32_t count = d->scount & 0xffff; | |
730 | ||
731 | curr_count <<= d->shift; | |
732 | count <<= d->shift; | |
733 | dolog ("read scount curr %d, total %d\n", curr_count, count); | |
734 | } | |
735 | #endif | |
736 | break; | |
737 | ||
738 | case ES1370_REG_ADC_FRAMECNT: | |
739 | d++; | |
740 | case ES1370_REG_DAC2_FRAMECNT: | |
741 | d++; | |
742 | case ES1370_REG_DAC1_FRAMECNT: | |
743 | val = d->frame_cnt; | |
744 | #ifdef DEBUG_ES1370 | |
745 | { | |
746 | uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2; | |
747 | uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2; | |
f8687bab | 748 | if (curr > size) { |
1d14ffa9 FB |
749 | dolog ("read framecnt curr %d, size %d %d\n", curr, size, |
750 | curr > size); | |
f8687bab | 751 | } |
1d14ffa9 FB |
752 | } |
753 | #endif | |
754 | break; | |
755 | ||
756 | case ES1370_REG_ADC_FRAMEADR: | |
757 | d++; | |
758 | case ES1370_REG_DAC2_FRAMEADR: | |
759 | d++; | |
760 | case ES1370_REG_DAC1_FRAMEADR: | |
761 | val = d->frame_addr; | |
762 | break; | |
763 | ||
946fc947 FB |
764 | case ES1370_REG_PHANTOM_FRAMECNT: |
765 | val = ~0U; | |
766 | lwarn ("reading from phantom frame count\n"); | |
767 | break; | |
768 | case ES1370_REG_PHANTOM_FRAMEADR: | |
769 | val = ~0U; | |
770 | lwarn ("reading from phantom frame address\n"); | |
771 | break; | |
772 | ||
1d14ffa9 FB |
773 | default: |
774 | val = ~0U; | |
775 | lwarn ("readl %#x -> %#x\n", addr, val); | |
776 | break; | |
777 | } | |
778 | return val; | |
779 | } | |
780 | ||
1d14ffa9 FB |
781 | static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, |
782 | int max, int *irq) | |
783 | { | |
784 | uint8_t tmpbuf[4096]; | |
785 | uint32_t addr = d->frame_addr; | |
786 | int sc = d->scount & 0xffff; | |
787 | int csc = d->scount >> 16; | |
788 | int csc_bytes = (csc + 1) << d->shift; | |
789 | int cnt = d->frame_cnt >> 16; | |
790 | int size = d->frame_cnt & 0xffff; | |
791 | int left = ((size - cnt + 1) << 2) + d->leftover; | |
a1b6abe7 | 792 | int transferred = 0; |
1d14ffa9 FB |
793 | int temp = audio_MIN (max, audio_MIN (left, csc_bytes)); |
794 | int index = d - &s->chan[0]; | |
795 | ||
796 | addr += (cnt << 2) + d->leftover; | |
797 | ||
798 | if (index == ADC_CHANNEL) { | |
799 | while (temp) { | |
800 | int acquired, to_copy; | |
801 | ||
c0fe3827 | 802 | to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf)); |
1d14ffa9 FB |
803 | acquired = AUD_read (s->adc_voice, tmpbuf, to_copy); |
804 | if (!acquired) | |
805 | break; | |
806 | ||
3204db98 | 807 | pci_dma_write (&s->dev, addr, tmpbuf, acquired); |
1d14ffa9 FB |
808 | |
809 | temp -= acquired; | |
810 | addr += acquired; | |
a1b6abe7 | 811 | transferred += acquired; |
1d14ffa9 FB |
812 | } |
813 | } | |
814 | else { | |
815 | SWVoiceOut *voice = s->dac_voice[index]; | |
816 | ||
817 | while (temp) { | |
818 | int copied, to_copy; | |
819 | ||
c0fe3827 | 820 | to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf)); |
3204db98 | 821 | pci_dma_read (&s->dev, addr, tmpbuf, to_copy); |
1d14ffa9 FB |
822 | copied = AUD_write (voice, tmpbuf, to_copy); |
823 | if (!copied) | |
824 | break; | |
825 | temp -= copied; | |
826 | addr += copied; | |
a1b6abe7 | 827 | transferred += copied; |
1d14ffa9 FB |
828 | } |
829 | } | |
830 | ||
a1b6abe7 | 831 | if (csc_bytes == transferred) { |
1d14ffa9 FB |
832 | *irq = 1; |
833 | d->scount = sc | (sc << 16); | |
834 | ldebug ("sc = %d, rate = %f\n", | |
835 | (sc + 1) << d->shift, | |
836 | (sc + 1) / (double) 44100); | |
837 | } | |
838 | else { | |
839 | *irq = 0; | |
a1b6abe7 | 840 | d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16); |
1d14ffa9 FB |
841 | } |
842 | ||
a1b6abe7 | 843 | cnt += (transferred + d->leftover) >> 2; |
1d14ffa9 FB |
844 | |
845 | if (s->sctl & loop_sel) { | |
846 | /* Bah, how stupid is that having a 0 represent true value? | |
847 | i just spent few hours on this shit */ | |
946fc947 | 848 | AUD_log ("es1370: warning", "non looping mode\n"); |
1d14ffa9 FB |
849 | } |
850 | else { | |
851 | d->frame_cnt = size; | |
852 | ||
c0fe3827 | 853 | if ((uint32_t) cnt <= d->frame_cnt) |
1d14ffa9 FB |
854 | d->frame_cnt |= cnt << 16; |
855 | } | |
856 | ||
a1b6abe7 | 857 | d->leftover = (transferred + d->leftover) & 3; |
1d14ffa9 FB |
858 | } |
859 | ||
860 | static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) | |
861 | { | |
862 | uint32_t new_status = s->status; | |
863 | int max_bytes, irq; | |
864 | struct chan *d = &s->chan[chan]; | |
865 | const struct chan_bits *b = &es1370_chan_bits[chan]; | |
866 | ||
867 | if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) { | |
868 | return; | |
869 | } | |
870 | ||
871 | max_bytes = free_or_avail; | |
872 | max_bytes &= ~((1 << d->shift) - 1); | |
873 | if (!max_bytes) { | |
874 | return; | |
875 | } | |
876 | ||
877 | es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq); | |
878 | ||
879 | if (irq) { | |
880 | if (s->sctl & b->sctl_inten) { | |
881 | new_status |= b->stat_int; | |
882 | } | |
883 | } | |
884 | ||
885 | if (new_status != s->status) { | |
886 | es1370_update_status (s, new_status); | |
887 | } | |
888 | } | |
889 | ||
890 | static void es1370_dac1_callback (void *opaque, int free) | |
891 | { | |
892 | ES1370State *s = opaque; | |
893 | ||
894 | es1370_run_channel (s, DAC1_CHANNEL, free); | |
895 | } | |
896 | ||
897 | static void es1370_dac2_callback (void *opaque, int free) | |
898 | { | |
899 | ES1370State *s = opaque; | |
900 | ||
901 | es1370_run_channel (s, DAC2_CHANNEL, free); | |
902 | } | |
903 | ||
904 | static void es1370_adc_callback (void *opaque, int avail) | |
905 | { | |
906 | ES1370State *s = opaque; | |
907 | ||
908 | es1370_run_channel (s, ADC_CHANNEL, avail); | |
909 | } | |
910 | ||
f3726fd7 AG |
911 | static uint64_t es1370_read(void *opaque, hwaddr addr, |
912 | unsigned size) | |
913 | { | |
914 | switch (size) { | |
915 | case 1: | |
916 | return es1370_readb(opaque, addr); | |
917 | case 2: | |
918 | return es1370_readw(opaque, addr); | |
919 | case 4: | |
920 | return es1370_readl(opaque, addr); | |
921 | default: | |
922 | return -1; | |
923 | } | |
924 | } | |
925 | ||
926 | static void es1370_write(void *opaque, hwaddr addr, uint64_t val, | |
927 | unsigned size) | |
928 | { | |
929 | switch (size) { | |
930 | case 1: | |
931 | es1370_writeb(opaque, addr, val); | |
932 | break; | |
933 | case 2: | |
934 | es1370_writew(opaque, addr, val); | |
935 | break; | |
936 | case 4: | |
937 | es1370_writel(opaque, addr, val); | |
938 | break; | |
939 | } | |
940 | } | |
1d14ffa9 | 941 | |
e1a99dbd | 942 | static const MemoryRegionOps es1370_io_ops = { |
f3726fd7 AG |
943 | .read = es1370_read, |
944 | .write = es1370_write, | |
945 | .impl = { | |
946 | .min_access_size = 1, | |
947 | .max_access_size = 4, | |
948 | }, | |
e1a99dbd AK |
949 | .endianness = DEVICE_LITTLE_ENDIAN, |
950 | }; | |
1d14ffa9 | 951 | |
3a14c2df JQ |
952 | static const VMStateDescription vmstate_es1370_channel = { |
953 | .name = "es1370_channel", | |
954 | .version_id = 2, | |
955 | .minimum_version_id = 2, | |
d49805ae | 956 | .fields = (VMStateField[]) { |
cf4dc461 | 957 | VMSTATE_UINT32 (shift, struct chan), |
958 | VMSTATE_UINT32 (leftover, struct chan), | |
959 | VMSTATE_UINT32 (scount, struct chan), | |
960 | VMSTATE_UINT32 (frame_addr, struct chan), | |
961 | VMSTATE_UINT32 (frame_cnt, struct chan), | |
962 | VMSTATE_END_OF_LIST () | |
1d14ffa9 | 963 | } |
3a14c2df | 964 | }; |
1d14ffa9 | 965 | |
3a14c2df | 966 | static int es1370_post_load (void *opaque, int version_id) |
1d14ffa9 FB |
967 | { |
968 | uint32_t ctl, sctl; | |
969 | ES1370State *s = opaque; | |
970 | size_t i; | |
971 | ||
1d14ffa9 | 972 | for (i = 0; i < NB_CHANNELS; ++i) { |
1d14ffa9 FB |
973 | if (i == ADC_CHANNEL) { |
974 | if (s->adc_voice) { | |
c0fe3827 | 975 | AUD_close_in (&s->card, s->adc_voice); |
1d14ffa9 FB |
976 | s->adc_voice = NULL; |
977 | } | |
978 | } | |
979 | else { | |
980 | if (s->dac_voice[i]) { | |
c0fe3827 | 981 | AUD_close_out (&s->card, s->dac_voice[i]); |
1d14ffa9 FB |
982 | s->dac_voice[i] = NULL; |
983 | } | |
984 | } | |
985 | } | |
986 | ||
3a14c2df JQ |
987 | ctl = s->ctl; |
988 | sctl = s->sctl; | |
1d14ffa9 FB |
989 | s->ctl = 0; |
990 | s->sctl = 0; | |
991 | es1370_update_voices (s, ctl, sctl); | |
992 | return 0; | |
993 | } | |
994 | ||
3a14c2df JQ |
995 | static const VMStateDescription vmstate_es1370 = { |
996 | .name = "es1370", | |
997 | .version_id = 2, | |
998 | .minimum_version_id = 2, | |
3a14c2df | 999 | .post_load = es1370_post_load, |
d49805ae | 1000 | .fields = (VMStateField[]) { |
cf4dc461 | 1001 | VMSTATE_PCI_DEVICE (dev, ES1370State), |
1002 | VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2, | |
1003 | vmstate_es1370_channel, struct chan), | |
1004 | VMSTATE_UINT32 (ctl, ES1370State), | |
1005 | VMSTATE_UINT32 (status, ES1370State), | |
1006 | VMSTATE_UINT32 (mempage, ES1370State), | |
1007 | VMSTATE_UINT32 (codec, ES1370State), | |
1008 | VMSTATE_UINT32 (sctl, ES1370State), | |
1009 | VMSTATE_END_OF_LIST () | |
3a14c2df JQ |
1010 | } |
1011 | }; | |
1012 | ||
11f547e5 | 1013 | static void es1370_on_reset(DeviceState *dev) |
1d14ffa9 | 1014 | { |
11f547e5 | 1015 | ES1370State *s = container_of(dev, ES1370State, dev.qdev); |
1d14ffa9 FB |
1016 | es1370_reset (s); |
1017 | } | |
1018 | ||
9af21dbe | 1019 | static void es1370_realize(PCIDevice *dev, Error **errp) |
1d14ffa9 | 1020 | { |
0d769044 | 1021 | ES1370State *s = ES1370(dev); |
e5944641 | 1022 | uint8_t *c = s->dev.config; |
1d14ffa9 | 1023 | |
d3e2f135 | 1024 | c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8; |
1d14ffa9 | 1025 | |
0b8c537f | 1026 | #if 0 |
d3e2f135 MT |
1027 | c[PCI_CAPABILITY_LIST] = 0xdc; |
1028 | c[PCI_INTERRUPT_LINE] = 10; | |
1d14ffa9 FB |
1029 | c[0xdc] = 0x00; |
1030 | #endif | |
1031 | ||
d3e2f135 MT |
1032 | c[PCI_INTERRUPT_PIN] = 1; |
1033 | c[PCI_MIN_GNT] = 0x0c; | |
1034 | c[PCI_MAX_LAT] = 0x80; | |
1d14ffa9 | 1035 | |
64bde0f3 | 1036 | memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256); |
e824b2cc | 1037 | pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); |
c0fe3827 | 1038 | |
1a7dafce | 1039 | AUD_register_card ("es1370", &s->card); |
1d14ffa9 | 1040 | es1370_reset (s); |
6806e595 GH |
1041 | } |
1042 | ||
069eb7b2 LQ |
1043 | static void es1370_exit(PCIDevice *dev) |
1044 | { | |
1045 | ES1370State *s = ES1370(dev); | |
1046 | int i; | |
1047 | ||
1048 | for (i = 0; i < 2; ++i) { | |
1049 | AUD_close_out(&s->card, s->dac_voice[i]); | |
1050 | } | |
1051 | ||
1052 | AUD_close_in(&s->card, s->adc_voice); | |
1053 | AUD_remove_card(&s->card); | |
1054 | } | |
1055 | ||
36cd6f6f | 1056 | static int es1370_init (PCIBus *bus) |
6806e595 | 1057 | { |
0d769044 | 1058 | pci_create_simple (bus, -1, TYPE_ES1370); |
1d14ffa9 FB |
1059 | return 0; |
1060 | } | |
6806e595 | 1061 | |
cf4dc461 | 1062 | static void es1370_class_init (ObjectClass *klass, void *data) |
40021f08 | 1063 | { |
cf4dc461 | 1064 | DeviceClass *dc = DEVICE_CLASS (klass); |
1065 | PCIDeviceClass *k = PCI_DEVICE_CLASS (klass); | |
40021f08 | 1066 | |
9af21dbe | 1067 | k->realize = es1370_realize; |
069eb7b2 | 1068 | k->exit = es1370_exit; |
40021f08 AL |
1069 | k->vendor_id = PCI_VENDOR_ID_ENSONIQ; |
1070 | k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370; | |
1071 | k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; | |
1072 | k->subsystem_vendor_id = 0x4942; | |
1073 | k->subsystem_id = 0x4c4c; | |
125ee0ed | 1074 | set_bit(DEVICE_CATEGORY_SOUND, dc->categories); |
39bffca2 AL |
1075 | dc->desc = "ENSONIQ AudioPCI ES1370"; |
1076 | dc->vmsd = &vmstate_es1370; | |
11f547e5 | 1077 | dc->reset = es1370_on_reset; |
40021f08 AL |
1078 | } |
1079 | ||
8c43a6f0 | 1080 | static const TypeInfo es1370_info = { |
0d769044 | 1081 | .name = TYPE_ES1370, |
39bffca2 AL |
1082 | .parent = TYPE_PCI_DEVICE, |
1083 | .instance_size = sizeof (ES1370State), | |
1084 | .class_init = es1370_class_init, | |
fd3b02c8 EH |
1085 | .interfaces = (InterfaceInfo[]) { |
1086 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
1087 | { }, | |
1088 | }, | |
6806e595 GH |
1089 | }; |
1090 | ||
83f7d43a | 1091 | static void es1370_register_types (void) |
6806e595 | 1092 | { |
cf4dc461 | 1093 | type_register_static (&es1370_info); |
36cd6f6f | 1094 | pci_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370", es1370_init); |
6806e595 | 1095 | } |
83f7d43a AF |
1096 | |
1097 | type_init (es1370_register_types) | |
6806e595 | 1098 |