[qemu.git] / target / riscv / cpu_user.h

#ifndef TARGET_RISCV_CPU_USER_H
#define TARGET_RISCV_CPU_USER_H

#define xRA 1   /* return address (aka link register) */
#define xSP 2   /* stack pointer */
#define xGP 3   /* global pointer */
#define xTP 4   /* thread pointer */

#define xA0 10  /* gpr[10-17] are syscall arguments */
#define xA1 11
#define xA2 12
#define xA3 13
#define xA4 14
#define xA5 15
#define xA6 16
#define xA7 17  /* syscall number for RVI ABI */
#define xT0 5   /* syscall number for RVE ABI */

#endif
Commit	Line	Data
f91005e1 MA	1	#ifndef TARGET_RISCV_CPU_USER_H
	2	#define TARGET_RISCV_CPU_USER_H
	3
47ae93cd MC	4	#define xRA 1 /* return address (aka link register) */
	5	#define xSP 2 /* stack pointer */
	6	#define xGP 3 /* global pointer */
	7	#define xTP 4 /* thread pointer */
	8
	9	#define xA0 10 /* gpr[10-17] are syscall arguments */
	10	#define xA1 11
	11	#define xA2 12
	12	#define xA3 13
	13	#define xA4 14
	14	#define xA5 15
	15	#define xA6 16
5836c3ec KC	16	#define xA7 17 /* syscall number for RVI ABI */
5836c3ec KC	17	#define xT0 5 /* syscall number for RVE ABI */
f91005e1 MA	18
f91005e1 MA	19	#endif