]> Git Repo - qemu.git/blame - hw/ppc/spapr_vio.c
spapr/vio: deprecate the "irq" property
[qemu.git] / hw / ppc / spapr_vio.c
CommitLineData
4040ab72
DG
1/*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <[email protected]>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <[email protected]>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
0d75590d 22#include "qemu/osdep.h"
ce9863b7 23#include "qemu/error-report.h"
da34e65c 24#include "qapi/error.h"
efe2add7 25#include "qapi/visitor.h"
83c9f4ca 26#include "hw/hw.h"
03dd024f 27#include "qemu/log.h"
9c17d615 28#include "sysemu/sysemu.h"
83c9f4ca 29#include "hw/boards.h"
83c9f4ca 30#include "hw/loader.h"
4040ab72
DG
31#include "elf.h"
32#include "hw/sysbus.h"
9c17d615
PB
33#include "sysemu/kvm.h"
34#include "sysemu/device_tree.h"
b45d63b6 35#include "kvm_ppc.h"
efe2add7 36#include "sysemu/qtest.h"
4040ab72 37
0d09e41a
PB
38#include "hw/ppc/spapr.h"
39#include "hw/ppc/spapr_vio.h"
40#include "hw/ppc/xics.h"
bf5a6696 41#include "hw/ppc/fdt.h"
7ab6a501 42#include "trace.h"
4040ab72 43
4040ab72 44#include <libfdt.h>
4040ab72 45
efe2add7
CLG
46static void spapr_vio_getset_irq(Object *obj, Visitor *v, const char *name,
47 void *opaque, Error **errp)
48{
49 Property *prop = opaque;
50 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
51
52 if (!qtest_enabled()) {
53 warn_report(TYPE_VIO_SPAPR_DEVICE " '%s' property is deprecated", name);
54 }
55 visit_type_uint32(v, name, ptr, errp);
56}
57
58static const PropertyInfo spapr_vio_irq_propinfo = {
59 .name = "irq",
60 .get = spapr_vio_getset_irq,
61 .set = spapr_vio_getset_irq,
62};
63
3cb75a7c 64static Property spapr_vio_props[] = {
efe2add7 65 DEFINE_PROP("irq", VIOsPAPRDevice, irq, spapr_vio_irq_propinfo, uint32_t),
3cb75a7c
PB
66 DEFINE_PROP_END_OF_LIST(),
67};
68
c4eda5b7
DG
69static char *spapr_vio_get_dev_name(DeviceState *qdev)
70{
71 VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev);
72 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
c4eda5b7
DG
73
74 /* Device tree style name device@reg */
9be38598 75 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
c4eda5b7
DG
76}
77
78static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
79{
80 BusClass *k = BUS_CLASS(klass);
81
82 k->get_dev_path = spapr_vio_get_dev_name;
5a06393f 83 k->get_fw_dev_path = spapr_vio_get_dev_name;
c4eda5b7
DG
84}
85
0d936928
AL
86static const TypeInfo spapr_vio_bus_info = {
87 .name = TYPE_SPAPR_VIO_BUS,
88 .parent = TYPE_BUS,
c4eda5b7 89 .class_init = spapr_vio_bus_class_init,
0d936928 90 .instance_size = sizeof(VIOsPAPRBus),
4040ab72
DG
91};
92
93VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg)
94{
0866aca1 95 BusChild *kid;
4040ab72
DG
96 VIOsPAPRDevice *dev = NULL;
97
0866aca1
AL
98 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
99 dev = (VIOsPAPRDevice *)kid->child;
4040ab72 100 if (dev->reg == reg) {
5435352c 101 return dev;
4040ab72
DG
102 }
103 }
104
5435352c 105 return NULL;
4040ab72
DG
106}
107
4040ab72
DG
108static int vio_make_devnode(VIOsPAPRDevice *dev,
109 void *fdt)
110{
3954d33a 111 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
1e34d859
ME
112 int vdevice_off, node_off, ret;
113 char *dt_name;
4040ab72
DG
114
115 vdevice_off = fdt_path_offset(fdt, "/vdevice");
116 if (vdevice_off < 0) {
117 return vdevice_off;
118 }
119
c4eda5b7 120 dt_name = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 121 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
4ecf8aa5 122 g_free(dt_name);
4040ab72
DG
123 if (node_off < 0) {
124 return node_off;
125 }
126
127 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
128 if (ret < 0) {
129 return ret;
130 }
131
3954d33a 132 if (pc->dt_type) {
4040ab72 133 ret = fdt_setprop_string(fdt, node_off, "device_type",
3954d33a 134 pc->dt_type);
4040ab72
DG
135 if (ret < 0) {
136 return ret;
137 }
138 }
139
3954d33a 140 if (pc->dt_compatible) {
4040ab72 141 ret = fdt_setprop_string(fdt, node_off, "compatible",
3954d33a 142 pc->dt_compatible);
4040ab72
DG
143 if (ret < 0) {
144 return ret;
145 }
146 }
147
a307d594 148 if (dev->irq) {
bb2d8ab6 149 uint32_t ints_prop[2];
00dc738d 150
bb2d8ab6 151 spapr_dt_xics_irq(ints_prop, dev->irq, false);
00dc738d
DG
152 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
153 sizeof(ints_prop));
154 if (ret < 0) {
155 return ret;
156 }
157 }
158
2b7dc949 159 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
ad0ebb91
DG
160 if (ret < 0) {
161 return ret;
ee86dfee
DG
162 }
163
3954d33a
AL
164 if (pc->devnode) {
165 ret = (pc->devnode)(dev, fdt, node_off);
4040ab72
DG
166 if (ret < 0) {
167 return ret;
168 }
169 }
170
171 return node_off;
172}
4040ab72 173
b45d63b6
BH
174/*
175 * CRQ handling
176 */
28e02042 177static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
178 target_ulong opcode, target_ulong *args)
179{
180 target_ulong reg = args[0];
181 target_ulong queue_addr = args[1];
182 target_ulong queue_len = args[2];
183 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
184
185 if (!dev) {
d9599c92 186 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
187 return H_PARAMETER;
188 }
189
190 /* We can't grok a queue size bigger than 256M for now */
191 if (queue_len < 0x1000 || queue_len > 0x10000000) {
d9599c92
DG
192 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
193 ")\n", queue_len);
b45d63b6
BH
194 return H_PARAMETER;
195 }
196
197 /* Check queue alignment */
198 if (queue_addr & 0xfff) {
d9599c92 199 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
b45d63b6
BH
200 return H_PARAMETER;
201 }
202
203 /* Check if device supports CRQs */
204 if (!dev->crq.SendFunc) {
8e01f355 205 hcall_dprintf("Device does not support CRQ\n");
b45d63b6
BH
206 return H_NOT_FOUND;
207 }
208
b45d63b6
BH
209 /* Already a queue ? */
210 if (dev->crq.qsize) {
8e01f355 211 hcall_dprintf("CRQ already registered\n");
b45d63b6
BH
212 return H_RESOURCE;
213 }
214 dev->crq.qladdr = queue_addr;
215 dev->crq.qsize = queue_len;
216 dev->crq.qnext = 0;
217
7ab6a501 218 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
b45d63b6
BH
219 return H_SUCCESS;
220}
221
8e01f355
DG
222static target_ulong free_crq(VIOsPAPRDevice *dev)
223{
224 dev->crq.qladdr = 0;
225 dev->crq.qsize = 0;
226 dev->crq.qnext = 0;
227
7ab6a501 228 trace_spapr_vio_free_crq(dev->reg);
8e01f355
DG
229
230 return H_SUCCESS;
231}
232
28e02042 233static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
234 target_ulong opcode, target_ulong *args)
235{
236 target_ulong reg = args[0];
237 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
238
239 if (!dev) {
d9599c92 240 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
241 return H_PARAMETER;
242 }
243
8e01f355 244 return free_crq(dev);
b45d63b6
BH
245}
246
28e02042 247static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
248 target_ulong opcode, target_ulong *args)
249{
250 target_ulong reg = args[0];
251 target_ulong msg_hi = args[1];
252 target_ulong msg_lo = args[2];
253 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
254 uint64_t crq_mangle[2];
255
256 if (!dev) {
d9599c92 257 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
258 return H_PARAMETER;
259 }
260 crq_mangle[0] = cpu_to_be64(msg_hi);
261 crq_mangle[1] = cpu_to_be64(msg_lo);
262
263 if (dev->crq.SendFunc) {
264 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
265 }
266
267 return H_HARDWARE;
268}
269
28e02042 270static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
271 target_ulong opcode, target_ulong *args)
272{
273 target_ulong reg = args[0];
274 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
275
276 if (!dev) {
d9599c92 277 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
278 return H_PARAMETER;
279 }
280
281 return 0;
282}
283
284/* Returns negative error, 0 success, or positive: queue full */
285int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
286{
287 int rc;
288 uint8_t byte;
289
290 if (!dev->crq.qsize) {
ce9863b7 291 error_report("spapr_vio_send_creq on uninitialized queue");
b45d63b6
BH
292 return -1;
293 }
294
295 /* Maybe do a fast path for KVM just writing to the pages */
ad0ebb91 296 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
b45d63b6
BH
297 if (rc) {
298 return rc;
299 }
300 if (byte != 0) {
301 return 1;
302 }
303
ad0ebb91 304 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
b45d63b6
BH
305 &crq[8], 8);
306 if (rc) {
307 return rc;
308 }
309
310 kvmppc_eieio();
311
ad0ebb91 312 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
b45d63b6
BH
313 if (rc) {
314 return rc;
315 }
316
317 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
318
319 if (dev->signal_state & 1) {
a307d594 320 qemu_irq_pulse(spapr_vio_qirq(dev));
b45d63b6
BH
321 }
322
323 return 0;
324}
325
08942ac1
BH
326/* "quiesce" handling */
327
328static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
329{
2b7dc949 330 if (dev->tcet) {
a83000f5 331 device_reset(DEVICE(dev->tcet));
08942ac1 332 }
4dd96f24 333 free_crq(dev);
08942ac1
BH
334}
335
ee9a569a
AK
336void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass)
337{
338 if (!dev->tcet) {
339 return;
340 }
341
342 memory_region_set_enabled(&dev->mrbypass, bypass);
343 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
344
345 dev->tcet->bypass = bypass;
346}
347
28e02042 348static void rtas_set_tce_bypass(PowerPCCPU *cpu, sPAPRMachineState *spapr,
210b580b 349 uint32_t token,
08942ac1
BH
350 uint32_t nargs, target_ulong args,
351 uint32_t nret, target_ulong rets)
352{
353 VIOsPAPRBus *bus = spapr->vio_bus;
354 VIOsPAPRDevice *dev;
355 uint32_t unit, enable;
356
357 if (nargs != 2) {
a64d325d 358 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
359 return;
360 }
361 unit = rtas_ld(args, 0);
362 enable = rtas_ld(args, 1);
363 dev = spapr_vio_find_by_reg(bus, unit);
364 if (!dev) {
a64d325d 365 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
366 return;
367 }
ad0ebb91 368
2b7dc949 369 if (!dev->tcet) {
a64d325d 370 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
53724ee5 371 return;
08942ac1
BH
372 }
373
ee9a569a 374 spapr_vio_set_bypass(dev, !!enable);
53724ee5 375
a64d325d 376 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
377}
378
28e02042 379static void rtas_quiesce(PowerPCCPU *cpu, sPAPRMachineState *spapr,
210b580b 380 uint32_t token,
08942ac1
BH
381 uint32_t nargs, target_ulong args,
382 uint32_t nret, target_ulong rets)
383{
384 VIOsPAPRBus *bus = spapr->vio_bus;
0866aca1 385 BusChild *kid;
08942ac1
BH
386 VIOsPAPRDevice *dev = NULL;
387
388 if (nargs != 0) {
a64d325d 389 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
390 return;
391 }
392
0866aca1
AL
393 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
394 dev = (VIOsPAPRDevice *)kid->child;
08942ac1
BH
395 spapr_vio_quiesce_one(dev);
396 }
397
a64d325d 398 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
399}
400
d601fac4 401static VIOsPAPRDevice *reg_conflict(VIOsPAPRDevice *dev)
9fc380d3 402{
215e2098 403 VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
0866aca1 404 BusChild *kid;
d601fac4 405 VIOsPAPRDevice *other;
9fc380d3
ME
406
407 /*
d601fac4
DG
408 * Check for a device other than the given one which is already
409 * using the requested address. We have to open code this because
410 * the given dev might already be in the list.
9fc380d3 411 */
0866aca1 412 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
fd506b4f 413 other = VIO_SPAPR_DEVICE(kid->child);
9fc380d3 414
d601fac4
DG
415 if (other != dev && other->reg == dev->reg) {
416 return other;
9fc380d3
ME
417 }
418 }
419
420 return 0;
421}
422
b1c7f725 423static void spapr_vio_busdev_reset(DeviceState *qdev)
8e01f355 424{
fd506b4f 425 VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev);
b1c7f725 426 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
8e01f355 427
4dd96f24
DG
428 /* Shut down the request queue and TCEs if necessary */
429 spapr_vio_quiesce_one(dev);
430
431 dev->signal_state = 0;
b1c7f725 432
ee9a569a 433 spapr_vio_set_bypass(dev, false);
b1c7f725
DG
434 if (pc->reset) {
435 pc->reset(dev);
436 }
8e01f355
DG
437}
438
28b07e73 439static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
4040ab72 440{
28e02042 441 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
4040ab72 442 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
3954d33a 443 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72 444 char *id;
a005b3ef 445 Error *local_err = NULL;
9fc380d3 446
d601fac4
DG
447 if (dev->reg != -1) {
448 /*
449 * Explicitly assigned address, just verify that no-one else
450 * is using it. other mechanism). We have to open code this
451 * rather than using spapr_vio_find_by_reg() because sdev
452 * itself is already in the list.
453 */
454 VIOsPAPRDevice *other = reg_conflict(dev);
455
456 if (other) {
28b07e73
MA
457 error_setg(errp, "%s and %s devices conflict at address %#x",
458 object_get_typename(OBJECT(qdev)),
459 object_get_typename(OBJECT(&other->qdev)),
460 dev->reg);
461 return;
d601fac4
DG
462 }
463 } else {
464 /* Need to assign an address */
215e2098 465 VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
d601fac4
DG
466
467 do {
468 dev->reg = bus->next_reg++;
469 } while (reg_conflict(dev));
9fc380d3 470 }
4040ab72 471
1e34d859
ME
472 /* Don't overwrite ids assigned on the command line */
473 if (!dev->qdev.id) {
c4eda5b7 474 id = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 475 dev->qdev.id = id;
4040ab72
DG
476 }
477
60c6823b 478 dev->irq = spapr_irq_alloc(spapr, dev->irq, false, &local_err);
a005b3ef
GK
479 if (local_err) {
480 error_propagate(errp, local_err);
28b07e73 481 return;
416343b1 482 }
4040ab72 483
53724ee5 484 if (pc->rtce_window_size) {
4290ca49 485 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
ee9a569a
AK
486
487 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
488 ram_size);
489 memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
490 "iommu-spapr-bypass", get_system_memory(),
491 0, ram_size);
492 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
493 address_space_init(&dev->as, &dev->mrroot, qdev->id);
494
df7625d4
AK
495 dev->tcet = spapr_tce_new_table(qdev, liobn);
496 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
497 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
ee9a569a
AK
498 dev->tcet->vdev = dev;
499 memory_region_add_subregion_overlap(&dev->mrroot, 0,
500 spapr_tce_get_iommu(dev->tcet), 2);
53724ee5 501 }
ee86dfee 502
28b07e73 503 pc->realize(dev, errp);
4040ab72
DG
504}
505
28e02042 506static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPRMachineState *spapr,
00dc738d
DG
507 target_ulong opcode,
508 target_ulong *args)
509{
510 target_ulong reg = args[0];
511 target_ulong mode = args[1];
512 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
3954d33a 513 VIOsPAPRDeviceClass *pc;
00dc738d
DG
514
515 if (!dev) {
516 return H_PARAMETER;
517 }
518
3954d33a 519 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
00dc738d 520
3954d33a 521 if (mode & ~pc->signal_mask) {
00dc738d
DG
522 return H_PARAMETER;
523 }
524
525 dev->signal_state = mode;
526
527 return H_SUCCESS;
528}
529
4040ab72
DG
530VIOsPAPRBus *spapr_vio_bus_init(void)
531{
532 VIOsPAPRBus *bus;
533 BusState *qbus;
534 DeviceState *dev;
4040ab72
DG
535
536 /* Create bridge device */
215e2098 537 dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE);
4040ab72
DG
538 qdev_init_nofail(dev);
539
540 /* Create bus on bridge device */
0d936928 541 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
215e2098 542 bus = SPAPR_VIO_BUS(qbus);
1ea1ce8a 543 bus->next_reg = 0x71000000;
4040ab72 544
00dc738d
DG
545 /* hcall-vio */
546 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
547
b45d63b6
BH
548 /* hcall-crq */
549 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
550 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
551 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
552 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
553
08942ac1 554 /* RTAS calls */
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555 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
556 rtas_set_tce_bypass);
557 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
08942ac1 558
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559 return bus;
560}
561
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562static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
563{
5a06393f 564 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 565
5a06393f 566 dc->fw_name = "vdevice";
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567}
568
8c43a6f0 569static const TypeInfo spapr_vio_bridge_info = {
215e2098 570 .name = TYPE_SPAPR_VIO_BRIDGE,
39bffca2 571 .parent = TYPE_SYS_BUS_DEVICE,
39bffca2 572 .class_init = spapr_vio_bridge_class_init,
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573};
574
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575const VMStateDescription vmstate_spapr_vio = {
576 .name = "spapr_vio",
577 .version_id = 1,
578 .minimum_version_id = 1,
3aff6c2f 579 .fields = (VMStateField[]) {
b368a7d8 580 /* Sanity check */
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581 VMSTATE_UINT32_EQUAL(reg, VIOsPAPRDevice, NULL),
582 VMSTATE_UINT32_EQUAL(irq, VIOsPAPRDevice, NULL),
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583
584 /* General VIO device state */
cbd62f86 585 VMSTATE_UINT64(signal_state, VIOsPAPRDevice),
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586 VMSTATE_UINT64(crq.qladdr, VIOsPAPRDevice),
587 VMSTATE_UINT32(crq.qsize, VIOsPAPRDevice),
588 VMSTATE_UINT32(crq.qnext, VIOsPAPRDevice),
589
590 VMSTATE_END_OF_LIST()
591 },
592};
593
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594static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
595{
596 DeviceClass *k = DEVICE_CLASS(klass);
28b07e73 597 k->realize = spapr_vio_busdev_realize;
b1c7f725 598 k->reset = spapr_vio_busdev_reset;
0d936928 599 k->bus_type = TYPE_SPAPR_VIO_BUS;
bce54474 600 k->props = spapr_vio_props;
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601}
602
8c43a6f0 603static const TypeInfo spapr_vio_type_info = {
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604 .name = TYPE_VIO_SPAPR_DEVICE,
605 .parent = TYPE_DEVICE,
606 .instance_size = sizeof(VIOsPAPRDevice),
607 .abstract = true,
608 .class_size = sizeof(VIOsPAPRDeviceClass),
39bffca2 609 .class_init = vio_spapr_device_class_init,
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610};
611
83f7d43a 612static void spapr_vio_register_types(void)
4040ab72 613{
0d936928 614 type_register_static(&spapr_vio_bus_info);
39bffca2 615 type_register_static(&spapr_vio_bridge_info);
3954d33a 616 type_register_static(&spapr_vio_type_info);
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617}
618
83f7d43a 619type_init(spapr_vio_register_types)
4040ab72 620
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621static int compare_reg(const void *p1, const void *p2)
622{
623 VIOsPAPRDevice const *dev1, *dev2;
624
625 dev1 = (VIOsPAPRDevice *)*(DeviceState **)p1;
626 dev2 = (VIOsPAPRDevice *)*(DeviceState **)p2;
627
628 if (dev1->reg < dev2->reg) {
629 return -1;
630 }
631 if (dev1->reg == dev2->reg) {
632 return 0;
633 }
634
635 /* dev1->reg > dev2->reg */
636 return 1;
637}
638
bf5a6696 639void spapr_dt_vdevice(VIOsPAPRBus *bus, void *fdt)
4040ab72 640{
05c19438 641 DeviceState *qdev, **qdevs;
0866aca1 642 BusChild *kid;
05c19438 643 int i, num, ret = 0;
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644 int node;
645
646 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
647
648 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
649 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
650 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
651 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
652 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
653 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
4040ab72 654
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655 /* Count qdevs on the bus list */
656 num = 0;
0866aca1 657 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
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658 num++;
659 }
660
661 /* Copy out into an array of pointers */
662 qdevs = g_malloc(sizeof(qdev) * num);
663 num = 0;
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664 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
665 qdevs[num++] = kid->child;
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666 }
667
668 /* Sort the array */
669 qsort(qdevs, num, sizeof(qdev), compare_reg);
670
671 /* Hack alert. Give the devices to libfdt in reverse order, we happen
672 * to know that will mean they are in forward order in the tree. */
673 for (i = num - 1; i >= 0; i--) {
674 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)(qdevs[i]);
bf5a6696 675 VIOsPAPRDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
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676
677 ret = vio_make_devnode(dev, fdt);
4040ab72 678 if (ret < 0) {
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679 error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
680 vdc->dt_name, dev->reg);
681 exit(1);
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682 }
683 }
684
5f1d1fc5 685 g_free(qdevs);
4040ab72 686}
68f3a94c 687
7c866c6a 688gchar *spapr_vio_stdout_path(VIOsPAPRBus *bus)
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689{
690 VIOsPAPRDevice *dev;
691 char *name, *path;
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692
693 dev = spapr_vty_get_default(bus);
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694 if (!dev) {
695 return NULL;
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696 }
697
c4eda5b7 698 name = spapr_vio_get_dev_name(DEVICE(dev));
4ecf8aa5 699 path = g_strdup_printf("/vdevice/%s", name);
68f3a94c 700
4ecf8aa5 701 g_free(name);
7c866c6a 702 return path;
68f3a94c 703}
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