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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef HW_MIPS_H |
2 | #define HW_MIPS_H | |
3 | /* Definitions for mips board emulation. */ | |
4 | ||
c6017850 AK |
5 | #include "memory.h" |
6 | ||
87ecb68b | 7 | /* gt64xxx.c */ |
c2dd2a23 | 8 | PCIBus *gt64120_register(qemu_irq *pic); |
87ecb68b | 9 | |
d0f7453d HC |
10 | /* bonito.c */ |
11 | PCIBus *bonito_init(qemu_irq *pic); | |
12 | ||
4ce7ff6e | 13 | /* rc4030.c */ |
c6945b15 | 14 | typedef struct rc4030DMAState *rc4030_dma; |
c227f099 | 15 | void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write); |
68238a9e AJ |
16 | void rc4030_dma_read(void *dma, uint8_t *buf, int len); |
17 | void rc4030_dma_write(void *dma, uint8_t *buf, int len); | |
18 | ||
19 | void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, | |
3054434d AK |
20 | qemu_irq **irqs, rc4030_dma **dmas, |
21 | MemoryRegion *sysmem); | |
4ce7ff6e | 22 | |
a65f56ee | 23 | /* dp8393x.c */ |
c227f099 | 24 | void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, |
024e5bb6 | 25 | MemoryRegion *address_space, |
a65f56ee | 26 | qemu_irq irq, void* mem_opaque, |
c227f099 | 27 | void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)); |
a65f56ee | 28 | |
87ecb68b | 29 | #endif |