[qemu.git] / hw / intc / s390_flic.c

/*
 * QEMU S390x floating interrupt controller (flic)
 *
 * Copyright 2014 IBM Corp.
 * Author(s): Jens Freimann <[email protected]>
 *            Cornelia Huck <[email protected]>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or (at
 * your option) any later version. See the COPYING file in the top-level
 * directory.
 */

#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "hw/sysbus.h"
#include "hw/s390x/ioinst.h"
#include "hw/s390x/s390_flic.h"
#include "hw/s390x/css.h"
#include "trace.h"
#include "cpu.h"
#include "hw/qdev.h"
#include "qapi/error.h"
#include "hw/s390x/s390-virtio-ccw.h"

S390FLICStateClass *s390_get_flic_class(S390FLICState *fs)
{
    static S390FLICStateClass *class;

    if (!class) {
        /* we only have one flic device, so this is fine to cache */
        class = S390_FLIC_COMMON_GET_CLASS(fs);
    }
    return class;
}

QEMUS390FLICState *s390_get_qemu_flic(S390FLICState *fs)
{
    static QEMUS390FLICState *flic;

    if (!flic) {
        /* we only have one flic device, so this is fine to cache */
        flic = QEMU_S390_FLIC(fs);
    }
    return flic;
}

S390FLICState *s390_get_flic(void)
{
    static S390FLICState *fs;

    if (!fs) {
        fs = S390_FLIC_COMMON(object_resolve_path_type("",
                                                       TYPE_S390_FLIC_COMMON,
                                                       NULL));
    }
    return fs;
}

void s390_flic_init(void)
{
    DeviceState *dev;

    if (kvm_enabled()) {
        dev = qdev_create(NULL, TYPE_KVM_S390_FLIC);
        object_property_add_child(qdev_get_machine(), TYPE_KVM_S390_FLIC,
                                  OBJECT(dev), NULL);
    } else {
        dev = qdev_create(NULL, TYPE_QEMU_S390_FLIC);
        object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC,
                                  OBJECT(dev), NULL);
    }
    qdev_init_nofail(dev);
}

static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id,
                                         uint8_t isc, bool swap,
                                         bool is_maskable, uint8_t flags)
{
    /* nothing to do */
    return 0;
}

static int qemu_s390_io_adapter_map(S390FLICState *fs, uint32_t id,
                                    uint64_t map_addr, bool do_map)
{
    /* nothing to do */
    return 0;
}

static int qemu_s390_add_adapter_routes(S390FLICState *fs,
                                        AdapterRoutes *routes)
{
    return -ENOSYS;
}

static void qemu_s390_release_adapter_routes(S390FLICState *fs,
                                             AdapterRoutes *routes)
{
}

static int qemu_s390_clear_io_flic(S390FLICState *fs, uint16_t subchannel_id,
                           uint16_t subchannel_nr)
{
    QEMUS390FLICState *flic  = s390_get_qemu_flic(fs);
    QEMUS390FlicIO *cur, *next;
    uint8_t isc;

    g_assert(qemu_mutex_iothread_locked());
    if (!(flic->pending & FLIC_PENDING_IO)) {
        return 0;
    }

    /* check all iscs */
    for (isc = 0; isc < 8; isc++) {
        if (QLIST_EMPTY(&flic->io[isc])) {
            continue;
        }

        /* search and delete any matching one */
        QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
            if (cur->id == subchannel_id && cur->nr == subchannel_nr) {
                QLIST_REMOVE(cur, next);
                g_free(cur);
            }
        }

        /* update our indicator bit */
        if (QLIST_EMPTY(&flic->io[isc])) {
            flic->pending &= ~ISC_TO_PENDING_IO(isc);
        }
    }
    return 0;
}

static int qemu_s390_modify_ais_mode(S390FLICState *fs, uint8_t isc,
                                     uint16_t mode)
{
    QEMUS390FLICState *flic  = s390_get_qemu_flic(fs);

    switch (mode) {
    case SIC_IRQ_MODE_ALL:
        flic->simm &= ~AIS_MODE_MASK(isc);
        flic->nimm &= ~AIS_MODE_MASK(isc);
        break;
    case SIC_IRQ_MODE_SINGLE:
        flic->simm |= AIS_MODE_MASK(isc);
        flic->nimm &= ~AIS_MODE_MASK(isc);
        break;
    default:
        return -EINVAL;
    }

    return 0;
}

static int qemu_s390_inject_airq(S390FLICState *fs, uint8_t type,
                                 uint8_t isc, uint8_t flags)
{
    QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
    S390FLICStateClass *fsc = s390_get_flic_class(fs);
    bool flag = flags & S390_ADAPTER_SUPPRESSIBLE;
    uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;

    if (flag && (flic->nimm & AIS_MODE_MASK(isc))) {
        trace_qemu_s390_airq_suppressed(type, isc);
        return 0;
    }

    fsc->inject_io(fs, 0, 0, 0, io_int_word);

    if (flag && (flic->simm & AIS_MODE_MASK(isc))) {
        flic->nimm |= AIS_MODE_MASK(isc);
        trace_qemu_s390_suppress_airq(isc, "Single-Interruption Mode",
                                      "NO-Interruptions Mode");
    }

    return 0;
}

static void qemu_s390_flic_notify(uint32_t type)
{
    CPUState *cs;

    /*
     * We have to make all CPUs see CPU_INTERRUPT_HARD, so they might
     * consider it. We will kick all running CPUs and only relevant
     * sleeping ones.
     */
    CPU_FOREACH(cs) {
        S390CPU *cpu = S390_CPU(cs);

        cs->interrupt_request |= CPU_INTERRUPT_HARD;

        /* ignore CPUs that are not sleeping */
        if (s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING &&
            s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD) {
            continue;
        }

        /* we always kick running CPUs for now, this is tricky */
        if (cs->halted) {
            /* don't check for subclasses, CPUs double check when waking up */
            if (type & FLIC_PENDING_SERVICE) {
                if (!(cpu->env.psw.mask & PSW_MASK_EXT)) {
                    continue;
                }
            } else if (type & FLIC_PENDING_IO) {
                if (!(cpu->env.psw.mask & PSW_MASK_IO)) {
                    continue;
                }
            } else if (type & FLIC_PENDING_MCHK_CR) {
                if (!(cpu->env.psw.mask & PSW_MASK_MCHECK)) {
                    continue;
                }
            }
        }
        cpu_interrupt(cs, CPU_INTERRUPT_HARD);
    }
}

uint32_t qemu_s390_flic_dequeue_service(QEMUS390FLICState *flic)
{
    uint32_t tmp;

    g_assert(qemu_mutex_iothread_locked());
    g_assert(flic->pending & FLIC_PENDING_SERVICE);
    tmp = flic->service_param;
    flic->service_param = 0;
    flic->pending &= ~FLIC_PENDING_SERVICE;

    return tmp;
}

/* caller has to free the returned object */
QEMUS390FlicIO *qemu_s390_flic_dequeue_io(QEMUS390FLICState *flic, uint64_t cr6)
{
    QEMUS390FlicIO *io;
    uint8_t isc;

    g_assert(qemu_mutex_iothread_locked());
    if (!(flic->pending & CR6_TO_PENDING_IO(cr6))) {
        return NULL;
    }

    for (isc = 0; isc < 8; isc++) {
        if (QLIST_EMPTY(&flic->io[isc]) || !(cr6 & ISC_TO_ISC_BITS(isc))) {
            continue;
        }
        io = QLIST_FIRST(&flic->io[isc]);
        QLIST_REMOVE(io, next);

        /* update our indicator bit */
        if (QLIST_EMPTY(&flic->io[isc])) {
            flic->pending &= ~ISC_TO_PENDING_IO(isc);
        }
        return io;
    }

    return NULL;
}

void qemu_s390_flic_dequeue_crw_mchk(QEMUS390FLICState *flic)
{
    g_assert(qemu_mutex_iothread_locked());
    g_assert(flic->pending & FLIC_PENDING_MCHK_CR);
    flic->pending &= ~FLIC_PENDING_MCHK_CR;
}

static void qemu_s390_inject_service(S390FLICState *fs, uint32_t parm)
{
    QEMUS390FLICState *flic = s390_get_qemu_flic(fs);

    g_assert(qemu_mutex_iothread_locked());
    /* multiplexing is good enough for sclp - kvm does it internally as well */
    flic->service_param |= parm;
    flic->pending |= FLIC_PENDING_SERVICE;

    qemu_s390_flic_notify(FLIC_PENDING_SERVICE);
}

static void qemu_s390_inject_io(S390FLICState *fs, uint16_t subchannel_id,
                                uint16_t subchannel_nr, uint32_t io_int_parm,
                                uint32_t io_int_word)
{
    const uint8_t isc = IO_INT_WORD_ISC(io_int_word);
    QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
    QEMUS390FlicIO *io;

    g_assert(qemu_mutex_iothread_locked());
    io = g_new0(QEMUS390FlicIO, 1);
    io->id = subchannel_id;
    io->nr = subchannel_nr;
    io->parm = io_int_parm;
    io->word = io_int_word;

    QLIST_INSERT_HEAD(&flic->io[isc], io, next);
    flic->pending |= ISC_TO_PENDING_IO(isc);

    qemu_s390_flic_notify(ISC_TO_PENDING_IO(isc));
}

static void qemu_s390_inject_crw_mchk(S390FLICState *fs)
{
    QEMUS390FLICState *flic = s390_get_qemu_flic(fs);

    g_assert(qemu_mutex_iothread_locked());
    flic->pending |= FLIC_PENDING_MCHK_CR;

    qemu_s390_flic_notify(FLIC_PENDING_MCHK_CR);
}

bool qemu_s390_flic_has_service(QEMUS390FLICState *flic)
{
    /* called without lock via cc->has_work, will be validated under lock */
    return !!(flic->pending & FLIC_PENDING_SERVICE);
}

bool qemu_s390_flic_has_io(QEMUS390FLICState *flic, uint64_t cr6)
{
    /* called without lock via cc->has_work, will be validated under lock */
    return !!(flic->pending & CR6_TO_PENDING_IO(cr6));
}

bool qemu_s390_flic_has_crw_mchk(QEMUS390FLICState *flic)
{
    /* called without lock via cc->has_work, will be validated under lock */
    return !!(flic->pending & FLIC_PENDING_MCHK_CR);
}

bool qemu_s390_flic_has_any(QEMUS390FLICState *flic)
{
    g_assert(qemu_mutex_iothread_locked());
    return !!flic->pending;
}

static void qemu_s390_flic_reset(DeviceState *dev)
{
    QEMUS390FLICState *flic = QEMU_S390_FLIC(dev);
    QEMUS390FlicIO *cur, *next;
    int isc;

    g_assert(qemu_mutex_iothread_locked());
    flic->simm = 0;
    flic->nimm = 0;
    flic->pending = 0;

    /* remove all pending io interrupts */
    for (isc = 0; isc < 8; isc++) {
        QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
            QLIST_REMOVE(cur, next);
            g_free(cur);
        }
    }
}

bool ais_needed(void *opaque)
{
    S390FLICState *s = opaque;

    return s->ais_supported;
}

static const VMStateDescription qemu_s390_flic_vmstate = {
    .name = "qemu-s390-flic",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = ais_needed,
    .fields = (VMStateField[]) {
        VMSTATE_UINT8(simm, QEMUS390FLICState),
        VMSTATE_UINT8(nimm, QEMUS390FLICState),
        VMSTATE_END_OF_LIST()
    }
};

static void qemu_s390_flic_instance_init(Object *obj)
{
    QEMUS390FLICState *flic = QEMU_S390_FLIC(obj);
    int isc;

    for (isc = 0; isc < 8; isc++) {
        QLIST_INIT(&flic->io[isc]);
    }
}

static void qemu_s390_flic_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);
    S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);

    dc->reset = qemu_s390_flic_reset;
    dc->vmsd = &qemu_s390_flic_vmstate;
    fsc->register_io_adapter = qemu_s390_register_io_adapter;
    fsc->io_adapter_map = qemu_s390_io_adapter_map;
    fsc->add_adapter_routes = qemu_s390_add_adapter_routes;
    fsc->release_adapter_routes = qemu_s390_release_adapter_routes;
    fsc->clear_io_irq = qemu_s390_clear_io_flic;
    fsc->modify_ais_mode = qemu_s390_modify_ais_mode;
    fsc->inject_airq = qemu_s390_inject_airq;
    fsc->inject_service = qemu_s390_inject_service;
    fsc->inject_io = qemu_s390_inject_io;
    fsc->inject_crw_mchk = qemu_s390_inject_crw_mchk;
}

static Property s390_flic_common_properties[] = {
    DEFINE_PROP_UINT32("adapter_routes_max_batch", S390FLICState,
                       adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI),
    DEFINE_PROP_END_OF_LIST(),
};

static void s390_flic_common_realize(DeviceState *dev, Error **errp)
{
    S390FLICState *fs = S390_FLIC_COMMON(dev);
    uint32_t max_batch = fs->adapter_routes_max_batch;

    if (max_batch > ADAPTER_ROUTES_MAX_GSI) {
        error_setg(errp, "flic property adapter_routes_max_batch too big"
                   " (%d > %d)", max_batch, ADAPTER_ROUTES_MAX_GSI);
        return;
    }

    fs->ais_supported = s390_has_feat(S390_FEAT_ADAPTER_INT_SUPPRESSION);
}

static void s390_flic_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);

    dc->props = s390_flic_common_properties;
    dc->realize = s390_flic_common_realize;
}

static const TypeInfo qemu_s390_flic_info = {
    .name          = TYPE_QEMU_S390_FLIC,
    .parent        = TYPE_S390_FLIC_COMMON,
    .instance_size = sizeof(QEMUS390FLICState),
    .instance_init = qemu_s390_flic_instance_init,
    .class_init    = qemu_s390_flic_class_init,
};


static const TypeInfo s390_flic_common_info = {
    .name          = TYPE_S390_FLIC_COMMON,
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(S390FLICState),
    .class_init    = s390_flic_class_init,
    .class_size    = sizeof(S390FLICStateClass),
};

static void qemu_s390_flic_register_types(void)
{
    type_register_static(&s390_flic_common_info);
    type_register_static(&qemu_s390_flic_info);
}

type_init(qemu_s390_flic_register_types)

static bool adapter_info_so_needed(void *opaque)
{
    return css_migration_enabled();
}

const VMStateDescription vmstate_adapter_info_so = {
    .name = "s390_adapter_info/summary_offset",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = adapter_info_so_needed,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(summary_offset, AdapterInfo),
        VMSTATE_END_OF_LIST()
    }
};

const VMStateDescription vmstate_adapter_info = {
    .name = "s390_adapter_info",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_UINT64(ind_offset, AdapterInfo),
        /*
         * We do not have to migrate neither the id nor the addresses.
         * The id is set by css_register_io_adapter and the addresses
         * are set based on the IndAddr objects after those get mapped.
         */
        VMSTATE_END_OF_LIST()
    },
    .subsections = (const VMStateDescription * []) {
        &vmstate_adapter_info_so,
        NULL
    }
};

const VMStateDescription vmstate_adapter_routes = {

    .name = "s390_adapter_routes",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_STRUCT(adapter, AdapterRoutes, 1, vmstate_adapter_info,
                       AdapterInfo),
        VMSTATE_END_OF_LIST()
    }
};
Commit	Line	Data
3a553fc6	1	/*
7b35d0c4	2	* QEMU S390x floating interrupt controller (flic)
3a553fc6 JF	3	*
	4	* Copyright 2014 IBM Corp.
	5	* Author(s): Jens Freimann <[email protected]>
7b35d0c4	6	* Cornelia Huck <[email protected]>
3a553fc6 JF	7	*
	8	* This work is licensed under the terms of the GNU GPL, version 2 or (at
	9	* your option) any later version. See the COPYING file in the top-level
	10	* directory.
	11	*/
	12
90191d07	13	#include "qemu/osdep.h"
3a553fc6 JF	14	#include "qemu/error-report.h"
3a553fc6 JF	15	#include "hw/sysbus.h"
1622ffd5	16	#include "hw/s390x/ioinst.h"
3a553fc6	17	#include "hw/s390x/s390_flic.h"
1622ffd5	18	#include "hw/s390x/css.h"
3a553fc6	19	#include "trace.h"
1622ffd5	20	#include "cpu.h"
e61cc6b5 HP	21	#include "hw/qdev.h"
e61cc6b5 HP	22	#include "qapi/error.h"
517ff12c	23	#include "hw/s390x/s390-virtio-ccw.h"
3a553fc6	24
6762808f DH	25	S390FLICStateClass s390_get_flic_class(S390FLICState fs)
	26	{
	27	static S390FLICStateClass *class;
	28
	29	if (!class) {
	30	/* we only have one flic device, so this is fine to cache */
	31	class = S390_FLIC_COMMON_GET_CLASS(fs);
	32	}
	33	return class;
	34	}
	35
f68ecdd4 DH	36	QEMUS390FLICState s390_get_qemu_flic(S390FLICState fs)
	37	{
	38	static QEMUS390FLICState *flic;
	39
	40	if (!flic) {
	41	/* we only have one flic device, so this is fine to cache */
	42	flic = QEMU_S390_FLIC(fs);
	43	}
	44	return flic;
	45	}
	46
7b35d0c4	47	S390FLICState *s390_get_flic(void)
819bd309	48	{
bc66d6cb	49	static S390FLICState *fs;
819bd309	50
7b35d0c4	51	if (!fs) {
b03d9970 DH	52	fs = S390_FLIC_COMMON(object_resolve_path_type("",
	53	TYPE_S390_FLIC_COMMON,
	54	NULL));
819bd309	55	}
7b35d0c4	56	return fs;
819bd309 DD	57	}
819bd309 DD	58
7b35d0c4	59	void s390_flic_init(void)
3a553fc6	60	{
7b35d0c4	61	DeviceState *dev;
3a553fc6	62
e2ac12f0 DH	63	if (kvm_enabled()) {
	64	dev = qdev_create(NULL, TYPE_KVM_S390_FLIC);
	65	object_property_add_child(qdev_get_machine(), TYPE_KVM_S390_FLIC,
	66	OBJECT(dev), NULL);
	67	} else {
7b35d0c4 CH	68	dev = qdev_create(NULL, TYPE_QEMU_S390_FLIC);
	69	object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC,
	70	OBJECT(dev), NULL);
3a553fc6	71	}
ae4a2bd7	72	qdev_init_nofail(dev);
3a553fc6 JF	73	}
3a553fc6 JF	74
03cf077a CH	75	static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id,
03cf077a CH	76	uint8_t isc, bool swap,
1497c160	77	bool is_maskable, uint8_t flags)
03cf077a CH	78	{
	79	/* nothing to do */
	80	return 0;
	81	}
	82
d426d9fb CH	83	static int qemu_s390_io_adapter_map(S390FLICState *fs, uint32_t id,
	84	uint64_t map_addr, bool do_map)
	85	{
	86	/* nothing to do */
	87	return 0;
	88	}
	89
	90	static int qemu_s390_add_adapter_routes(S390FLICState *fs,
	91	AdapterRoutes *routes)
	92	{
	93	return -ENOSYS;
	94	}
	95
	96	static void qemu_s390_release_adapter_routes(S390FLICState *fs,
	97	AdapterRoutes *routes)
	98	{
	99	}
	100
9eccb862 HP	101	static int qemu_s390_clear_io_flic(S390FLICState *fs, uint16_t subchannel_id,
	102	uint16_t subchannel_nr)
	103	{
f68ecdd4	104	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
6e0d8175 DH	105	QEMUS390FlicIO cur, next;
	106	uint8_t isc;
	107
	108	g_assert(qemu_mutex_iothread_locked());
	109	if (!(flic->pending & FLIC_PENDING_IO)) {
	110	return 0;
	111	}
	112
	113	/* check all iscs */
	114	for (isc = 0; isc < 8; isc++) {
	115	if (QLIST_EMPTY(&flic->io[isc])) {
	116	continue;
	117	}
	118
	119	/* search and delete any matching one */
	120	QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
	121	if (cur->id == subchannel_id && cur->nr == subchannel_nr) {
	122	QLIST_REMOVE(cur, next);
	123	g_free(cur);
	124	}
	125	}
	126
	127	/* update our indicator bit */
	128	if (QLIST_EMPTY(&flic->io[isc])) {
	129	flic->pending &= ~ISC_TO_PENDING_IO(isc);
	130	}
	131	}
	132	return 0;
9eccb862 HP	133	}
9eccb862 HP	134
6c1dd652 FL	135	static int qemu_s390_modify_ais_mode(S390FLICState *fs, uint8_t isc,
	136	uint16_t mode)
	137	{
f68ecdd4	138	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
6c1dd652 FL	139
	140	switch (mode) {
	141	case SIC_IRQ_MODE_ALL:
	142	flic->simm &= ~AIS_MODE_MASK(isc);
	143	flic->nimm &= ~AIS_MODE_MASK(isc);
	144	break;
	145	case SIC_IRQ_MODE_SINGLE:
	146	flic->simm \|= AIS_MODE_MASK(isc);
	147	flic->nimm &= ~AIS_MODE_MASK(isc);
	148	break;
	149	default:
	150	return -EINVAL;
	151	}
	152
	153	return 0;
	154	}
	155
1622ffd5 YMZ	156	static int qemu_s390_inject_airq(S390FLICState *fs, uint8_t type,
	157	uint8_t isc, uint8_t flags)
	158	{
f68ecdd4	159	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
6762808f	160	S390FLICStateClass *fsc = s390_get_flic_class(fs);
1622ffd5 YMZ	161	bool flag = flags & S390_ADAPTER_SUPPRESSIBLE;
	162	uint32_t io_int_word = (isc << 27) \| IO_INT_WORD_AI;
	163
	164	if (flag && (flic->nimm & AIS_MODE_MASK(isc))) {
	165	trace_qemu_s390_airq_suppressed(type, isc);
	166	return 0;
	167	}
	168
d8d7942d	169	fsc->inject_io(fs, 0, 0, 0, io_int_word);
1622ffd5 YMZ	170
	171	if (flag && (flic->simm & AIS_MODE_MASK(isc))) {
	172	flic->nimm \|= AIS_MODE_MASK(isc);
	173	trace_qemu_s390_suppress_airq(isc, "Single-Interruption Mode",
	174	"NO-Interruptions Mode");
	175	}
	176
	177	return 0;
	178	}
	179
b194e447 DH	180	static void qemu_s390_flic_notify(uint32_t type)
	181	{
	182	CPUState *cs;
	183
	184	/*
	185	* We have to make all CPUs see CPU_INTERRUPT_HARD, so they might
631b5966 DH	186	* consider it. We will kick all running CPUs and only relevant
631b5966 DH	187	* sleeping ones.
b194e447 DH	188	*/
b194e447 DH	189	CPU_FOREACH(cs) {
631b5966 DH	190	S390CPU *cpu = S390_CPU(cs);
	191
	192	cs->interrupt_request \|= CPU_INTERRUPT_HARD;
	193
	194	/* ignore CPUs that are not sleeping */
9d0306df VM	195	if (s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING &&
9d0306df VM	196	s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD) {
631b5966 DH	197	continue;
	198	}
	199
	200	/* we always kick running CPUs for now, this is tricky */
	201	if (cs->halted) {
	202	/* don't check for subclasses, CPUs double check when waking up */
	203	if (type & FLIC_PENDING_SERVICE) {
	204	if (!(cpu->env.psw.mask & PSW_MASK_EXT)) {
	205	continue;
	206	}
	207	} else if (type & FLIC_PENDING_IO) {
	208	if (!(cpu->env.psw.mask & PSW_MASK_IO)) {
	209	continue;
	210	}
	211	} else if (type & FLIC_PENDING_MCHK_CR) {
	212	if (!(cpu->env.psw.mask & PSW_MASK_MCHECK)) {
	213	continue;
	214	}
	215	}
	216	}
b194e447 DH	217	cpu_interrupt(cs, CPU_INTERRUPT_HARD);
	218	}
	219	}
	220
	221	uint32_t qemu_s390_flic_dequeue_service(QEMUS390FLICState *flic)
	222	{
	223	uint32_t tmp;
	224
	225	g_assert(qemu_mutex_iothread_locked());
	226	g_assert(flic->pending & FLIC_PENDING_SERVICE);
	227	tmp = flic->service_param;
	228	flic->service_param = 0;
	229	flic->pending &= ~FLIC_PENDING_SERVICE;
	230
	231	return tmp;
	232	}
	233
	234	/* caller has to free the returned object */
	235	QEMUS390FlicIO qemu_s390_flic_dequeue_io(QEMUS390FLICState flic, uint64_t cr6)
	236	{
	237	QEMUS390FlicIO *io;
	238	uint8_t isc;
	239
	240	g_assert(qemu_mutex_iothread_locked());
	241	if (!(flic->pending & CR6_TO_PENDING_IO(cr6))) {
	242	return NULL;
	243	}
	244
	245	for (isc = 0; isc < 8; isc++) {
	246	if (QLIST_EMPTY(&flic->io[isc]) \|\| !(cr6 & ISC_TO_ISC_BITS(isc))) {
	247	continue;
	248	}
	249	io = QLIST_FIRST(&flic->io[isc]);
	250	QLIST_REMOVE(io, next);
	251
	252	/* update our indicator bit */
	253	if (QLIST_EMPTY(&flic->io[isc])) {
	254	flic->pending &= ~ISC_TO_PENDING_IO(isc);
	255	}
	256	return io;
	257	}
	258
	259	return NULL;
	260	}
	261
	262	void qemu_s390_flic_dequeue_crw_mchk(QEMUS390FLICState *flic)
	263	{
	264	g_assert(qemu_mutex_iothread_locked());
	265	g_assert(flic->pending & FLIC_PENDING_MCHK_CR);
	266	flic->pending &= ~FLIC_PENDING_MCHK_CR;
	267	}
	268
e6505d53 DH	269	static void qemu_s390_inject_service(S390FLICState *fs, uint32_t parm)
e6505d53 DH	270	{
f68ecdd4	271	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
e6505d53	272
b194e447 DH	273	g_assert(qemu_mutex_iothread_locked());
	274	/* multiplexing is good enough for sclp - kvm does it internally as well */
	275	flic->service_param \|= parm;
	276	flic->pending \|= FLIC_PENDING_SERVICE;
e6505d53	277
b194e447	278	qemu_s390_flic_notify(FLIC_PENDING_SERVICE);
e6505d53 DH	279	}
	280
	281	static void qemu_s390_inject_io(S390FLICState *fs, uint16_t subchannel_id,
	282	uint16_t subchannel_nr, uint32_t io_int_parm,
	283	uint32_t io_int_word)
	284	{
b194e447	285	const uint8_t isc = IO_INT_WORD_ISC(io_int_word);
f68ecdd4	286	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
b194e447	287	QEMUS390FlicIO *io;
e6505d53	288
b194e447 DH	289	g_assert(qemu_mutex_iothread_locked());
	290	io = g_new0(QEMUS390FlicIO, 1);
	291	io->id = subchannel_id;
	292	io->nr = subchannel_nr;
	293	io->parm = io_int_parm;
	294	io->word = io_int_word;
	295
	296	QLIST_INSERT_HEAD(&flic->io[isc], io, next);
	297	flic->pending \|= ISC_TO_PENDING_IO(isc);
	298
	299	qemu_s390_flic_notify(ISC_TO_PENDING_IO(isc));
e6505d53 DH	300	}
	301
	302	static void qemu_s390_inject_crw_mchk(S390FLICState *fs)
	303	{
f68ecdd4	304	QEMUS390FLICState *flic = s390_get_qemu_flic(fs);
b194e447 DH	305
	306	g_assert(qemu_mutex_iothread_locked());
	307	flic->pending \|= FLIC_PENDING_MCHK_CR;
	308
	309	qemu_s390_flic_notify(FLIC_PENDING_MCHK_CR);
	310	}
	311
	312	bool qemu_s390_flic_has_service(QEMUS390FLICState *flic)
	313	{
	314	/* called without lock via cc->has_work, will be validated under lock */
	315	return !!(flic->pending & FLIC_PENDING_SERVICE);
	316	}
	317
	318	bool qemu_s390_flic_has_io(QEMUS390FLICState *flic, uint64_t cr6)
	319	{
	320	/* called without lock via cc->has_work, will be validated under lock */
	321	return !!(flic->pending & CR6_TO_PENDING_IO(cr6));
	322	}
	323
	324	bool qemu_s390_flic_has_crw_mchk(QEMUS390FLICState *flic)
	325	{
	326	/* called without lock via cc->has_work, will be validated under lock */
	327	return !!(flic->pending & FLIC_PENDING_MCHK_CR);
	328	}
e6505d53	329
b194e447 DH	330	bool qemu_s390_flic_has_any(QEMUS390FLICState *flic)
	331	{
	332	g_assert(qemu_mutex_iothread_locked());
	333	return !!flic->pending;
e6505d53 DH	334	}
e6505d53 DH	335
6c1dd652 FL	336	static void qemu_s390_flic_reset(DeviceState *dev)
	337	{
	338	QEMUS390FLICState *flic = QEMU_S390_FLIC(dev);
b194e447 DH	339	QEMUS390FlicIO cur, next;
b194e447 DH	340	int isc;
6c1dd652	341
b194e447	342	g_assert(qemu_mutex_iothread_locked());
6c1dd652 FL	343	flic->simm = 0;
6c1dd652 FL	344	flic->nimm = 0;
b194e447 DH	345	flic->pending = 0;
	346
	347	/* remove all pending io interrupts */
	348	for (isc = 0; isc < 8; isc++) {
	349	QLIST_FOREACH_SAFE(cur, &flic->io[isc], next, next) {
	350	QLIST_REMOVE(cur, next);
	351	g_free(cur);
	352	}
	353	}
6c1dd652 FL	354	}
6c1dd652 FL	355
e7be8d49 YMZ	356	bool ais_needed(void *opaque)
	357	{
	358	S390FLICState *s = opaque;
	359
	360	return s->ais_supported;
	361	}
	362
	363	static const VMStateDescription qemu_s390_flic_vmstate = {
	364	.name = "qemu-s390-flic",
	365	.version_id = 1,
	366	.minimum_version_id = 1,
	367	.needed = ais_needed,
	368	.fields = (VMStateField[]) {
	369	VMSTATE_UINT8(simm, QEMUS390FLICState),
	370	VMSTATE_UINT8(nimm, QEMUS390FLICState),
	371	VMSTATE_END_OF_LIST()
	372	}
	373	};
	374
b194e447 DH	375	static void qemu_s390_flic_instance_init(Object *obj)
	376	{
	377	QEMUS390FLICState *flic = QEMU_S390_FLIC(obj);
	378	int isc;
	379
	380	for (isc = 0; isc < 8; isc++) {
	381	QLIST_INIT(&flic->io[isc]);
	382	}
	383	}
	384
03cf077a CH	385	static void qemu_s390_flic_class_init(ObjectClass oc, void data)
03cf077a CH	386	{
6c1dd652	387	DeviceClass *dc = DEVICE_CLASS(oc);
03cf077a CH	388	S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);
03cf077a CH	389
6c1dd652	390	dc->reset = qemu_s390_flic_reset;
e7be8d49	391	dc->vmsd = &qemu_s390_flic_vmstate;
03cf077a	392	fsc->register_io_adapter = qemu_s390_register_io_adapter;
d426d9fb CH	393	fsc->io_adapter_map = qemu_s390_io_adapter_map;
	394	fsc->add_adapter_routes = qemu_s390_add_adapter_routes;
	395	fsc->release_adapter_routes = qemu_s390_release_adapter_routes;
9eccb862	396	fsc->clear_io_irq = qemu_s390_clear_io_flic;
6c1dd652	397	fsc->modify_ais_mode = qemu_s390_modify_ais_mode;
1622ffd5	398	fsc->inject_airq = qemu_s390_inject_airq;
e6505d53 DH	399	fsc->inject_service = qemu_s390_inject_service;
	400	fsc->inject_io = qemu_s390_inject_io;
	401	fsc->inject_crw_mchk = qemu_s390_inject_crw_mchk;
03cf077a CH	402	}
03cf077a CH	403
e61cc6b5 HP	404	static Property s390_flic_common_properties[] = {
	405	DEFINE_PROP_UINT32("adapter_routes_max_batch", S390FLICState,
	406	adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI),
	407	DEFINE_PROP_END_OF_LIST(),
	408	};
	409
	410	static void s390_flic_common_realize(DeviceState dev, Error *errp)
	411	{
6c1dd652 FL	412	S390FLICState *fs = S390_FLIC_COMMON(dev);
6c1dd652 FL	413	uint32_t max_batch = fs->adapter_routes_max_batch;
e61cc6b5 HP	414
e61cc6b5 HP	415	if (max_batch > ADAPTER_ROUTES_MAX_GSI) {
5cbab1bf HP	416	error_setg(errp, "flic property adapter_routes_max_batch too big"
5cbab1bf HP	417	" (%d > %d)", max_batch, ADAPTER_ROUTES_MAX_GSI);
3b00f702	418	return;
e61cc6b5	419	}
6c1dd652	420
3b00f702	421	fs->ais_supported = s390_has_feat(S390_FEAT_ADAPTER_INT_SUPPRESSION);
e61cc6b5 HP	422	}
	423
	424	static void s390_flic_class_init(ObjectClass oc, void data)
	425	{
	426	DeviceClass *dc = DEVICE_CLASS(oc);
	427
	428	dc->props = s390_flic_common_properties;
	429	dc->realize = s390_flic_common_realize;
	430	}
	431
7b35d0c4 CH	432	static const TypeInfo qemu_s390_flic_info = {
	433	.name = TYPE_QEMU_S390_FLIC,
	434	.parent = TYPE_S390_FLIC_COMMON,
	435	.instance_size = sizeof(QEMUS390FLICState),
b194e447	436	.instance_init = qemu_s390_flic_instance_init,
03cf077a	437	.class_init = qemu_s390_flic_class_init,
7b35d0c4	438	};
3a553fc6	439
e61cc6b5	440
7b35d0c4 CH	441	static const TypeInfo s390_flic_common_info = {
7b35d0c4 CH	442	.name = TYPE_S390_FLIC_COMMON,
3a553fc6	443	.parent = TYPE_SYS_BUS_DEVICE,
7b35d0c4	444	.instance_size = sizeof(S390FLICState),
e61cc6b5	445	.class_init = s390_flic_class_init,
7b35d0c4	446	.class_size = sizeof(S390FLICStateClass),
3a553fc6 JF	447	};
3a553fc6 JF	448
7b35d0c4	449	static void qemu_s390_flic_register_types(void)
3a553fc6	450	{
7b35d0c4 CH	451	type_register_static(&s390_flic_common_info);
7b35d0c4 CH	452	type_register_static(&qemu_s390_flic_info);
3a553fc6 JF	453	}
3a553fc6 JF	454
7b35d0c4	455	type_init(qemu_s390_flic_register_types)
517ff12c	456
457af626 HP	457	static bool adapter_info_so_needed(void *opaque)
	458	{
	459	return css_migration_enabled();
	460	}
	461
	462	const VMStateDescription vmstate_adapter_info_so = {
	463	.name = "s390_adapter_info/summary_offset",
	464	.version_id = 1,
	465	.minimum_version_id = 1,
	466	.needed = adapter_info_so_needed,
	467	.fields = (VMStateField[]) {
	468	VMSTATE_UINT32(summary_offset, AdapterInfo),
	469	VMSTATE_END_OF_LIST()
	470	}
	471	};
	472
517ff12c HP	473	const VMStateDescription vmstate_adapter_info = {
	474	.name = "s390_adapter_info",
	475	.version_id = 1,
	476	.minimum_version_id = 1,
	477	.fields = (VMStateField[]) {
	478	VMSTATE_UINT64(ind_offset, AdapterInfo),
	479	/*
	480	* We do not have to migrate neither the id nor the addresses.
	481	* The id is set by css_register_io_adapter and the addresses
	482	* are set based on the IndAddr objects after those get mapped.
	483	*/
	484	VMSTATE_END_OF_LIST()
	485	},
457af626 HP	486	.subsections = (const VMStateDescription * []) {
	487	&vmstate_adapter_info_so,
	488	NULL
	489	}
517ff12c HP	490	};
	491
	492	const VMStateDescription vmstate_adapter_routes = {
	493
	494	.name = "s390_adapter_routes",
	495	.version_id = 1,
	496	.minimum_version_id = 1,
	497	.fields = (VMStateField[]) {
	498	VMSTATE_STRUCT(adapter, AdapterRoutes, 1, vmstate_adapter_info,
	499	AdapterInfo),
	500	VMSTATE_END_OF_LIST()
	501	}
	502	};