[qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "dis-asm.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "exec-all.h"
#include "disas.h"

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save miniscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

#ifdef TARGET_ARM
static int
print_insn_thumb1(bfd_vma pc, disassemble_info *info)
{
  return print_insn_arm(pc | 1, info);
}
#endif

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - nonzero means 16 bit code
    arm  - nonzero means thumb code
    ppc  - nonzero means little endian
    other targets - unused
 */
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
{
    target_ulong pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.read_memory_func = target_read_memory;
    disasm_info.buffer_vma = code;
    disasm_info.buffer_length = size;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    if (flags)
	print_insn = print_insn_thumb1;
    else
	print_insn = print_insn_arm;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags >> 16)
        disasm_info.endian = BFD_ENDIAN_LITTLE;
    if (flags & 0xFFFF) {
        /* If we have a precise definitions of the instructions set, use it */
        disasm_info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        disasm_info.mach = bfd_mach_ppc64;
#else
        disasm_info.mach = bfd_mach_ppc;
#endif
    }
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    disasm_info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    disasm_info.mach = bfd_mach_alpha;
    print_insn = print_insn_alpha;
#elif defined(TARGET_CRIS)
    disasm_info.mach = bfd_mach_cris_v32;
    print_insn = print_insn_crisv32;
#elif defined(TARGET_MICROBLAZE)
    disasm_info.mach = bfd_arch_microblaze;
    print_insn = print_insn_microblaze;
#else
    fprintf(out, "0x" TARGET_FMT_lx
	    ": Asm output not supported on this arch\n", code);
    return;
#endif

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &disasm_info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to [email protected]\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    unsigned long pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.buffer = code;
    disasm_info.buffer_vma = (unsigned long)code;
    disasm_info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(__i386__)
    disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    disasm_info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    print_insn = print_insn_ppc;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#else
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
	    (long) code);
    return;
#endif
    for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x%08lx:  ", pc);
#ifdef __arm__
        /* since data is included in the code, it is better to
           display code data too */
        fprintf(out, "%08x  ", (int)bfd_getl32((const bfd_byte *)pc));
#endif
	count = print_insn(pc, &disasm_info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor.h"

static int monitor_disas_is_physical;
static CPUState *monitor_disas_env;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    if (monitor_disas_is_physical) {
        cpu_physical_memory_rw(memaddr, myaddr, length, 0);
    } else {
        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
    }
    return 0;
}

static int monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    monitor_vprintf((Monitor *)stream, fmt, ap);
    va_end(ap);
    return 0;
}

void monitor_disas(Monitor *mon, CPUState *env,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    int count, i;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);

    monitor_disas_env = env;
    monitor_disas_is_physical = is_physical;
    disasm_info.read_memory_func = monitor_read_memory;

    disasm_info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    print_insn = print_insn_arm;
#elif defined(TARGET_ALPHA)
    print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
#ifdef TARGET_PPC64
    disasm_info.mach = bfd_mach_ppc64;
#else
    disasm_info.mach = bfd_mach_ppc;
#endif
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    disasm_info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#else
    monitor_printf(mon, "0x" TARGET_FMT_lx
                   ": Asm output not supported on this arch\n", pc);
    return;
#endif

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
b9adb4a6	3	#include "dis-asm.h"
b9adb4a6	4	#include "elf.h"
aa0aa4fa	5	#include <errno.h>
b9adb4a6	6
c6105c0a FB	7	#include "cpu.h"
c6105c0a FB	8	#include "exec-all.h"
9307c4c1	9	#include "disas.h"
c6105c0a	10
b9adb4a6	11	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	12	struct syminfo *syminfos = NULL;
b9adb4a6	13
aa0aa4fa FB	14	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	15	Transfer them to myaddr. */
	16	int
3a742b76 PB	17	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	18	struct disassemble_info *info)
aa0aa4fa	19	{
c6105c0a FB	20	if (memaddr < info->buffer_vma
	21	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	22	/* Out of bounds. Use EIO because GDB uses it. */
	23	return EIO;
	24	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	25	return 0;
aa0aa4fa FB	26	}
aa0aa4fa FB	27
c6105c0a FB	28	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	29	Transfer them to myaddr. */
	30	static int
c27004ec FB	31	target_read_memory (bfd_vma memaddr,
	32	bfd_byte *myaddr,
	33	int length,
	34	struct disassemble_info *info)
c6105c0a	35	{
e612a1f7	36	cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a FB	37	return 0;
c6105c0a FB	38	}
c6105c0a	39
aa0aa4fa FB	40	/* Print an error message. We can assume that this is in response to
	41	an error return from buffer_read_memory. */
	42	void
3a742b76	43	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	44	{
	45	if (status != EIO)
	46	/* Can't happen. */
	47	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	48	else
	49	/* Actually, address between memaddr and memaddr + len was
	50	out of bounds. */
	51	(*info->fprintf_func) (info->stream,
26a76461	52	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	53	}
	54
	55	/* This could be in a separate file, to save miniscule amounts of space
	56	in statically linked executables. */
	57
	58	/* Just print the address is hex. This is included for completeness even
	59	though both GDB and objdump provide their own (to print symbolic
	60	addresses). */
	61
	62	void
3a742b76	63	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	64	{
26a76461	65	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	66	}
	67
	68	/* Just return the given address. */
	69
	70	int
3a742b76	71	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	72	{
	73	return 1;
	74	}
	75
903ec55c AJ	76	bfd_vma bfd_getl64 (const bfd_byte *addr)
	77	{
	78	unsigned long long v;
	79
	80	v = (unsigned long long) addr[0];
	81	v \|= (unsigned long long) addr[1] << 8;
	82	v \|= (unsigned long long) addr[2] << 16;
	83	v \|= (unsigned long long) addr[3] << 24;
	84	v \|= (unsigned long long) addr[4] << 32;
	85	v \|= (unsigned long long) addr[5] << 40;
	86	v \|= (unsigned long long) addr[6] << 48;
	87	v \|= (unsigned long long) addr[7] << 56;
	88	return (bfd_vma) v;
	89	}
	90
aa0aa4fa FB	91	bfd_vma bfd_getl32 (const bfd_byte *addr)
	92	{
	93	unsigned long v;
	94
	95	v = (unsigned long) addr[0];
	96	v \|= (unsigned long) addr[1] << 8;
	97	v \|= (unsigned long) addr[2] << 16;
	98	v \|= (unsigned long) addr[3] << 24;
	99	return (bfd_vma) v;
	100	}
	101
	102	bfd_vma bfd_getb32 (const bfd_byte *addr)
	103	{
	104	unsigned long v;
	105
	106	v = (unsigned long) addr[0] << 24;
	107	v \|= (unsigned long) addr[1] << 16;
	108	v \|= (unsigned long) addr[2] << 8;
	109	v \|= (unsigned long) addr[3];
	110	return (bfd_vma) v;
	111	}
	112
6af0bf9c FB	113	bfd_vma bfd_getl16 (const bfd_byte *addr)
	114	{
	115	unsigned long v;
	116
	117	v = (unsigned long) addr[0];
	118	v \|= (unsigned long) addr[1] << 8;
	119	return (bfd_vma) v;
	120	}
	121
	122	bfd_vma bfd_getb16 (const bfd_byte *addr)
	123	{
	124	unsigned long v;
	125
	126	v = (unsigned long) addr[0] << 24;
	127	v \|= (unsigned long) addr[1] << 16;
	128	return (bfd_vma) v;
	129	}
	130
c2d551ff FB	131	#ifdef TARGET_ARM
	132	static int
	133	print_insn_thumb1(bfd_vma pc, disassemble_info *info)
	134	{
	135	return print_insn_arm(pc \| 1, info);
	136	}
	137	#endif
	138
e91c8a77	139	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff FB	140	values:
c2d551ff FB	141	i386 - nonzero means 16 bit code
5fafdf24	142	arm - nonzero means thumb code
6a00d601	143	ppc - nonzero means little endian
c2d551ff FB	144	other targets - unused
c2d551ff FB	145	*/
83b34f8b	146	void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6	147	{
c27004ec	148	target_ulong pc;
b9adb4a6 FB	149	int count;
	150	struct disassemble_info disasm_info;
	151	int (print_insn)(bfd_vma pc, disassemble_info info);
	152
	153	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	154
c27004ec FB	155	disasm_info.read_memory_func = target_read_memory;
	156	disasm_info.buffer_vma = code;
	157	disasm_info.buffer_length = size;
	158
	159	#ifdef TARGET_WORDS_BIGENDIAN
	160	disasm_info.endian = BFD_ENDIAN_BIG;
	161	#else
	162	disasm_info.endian = BFD_ENDIAN_LITTLE;
	163	#endif
	164	#if defined(TARGET_I386)
	165	if (flags == 2)
	166	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	167	else if (flags == 1)
c27004ec FB	168	disasm_info.mach = bfd_mach_i386_i8086;
	169	else
	170	disasm_info.mach = bfd_mach_i386_i386;
	171	print_insn = print_insn_i386;
	172	#elif defined(TARGET_ARM)
c2d551ff FB	173	if (flags)
	174	print_insn = print_insn_thumb1;
	175	else
	176	print_insn = print_insn_arm;
c27004ec FB	177	#elif defined(TARGET_SPARC)
c27004ec FB	178	print_insn = print_insn_sparc;
3475187d FB	179	#ifdef TARGET_SPARC64
3475187d FB	180	disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624	181	#endif
c27004ec	182	#elif defined(TARGET_PPC)
237c0af0	183	if (flags >> 16)
111bfab3	184	disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0 JM	185	if (flags & 0xFFFF) {
	186	/* If we have a precise definitions of the instructions set, use it */
	187	disasm_info.mach = flags & 0xFFFF;
	188	} else {
a2458627	189	#ifdef TARGET_PPC64
237c0af0	190	disasm_info.mach = bfd_mach_ppc64;
a2458627	191	#else
237c0af0	192	disasm_info.mach = bfd_mach_ppc;
a2458627	193	#endif
237c0af0	194	}
c27004ec	195	print_insn = print_insn_ppc;
e6e5906b PB	196	#elif defined(TARGET_M68K)
e6e5906b PB	197	print_insn = print_insn_m68k;
6af0bf9c	198	#elif defined(TARGET_MIPS)
76b3030c	199	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	200	print_insn = print_insn_big_mips;
76b3030c FB	201	#else
	202	print_insn = print_insn_little_mips;
	203	#endif
fdf9b3e8 FB	204	#elif defined(TARGET_SH4)
	205	disasm_info.mach = bfd_mach_sh4;
	206	print_insn = print_insn_sh;
eddf68a6 JM	207	#elif defined(TARGET_ALPHA)
	208	disasm_info.mach = bfd_mach_alpha;
	209	print_insn = print_insn_alpha;
a25fd137 TS	210	#elif defined(TARGET_CRIS)
	211	disasm_info.mach = bfd_mach_cris_v32;
	212	print_insn = print_insn_crisv32;
e90e390c EI	213	#elif defined(TARGET_MICROBLAZE)
	214	disasm_info.mach = bfd_arch_microblaze;
	215	print_insn = print_insn_microblaze;
c27004ec	216	#else
b8076a74 FB	217	fprintf(out, "0x" TARGET_FMT_lx
b8076a74 FB	218	": Asm output not supported on this arch\n", code);
c27004ec	219	return;
c6105c0a FB	220	#endif
c6105c0a FB	221
7e000c2e	222	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	223	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec FB	224	count = print_insn(pc, &disasm_info);
	225	#if 0
	226	{
	227	int i;
	228	uint8_t b;
	229	fprintf(out, " {");
	230	for(i = 0; i < count; i++) {
	231	target_read_memory(pc + i, &b, 1, &disasm_info);
	232	fprintf(out, " %02x", b);
	233	}
	234	fprintf(out, " }");
	235	}
	236	#endif
	237	fprintf(out, "\n");
	238	if (count < 0)
	239	break;
754d00ae	240	if (size < count) {
	241	fprintf(out,
	242	"Disassembler disagrees with translator over instruction "
	243	"decoding\n"
	244	"Please report this to [email protected]\n");
	245	break;
	246	}
c27004ec FB	247	}
	248	}
	249
	250	/* Disassemble this for me please... (debugging). */
	251	void disas(FILE out, void code, unsigned long size)
	252	{
	253	unsigned long pc;
	254	int count;
	255	struct disassemble_info disasm_info;
	256	int (print_insn)(bfd_vma pc, disassemble_info info);
	257
	258	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	259
b9adb4a6 FB	260	disasm_info.buffer = code;
	261	disasm_info.buffer_vma = (unsigned long)code;
	262	disasm_info.buffer_length = size;
	263
e2542fe2	264	#ifdef HOST_WORDS_BIGENDIAN
c27004ec	265	disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6	266	#else
c27004ec	267	disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	268	#endif
bc51c5c9	269	#if defined(__i386__)
c27004ec FB	270	disasm_info.mach = bfd_mach_i386_i386;
c27004ec FB	271	print_insn = print_insn_i386;
bc51c5c9	272	#elif defined(__x86_64__)
c27004ec FB	273	disasm_info.mach = bfd_mach_x86_64;
c27004ec FB	274	print_insn = print_insn_i386;
e58ffeb3	275	#elif defined(_ARCH_PPC)
c27004ec	276	print_insn = print_insn_ppc;
a993ba85	277	#elif defined(__alpha__)
c27004ec	278	print_insn = print_insn_alpha;
aa0aa4fa	279	#elif defined(__sparc__)
c27004ec	280	print_insn = print_insn_sparc;
6ecd4534 BS	281	#if defined(__sparc_v8plus__) \|\| defined(__sparc_v8plusa__) \|\| defined(__sparc_v9__)
	282	disasm_info.mach = bfd_mach_sparc_v9b;
	283	#endif
5fafdf24	284	#elif defined(__arm__)
c27004ec	285	print_insn = print_insn_arm;
6af0bf9c FB	286	#elif defined(__MIPSEB__)
	287	print_insn = print_insn_big_mips;
	288	#elif defined(__MIPSEL__)
	289	print_insn = print_insn_little_mips;
48024e4a FB	290	#elif defined(__m68k__)
48024e4a FB	291	print_insn = print_insn_m68k;
8f860bb8 TS	292	#elif defined(__s390__)
8f860bb8 TS	293	print_insn = print_insn_s390;
f54b3f92 AJ	294	#elif defined(__hppa__)
f54b3f92 AJ	295	print_insn = print_insn_hppa;
903ec55c AJ	296	#elif defined(__ia64__)
903ec55c AJ	297	print_insn = print_insn_ia64;
b9adb4a6	298	#else
b8076a74 FB	299	fprintf(out, "0x%lx: Asm output not supported on this arch\n",
b8076a74 FB	300	(long) code);
c27004ec	301	return;
b9adb4a6	302	#endif
7e000c2e	303	for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
c27004ec	304	fprintf(out, "0x%08lx: ", pc);
aa0aa4fa	305	#ifdef __arm__
46152182	306	/* since data is included in the code, it is better to
aa0aa4fa	307	display code data too */
46152182	308	fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
aa0aa4fa	309	#endif
c27004ec	310	count = print_insn(pc, &disasm_info);
b9adb4a6 FB	311	fprintf(out, "\n");
	312	if (count < 0)
	313	break;
	314	}
	315	}
	316
	317	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	318	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	319	{
49918a75	320	const char *symbol = "";
e80cfcfc	321	struct syminfo *s;
3b46e624	322
e80cfcfc	323	for (s = syminfos; s; s = s->next) {
49918a75 PB	324	symbol = s->lookup_symbol(s, orig_addr);
	325	if (symbol[0] != '\0') {
	326	break;
	327	}
b9adb4a6	328	}
49918a75 PB	329
49918a75 PB	330	return symbol;
b9adb4a6	331	}
9307c4c1 FB	332
	333	#if !defined(CONFIG_USER_ONLY)
	334
376253ec	335	#include "monitor.h"
3d2cfdf1	336
9307c4c1	337	static int monitor_disas_is_physical;
6a00d601	338	static CPUState *monitor_disas_env;
9307c4c1 FB	339
9307c4c1 FB	340	static int
a5f1b965 BS	341	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	342	struct disassemble_info *info)
9307c4c1 FB	343	{
	344	if (monitor_disas_is_physical) {
	345	cpu_physical_memory_rw(memaddr, myaddr, length, 0);
	346	} else {
6a00d601	347	cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1 FB	348	}
	349	return 0;
	350	}
	351
3d2cfdf1 FB	352	static int monitor_fprintf(FILE stream, const char fmt, ...)
	353	{
	354	va_list ap;
	355	va_start(ap, fmt);
376253ec	356	monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1 FB	357	va_end(ap);
	358	return 0;
	359	}
	360
376253ec	361	void monitor_disas(Monitor mon, CPUState env,
6a00d601	362	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	363	{
9307c4c1 FB	364	int count, i;
	365	struct disassemble_info disasm_info;
	366	int (print_insn)(bfd_vma pc, disassemble_info info);
	367
376253ec	368	INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1	369
6a00d601	370	monitor_disas_env = env;
9307c4c1 FB	371	monitor_disas_is_physical = is_physical;
	372	disasm_info.read_memory_func = monitor_read_memory;
	373
	374	disasm_info.buffer_vma = pc;
	375
	376	#ifdef TARGET_WORDS_BIGENDIAN
	377	disasm_info.endian = BFD_ENDIAN_BIG;
	378	#else
	379	disasm_info.endian = BFD_ENDIAN_LITTLE;
	380	#endif
	381	#if defined(TARGET_I386)
fa15e030 FB	382	if (flags == 2)
fa15e030 FB	383	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	384	else if (flags == 1)
9307c4c1	385	disasm_info.mach = bfd_mach_i386_i8086;
fa15e030 FB	386	else
fa15e030 FB	387	disasm_info.mach = bfd_mach_i386_i386;
9307c4c1 FB	388	print_insn = print_insn_i386;
	389	#elif defined(TARGET_ARM)
	390	print_insn = print_insn_arm;
cbd669da TS	391	#elif defined(TARGET_ALPHA)
cbd669da TS	392	print_insn = print_insn_alpha;
9307c4c1 FB	393	#elif defined(TARGET_SPARC)
9307c4c1 FB	394	print_insn = print_insn_sparc;
682c4f15 BS	395	#ifdef TARGET_SPARC64
	396	disasm_info.mach = bfd_mach_sparc_v9b;
	397	#endif
9307c4c1	398	#elif defined(TARGET_PPC)
a2458627 FB	399	#ifdef TARGET_PPC64
	400	disasm_info.mach = bfd_mach_ppc64;
	401	#else
	402	disasm_info.mach = bfd_mach_ppc;
	403	#endif
9307c4c1	404	print_insn = print_insn_ppc;
e6e5906b PB	405	#elif defined(TARGET_M68K)
e6e5906b PB	406	print_insn = print_insn_m68k;
6af0bf9c	407	#elif defined(TARGET_MIPS)
76b3030c	408	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	409	print_insn = print_insn_big_mips;
76b3030c FB	410	#else
	411	print_insn = print_insn_little_mips;
	412	#endif
b4e1f077 MD	413	#elif defined(TARGET_SH4)
	414	disasm_info.mach = bfd_mach_sh4;
	415	print_insn = print_insn_sh;
9307c4c1	416	#else
376253ec AL	417	monitor_printf(mon, "0x" TARGET_FMT_lx
376253ec AL	418	": Asm output not supported on this arch\n", pc);
9307c4c1 FB	419	return;
	420	#endif
	421
	422	for(i = 0; i < nb_insn; i++) {
376253ec	423	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1	424	count = print_insn(pc, &disasm_info);
376253ec	425	monitor_printf(mon, "\n");
9307c4c1 FB	426	if (count < 0)
	427	break;
	428	pc += count;
	429	}
	430	}
	431	#endif