[qemu.git] / hw / pc.c

/*
 * QEMU PC System Emulator
 * 
 * Copyright (c) 2003-2004 Fabrice Bellard
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"

/* output Bochs bios info messages */
//#define DEBUG_BIOS

#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
#define LINUX_BOOT_FILENAME "linux_boot.bin"

#define KERNEL_LOAD_ADDR     0x00100000
#define INITRD_LOAD_ADDR     0x00400000
#define KERNEL_PARAMS_ADDR   0x00090000
#define KERNEL_CMDLINE_ADDR  0x00099000

int speaker_data_on;
int dummy_refresh_clock;
static fdctrl_t *floppy_controller;
static RTCState *rtc_state;

static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
}

/* PC cmos mappings */

#define REG_EQUIPMENT_BYTE          0x14
#define REG_IBM_CENTURY_BYTE        0x32
#define REG_IBM_PS2_CENTURY_BYTE    0x37


static inline int to_bcd(RTCState *s, int a)
{
    return ((a / 10) << 4) | (a % 10);
}

static void cmos_init(int ram_size, int boot_device)
{
    RTCState *s = rtc_state;
    int val;
    int fd0, fd1, nb;
    time_t ti;
    struct tm *tm;

    /* set the CMOS date */
    time(&ti);
    tm = gmtime(&ti);
    rtc_set_date(s, tm);

    val = to_bcd(s, (tm->tm_year / 100) + 19);
    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);

    /* various important CMOS locations needed by PC/Bochs bios */

    /* memory size */
    val = (ram_size / 1024) - 1024;
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x17, val);
    rtc_set_memory(s, 0x18, val >> 8);
    rtc_set_memory(s, 0x30, val);
    rtc_set_memory(s, 0x31, val >> 8);

    val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x34, val);
    rtc_set_memory(s, 0x35, val >> 8);
    
    switch(boot_device) {
    case 'a':
    case 'b':
        rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
        break;
    default:
    case 'c':
        rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
        break;
    case 'd':
        rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
        break;
    }

    /* floppy type */

    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);

    val = 0;
    switch (fd0) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val |= 0x40;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val |= 0x60;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val |= 0x20;
        break;
    }
    switch (fd1) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val |= 0x04;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val |= 0x06;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val |= 0x02;
        break;
    }
    rtc_set_memory(s, 0x10, val);
    
    val = 0;
    nb = 0;
    if (fd0 < 3)
        nb++;
    if (fd1 < 3)
        nb++;
    switch (nb) {
    case 0:
        break;
    case 1:
        val |= 0x01; /* 1 drive, ready for boot */
        break;
    case 2:
        val |= 0x41; /* 2 drives, ready for boot */
        break;
    }
    val |= 0x02; /* FPU is there */
    val |= 0x04; /* PS/2 mouse installed */
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);

}

static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
    speaker_data_on = (val >> 1) & 1;
    pit_set_gate(&pit_channels[2], val & 1);
}

static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
{
    int out;
    out = pit_get_out(&pit_channels[2], qemu_get_clock(vm_clock));
    dummy_refresh_clock ^= 1;
    return (speaker_data_on << 1) | pit_channels[2].gate | (out << 5) |
      (dummy_refresh_clock << 4);
}

static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
{
    cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
    /* XXX: bit 0 is fast reset */
}

static uint32_t ioport92_read(void *opaque, uint32_t addr)
{
    return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
}

/***********************************************************/
/* Bochs BIOS debug ports */

void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
{
    switch(addr) {
        /* Bochs BIOS messages */
    case 0x400:
    case 0x401:
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
        exit(1);
    case 0x402:
    case 0x403:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;

        /* LGPL'ed VGA BIOS messages */
    case 0x501:
    case 0x502:
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
        exit(1);
    case 0x500:
    case 0x503:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
    }
}

void bochs_bios_init(void)
{
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);

    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
}


int load_kernel(const char *filename, uint8_t *addr, 
                uint8_t *real_addr)
{
    int fd, size;
    int setup_sects;

    fd = open(filename, O_RDONLY);
    if (fd < 0)
        return -1;

    /* load 16 bit code */
    if (read(fd, real_addr, 512) != 512)
        goto fail;
    setup_sects = real_addr[0x1F1];
    if (!setup_sects)
        setup_sects = 4;
    if (read(fd, real_addr + 512, setup_sects * 512) != 
        setup_sects * 512)
        goto fail;
    
    /* load 32 bit code */
    size = read(fd, addr, 16 * 1024 * 1024);
    if (size < 0)
        goto fail;
    close(fd);
    return size;
 fail:
    close(fd);
    return -1;
}

static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };

#define NE2000_NB_MAX 6

static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };

/* PC hardware initialisation */
void pc_init(int ram_size, int vga_ram_size, int boot_device,
             DisplayState *ds, const char **fd_filename, int snapshot,
             const char *kernel_filename, const char *kernel_cmdline,
             const char *initrd_filename)
{
    char buf[1024];
    int ret, linux_boot, initrd_size, i, nb_nics1, fd;

    linux_boot = (kernel_filename != NULL);

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, 0);

    /* BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000f0000);
    if (ret != 0x10000) {
        fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
        exit(1);
    }
    
    /* VGA BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000c0000);
    
    /* setup basic memory access */
    cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
    cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
    cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
    
    bochs_bios_init();

    if (linux_boot) {
        uint8_t bootsect[512];

        if (bs_table[0] == NULL) {
            fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
            exit(1);
        }
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
        ret = load_image(buf, bootsect);
        if (ret != sizeof(bootsect)) {
            fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
                    buf);
            exit(1);
        }

        bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));

        /* now we can load the kernel */
        ret = load_kernel(kernel_filename, 
                          phys_ram_base + KERNEL_LOAD_ADDR,
                          phys_ram_base + KERNEL_PARAMS_ADDR);
        if (ret < 0) {
            fprintf(stderr, "qemu: could not load kernel '%s'\n", 
                    kernel_filename);
            exit(1);
        }
        
        /* load initrd */
        initrd_size = 0;
        if (initrd_filename) {
            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
            if (initrd_size < 0) {
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 
                        initrd_filename);
                exit(1);
            }
        }
        if (initrd_size > 0) {
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
        }
        pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
                kernel_cmdline);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
                KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
        /* loader type */
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
    }

    /* init basic PC hardware */
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);

    vga_initialize(ds, phys_ram_base + ram_size, ram_size, 
                   vga_ram_size);

    rtc_state = rtc_init(0x70, 8);
    register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
    register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);

    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);

    pic_init();
    pit_init(0x40, 0);

    fd = serial_open_device();
    serial_init(0x3f8, 4, fd);

    nb_nics1 = nb_nics;
    if (nb_nics1 > NE2000_NB_MAX)
        nb_nics1 = NE2000_NB_MAX;
    for(i = 0; i < nb_nics1; i++) {
        ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
    }

    for(i = 0; i < 2; i++) {
        ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                 bs_table[2 * i], bs_table[2 * i + 1]);
    }
    kbd_init();
    DMA_init();

#ifndef _WIN32
    /* no audio supported yet for win32 */
    AUD_init();
    SB16_init();
#endif

    floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);

    cmos_init(ram_size, boot_device);
}
Commit	Line	Data
80cabfad FB	1	/*
	2	* QEMU PC System Emulator
	3	*
	4	* Copyright (c) 2003-2004 Fabrice Bellard
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
80cabfad FB	24	#include "vl.h"
80cabfad FB	25
b41a2cd1 FB	26	/* output Bochs bios info messages */
	27	//#define DEBUG_BIOS
	28
80cabfad FB	29	#define BIOS_FILENAME "bios.bin"
	30	#define VGABIOS_FILENAME "vgabios.bin"
	31	#define LINUX_BOOT_FILENAME "linux_boot.bin"
	32
	33	#define KERNEL_LOAD_ADDR 0x00100000
	34	#define INITRD_LOAD_ADDR 0x00400000
	35	#define KERNEL_PARAMS_ADDR 0x00090000
	36	#define KERNEL_CMDLINE_ADDR 0x00099000
	37
	38	int speaker_data_on;
	39	int dummy_refresh_clock;
baca51fa	40	static fdctrl_t *floppy_controller;
b0a21b53	41	static RTCState *rtc_state;
80cabfad	42
b41a2cd1	43	static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad FB	44	{
	45	}
	46
b0a21b53 FB	47	/* PC cmos mappings */
b0a21b53 FB	48
80cabfad	49	#define REG_EQUIPMENT_BYTE 0x14
b0a21b53 FB	50	#define REG_IBM_CENTURY_BYTE 0x32
	51	#define REG_IBM_PS2_CENTURY_BYTE 0x37
	52
	53
	54	static inline int to_bcd(RTCState *s, int a)
	55	{
	56	return ((a / 10) << 4) \| (a % 10);
	57	}
80cabfad FB	58
	59	static void cmos_init(int ram_size, int boot_device)
	60	{
b0a21b53	61	RTCState *s = rtc_state;
80cabfad	62	int val;
b41a2cd1	63	int fd0, fd1, nb;
b0a21b53 FB	64	time_t ti;
	65	struct tm *tm;
	66
	67	/* set the CMOS date */
	68	time(&ti);
	69	tm = gmtime(&ti);
	70	rtc_set_date(s, tm);
	71
	72	val = to_bcd(s, (tm->tm_year / 100) + 19);
	73	rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
	74	rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
80cabfad	75
b0a21b53	76	/* various important CMOS locations needed by PC/Bochs bios */
80cabfad FB	77
	78	/* memory size */
	79	val = (ram_size / 1024) - 1024;
	80	if (val > 65535)
	81	val = 65535;
b0a21b53 FB	82	rtc_set_memory(s, 0x17, val);
	83	rtc_set_memory(s, 0x18, val >> 8);
	84	rtc_set_memory(s, 0x30, val);
	85	rtc_set_memory(s, 0x31, val >> 8);
80cabfad FB	86
	87	val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
	88	if (val > 65535)
	89	val = 65535;
b0a21b53 FB	90	rtc_set_memory(s, 0x34, val);
b0a21b53 FB	91	rtc_set_memory(s, 0x35, val >> 8);
80cabfad FB	92
	93	switch(boot_device) {
	94	case 'a':
	95	case 'b':
b0a21b53	96	rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
80cabfad FB	97	break;
	98	default:
	99	case 'c':
b0a21b53	100	rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
80cabfad FB	101	break;
80cabfad FB	102	case 'd':
b0a21b53	103	rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
80cabfad FB	104	break;
80cabfad FB	105	}
80cabfad	106
b41a2cd1 FB	107	/* floppy type */
b41a2cd1 FB	108
baca51fa FB	109	fd0 = fdctrl_get_drive_type(floppy_controller, 0);
baca51fa FB	110	fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad	111
b0a21b53	112	val = 0;
80cabfad FB	113	switch (fd0) {
	114	case 0:
	115	/* 1.44 Mb 3"5 drive */
b0a21b53	116	val \|= 0x40;
80cabfad FB	117	break;
	118	case 1:
	119	/* 2.88 Mb 3"5 drive */
b0a21b53	120	val \|= 0x60;
80cabfad FB	121	break;
	122	case 2:
	123	/* 1.2 Mb 5"5 drive */
b0a21b53	124	val \|= 0x20;
80cabfad FB	125	break;
	126	}
	127	switch (fd1) {
	128	case 0:
	129	/* 1.44 Mb 3"5 drive */
b0a21b53	130	val \|= 0x04;
80cabfad FB	131	break;
	132	case 1:
	133	/* 2.88 Mb 3"5 drive */
b0a21b53	134	val \|= 0x06;
80cabfad FB	135	break;
	136	case 2:
	137	/* 1.2 Mb 5"5 drive */
b0a21b53	138	val \|= 0x02;
80cabfad FB	139	break;
80cabfad FB	140	}
b0a21b53 FB	141	rtc_set_memory(s, 0x10, val);
	142
	143	val = 0;
b41a2cd1	144	nb = 0;
80cabfad FB	145	if (fd0 < 3)
	146	nb++;
	147	if (fd1 < 3)
	148	nb++;
	149	switch (nb) {
	150	case 0:
	151	break;
	152	case 1:
b0a21b53	153	val \|= 0x01; /* 1 drive, ready for boot */
80cabfad FB	154	break;
80cabfad FB	155	case 2:
b0a21b53	156	val \|= 0x41; /* 2 drives, ready for boot */
80cabfad FB	157	break;
80cabfad FB	158	}
b0a21b53 FB	159	val \|= 0x02; /* FPU is there */
	160	val \|= 0x04; /* PS/2 mouse installed */
	161	rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
	162
80cabfad FB	163	}
80cabfad FB	164
b41a2cd1	165	static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	166	{
	167	speaker_data_on = (val >> 1) & 1;
	168	pit_set_gate(&pit_channels[2], val & 1);
	169	}
	170
b41a2cd1	171	static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
80cabfad FB	172	{
80cabfad FB	173	int out;
b0a21b53	174	out = pit_get_out(&pit_channels[2], qemu_get_clock(vm_clock));
80cabfad FB	175	dummy_refresh_clock ^= 1;
	176	return (speaker_data_on << 1) \| pit_channels[2].gate \| (out << 5) \|
	177	(dummy_refresh_clock << 4);
	178	}
	179
e1a23744 FB	180	static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
	181	{
	182	cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
	183	/* XXX: bit 0 is fast reset */
	184	}
	185
	186	static uint32_t ioport92_read(void *opaque, uint32_t addr)
	187	{
	188	return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
	189	}
	190
80cabfad FB	191	/***********************************************************/
	192	/* Bochs BIOS debug ports */
	193
b41a2cd1	194	void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	195	{
	196	switch(addr) {
	197	/* Bochs BIOS messages */
	198	case 0x400:
	199	case 0x401:
	200	fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
	201	exit(1);
	202	case 0x402:
	203	case 0x403:
	204	#ifdef DEBUG_BIOS
	205	fprintf(stderr, "%c", val);
	206	#endif
	207	break;
	208
	209	/* LGPL'ed VGA BIOS messages */
	210	case 0x501:
	211	case 0x502:
	212	fprintf(stderr, "VGA BIOS panic, line %d\n", val);
	213	exit(1);
	214	case 0x500:
	215	case 0x503:
	216	#ifdef DEBUG_BIOS
	217	fprintf(stderr, "%c", val);
	218	#endif
	219	break;
	220	}
	221	}
	222
	223	void bochs_bios_init(void)
	224	{
b41a2cd1 FB	225	register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
	226	register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
	227	register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
	228	register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
	229
	230	register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
	231	register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
	232	register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
	233	register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad FB	234	}
	235
	236
	237	int load_kernel(const char filename, uint8_t addr,
	238	uint8_t *real_addr)
	239	{
	240	int fd, size;
	241	int setup_sects;
	242
	243	fd = open(filename, O_RDONLY);
	244	if (fd < 0)
	245	return -1;
	246
	247	/* load 16 bit code */
	248	if (read(fd, real_addr, 512) != 512)
	249	goto fail;
	250	setup_sects = real_addr[0x1F1];
	251	if (!setup_sects)
	252	setup_sects = 4;
	253	if (read(fd, real_addr + 512, setup_sects * 512) !=
	254	setup_sects * 512)
	255	goto fail;
	256
	257	/* load 32 bit code */
	258	size = read(fd, addr, 16 * 1024 * 1024);
	259	if (size < 0)
	260	goto fail;
	261	close(fd);
	262	return size;
	263	fail:
	264	close(fd);
	265	return -1;
	266	}
	267
b41a2cd1 FB	268	static const int ide_iobase[2] = { 0x1f0, 0x170 };
	269	static const int ide_iobase2[2] = { 0x3f6, 0x376 };
	270	static const int ide_irq[2] = { 14, 15 };
	271
	272	#define NE2000_NB_MAX 6
	273
	274	static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
	275	static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
	276
80cabfad FB	277	/* PC hardware initialisation */
	278	void pc_init(int ram_size, int vga_ram_size, int boot_device,
	279	DisplayState ds, const char *fd_filename, int snapshot,
	280	const char kernel_filename, const char kernel_cmdline,
	281	const char *initrd_filename)
	282	{
	283	char buf[1024];
b41a2cd1	284	int ret, linux_boot, initrd_size, i, nb_nics1, fd;
80cabfad FB	285
	286	linux_boot = (kernel_filename != NULL);
	287
	288	/* allocate RAM */
	289	cpu_register_physical_memory(0, ram_size, 0);
	290
	291	/* BIOS load */
	292	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
	293	ret = load_image(buf, phys_ram_base + 0x000f0000);
	294	if (ret != 0x10000) {
	295	fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
	296	exit(1);
	297	}
	298
	299	/* VGA BIOS load */
	300	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	301	ret = load_image(buf, phys_ram_base + 0x000c0000);
	302
	303	/* setup basic memory access */
	304	cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 \| IO_MEM_ROM);
bb058620	305	cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
80cabfad FB	306	cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 \| IO_MEM_ROM);
	307
	308	bochs_bios_init();
	309
	310	if (linux_boot) {
	311	uint8_t bootsect[512];
	312
	313	if (bs_table[0] == NULL) {
	314	fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
	315	exit(1);
	316	}
	317	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
	318	ret = load_image(buf, bootsect);
	319	if (ret != sizeof(bootsect)) {
	320	fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
	321	buf);
	322	exit(1);
	323	}
	324
	325	bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
	326
	327	/* now we can load the kernel */
	328	ret = load_kernel(kernel_filename,
	329	phys_ram_base + KERNEL_LOAD_ADDR,
	330	phys_ram_base + KERNEL_PARAMS_ADDR);
	331	if (ret < 0) {
	332	fprintf(stderr, "qemu: could not load kernel '%s'\n",
	333	kernel_filename);
	334	exit(1);
	335	}
	336
	337	/* load initrd */
	338	initrd_size = 0;
	339	if (initrd_filename) {
	340	initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
	341	if (initrd_size < 0) {
	342	fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
	343	initrd_filename);
	344	exit(1);
	345	}
	346	}
	347	if (initrd_size > 0) {
	348	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
	349	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
	350	}
	351	pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
	352	kernel_cmdline);
	353	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
	354	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
	355	KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
	356	/* loader type */
	357	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
	358	}
	359
	360	/* init basic PC hardware */
b41a2cd1	361	register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad FB	362
	363	vga_initialize(ds, phys_ram_base + ram_size, ram_size,
	364	vga_ram_size);
	365
b0a21b53	366	rtc_state = rtc_init(0x70, 8);
b41a2cd1 FB	367	register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
b41a2cd1 FB	368	register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
80cabfad	369
e1a23744 FB	370	register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
	371	register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
	372
80cabfad	373	pic_init();
b0a21b53	374	pit_init(0x40, 0);
b41a2cd1 FB	375
	376	fd = serial_open_device();
	377	serial_init(0x3f8, 4, fd);
	378
	379	nb_nics1 = nb_nics;
	380	if (nb_nics1 > NE2000_NB_MAX)
	381	nb_nics1 = NE2000_NB_MAX;
	382	for(i = 0; i < nb_nics1; i++) {
	383	ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
	384	}
	385
	386	for(i = 0; i < 2; i++) {
	387	ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
	388	bs_table[2 * i], bs_table[2 * i + 1]);
	389	}
80cabfad	390	kbd_init();
80cabfad	391	DMA_init();
67b915a5 FB	392
	393	#ifndef _WIN32
	394	/* no audio supported yet for win32 */
	395	AUD_init();
80cabfad	396	SB16_init();
67b915a5	397	#endif
80cabfad	398
baca51fa	399	floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1 FB	400
b41a2cd1 FB	401	cmos_init(ram_size, boot_device);
80cabfad	402	}