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3285cf4f AP |
1 | /* |
2 | * Copyright (C) 2010 Citrix Ltd. | |
3 | * | |
4 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
5 | * the COPYING file in the top-level directory. | |
6 | * | |
6b620ca3 PB |
7 | * Contributions after 2012-01-13 are licensed under the terms of the |
8 | * GNU GPL, version 2 or (at your option) any later version. | |
3285cf4f AP |
9 | */ |
10 | ||
9ce94e7c AS |
11 | #include <sys/mman.h> |
12 | ||
a2cb15b0 | 13 | #include "hw/pci/pci.h" |
0d09e41a PB |
14 | #include "hw/i386/pc.h" |
15 | #include "hw/xen/xen_common.h" | |
16 | #include "hw/xen/xen_backend.h" | |
39f42439 | 17 | #include "qmp-commands.h" |
3285cf4f | 18 | |
dccfcd0e | 19 | #include "sysemu/char.h" |
dced4d2f | 20 | #include "qemu/error-report.h" |
1de7afc9 | 21 | #include "qemu/range.h" |
9c17d615 | 22 | #include "sysemu/xen-mapcache.h" |
432d268c | 23 | #include "trace.h" |
022c62cb | 24 | #include "exec/address-spaces.h" |
432d268c | 25 | |
9ce94e7c AS |
26 | #include <xen/hvm/ioreq.h> |
27 | #include <xen/hvm/params.h> | |
8a369e20 | 28 | #include <xen/hvm/e820.h> |
9ce94e7c | 29 | |
04b0de0e | 30 | //#define DEBUG_XEN_HVM |
9ce94e7c | 31 | |
04b0de0e | 32 | #ifdef DEBUG_XEN_HVM |
9ce94e7c AS |
33 | #define DPRINTF(fmt, ...) \ |
34 | do { fprintf(stderr, "xen: " fmt, ## __VA_ARGS__); } while (0) | |
35 | #else | |
36 | #define DPRINTF(fmt, ...) \ | |
37 | do { } while (0) | |
38 | #endif | |
39 | ||
ce76b8a8 | 40 | static MemoryRegion ram_memory, ram_640k, ram_lo, ram_hi; |
c65adf9b | 41 | static MemoryRegion *framebuffer; |
39f42439 | 42 | static bool xen_in_migration; |
ce76b8a8 | 43 | |
9ce94e7c | 44 | /* Compatibility with older version */ |
37f9e258 DS |
45 | |
46 | /* This allows QEMU to build on a system that has Xen 4.5 or earlier | |
47 | * installed. This here (not in hw/xen/xen_common.h) because xen/hvm/ioreq.h | |
48 | * needs to be included before this block and hw/xen/xen_common.h needs to | |
49 | * be included before xen/hvm/ioreq.h | |
50 | */ | |
51 | #ifndef IOREQ_TYPE_VMWARE_PORT | |
52 | #define IOREQ_TYPE_VMWARE_PORT 3 | |
53 | struct vmware_regs { | |
54 | uint32_t esi; | |
55 | uint32_t edi; | |
56 | uint32_t ebx; | |
57 | uint32_t ecx; | |
58 | uint32_t edx; | |
59 | }; | |
60 | typedef struct vmware_regs vmware_regs_t; | |
61 | ||
62 | struct shared_vmport_iopage { | |
63 | struct vmware_regs vcpu_vmport_regs[1]; | |
64 | }; | |
65 | typedef struct shared_vmport_iopage shared_vmport_iopage_t; | |
66 | #endif | |
67 | ||
9ce94e7c AS |
68 | #if __XEN_LATEST_INTERFACE_VERSION__ < 0x0003020a |
69 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
70 | { | |
71 | return shared_page->vcpu_iodata[i].vp_eport; | |
72 | } | |
73 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
74 | { | |
75 | return &shared_page->vcpu_iodata[vcpu].vp_ioreq; | |
76 | } | |
77 | # define FMT_ioreq_size PRIx64 | |
78 | #else | |
79 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
80 | { | |
81 | return shared_page->vcpu_ioreq[i].vp_eport; | |
82 | } | |
83 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
84 | { | |
85 | return &shared_page->vcpu_ioreq[vcpu]; | |
86 | } | |
87 | # define FMT_ioreq_size "u" | |
88 | #endif | |
89 | ||
90 | #define BUFFER_IO_MAX_DELAY 100 | |
91 | ||
b4dd7802 | 92 | typedef struct XenPhysmap { |
a8170e5e | 93 | hwaddr start_addr; |
b4dd7802 | 94 | ram_addr_t size; |
dc6c4fe8 | 95 | const char *name; |
a8170e5e | 96 | hwaddr phys_offset; |
b4dd7802 AP |
97 | |
98 | QLIST_ENTRY(XenPhysmap) list; | |
99 | } XenPhysmap; | |
100 | ||
9ce94e7c | 101 | typedef struct XenIOState { |
3996e85c | 102 | ioservid_t ioservid; |
9ce94e7c | 103 | shared_iopage_t *shared_page; |
37f9e258 | 104 | shared_vmport_iopage_t *shared_vmport_page; |
9ce94e7c AS |
105 | buffered_iopage_t *buffered_io_page; |
106 | QEMUTimer *buffered_io_timer; | |
37f9e258 | 107 | CPUState **cpu_by_vcpu_id; |
9ce94e7c AS |
108 | /* the evtchn port for polling the notification, */ |
109 | evtchn_port_t *ioreq_local_port; | |
fda1f768 SS |
110 | /* evtchn local port for buffered io */ |
111 | evtchn_port_t bufioreq_local_port; | |
9ce94e7c | 112 | /* the evtchn fd for polling */ |
a2db2a1e | 113 | xenevtchn_handle *xce_handle; |
9ce94e7c AS |
114 | /* which vcpu we are serving */ |
115 | int send_vcpu; | |
116 | ||
29321335 | 117 | struct xs_handle *xenstore; |
20581d20 | 118 | MemoryListener memory_listener; |
3996e85c PD |
119 | MemoryListener io_listener; |
120 | DeviceListener device_listener; | |
b4dd7802 | 121 | QLIST_HEAD(, XenPhysmap) physmap; |
a8170e5e | 122 | hwaddr free_phys_offset; |
b4dd7802 | 123 | const XenPhysmap *log_for_dirtybit; |
29321335 | 124 | |
9ce94e7c | 125 | Notifier exit; |
da98c8eb | 126 | Notifier suspend; |
11addd0a | 127 | Notifier wakeup; |
9ce94e7c AS |
128 | } XenIOState; |
129 | ||
41445300 AP |
130 | /* Xen specific function for piix pci */ |
131 | ||
132 | int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) | |
133 | { | |
134 | return irq_num + ((pci_dev->devfn >> 3) << 2); | |
135 | } | |
136 | ||
137 | void xen_piix3_set_irq(void *opaque, int irq_num, int level) | |
138 | { | |
139 | xc_hvm_set_pci_intx_level(xen_xc, xen_domid, 0, 0, irq_num >> 2, | |
140 | irq_num & 3, level); | |
141 | } | |
142 | ||
143 | void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len) | |
144 | { | |
145 | int i; | |
146 | ||
147 | /* Scan for updates to PCI link routes (0x60-0x63). */ | |
148 | for (i = 0; i < len; i++) { | |
149 | uint8_t v = (val >> (8 * i)) & 0xff; | |
150 | if (v & 0x80) { | |
151 | v = 0; | |
152 | } | |
153 | v &= 0xf; | |
154 | if (((address + i) >= 0x60) && ((address + i) <= 0x63)) { | |
155 | xc_hvm_set_pci_link_route(xen_xc, xen_domid, address + i - 0x60, v); | |
156 | } | |
157 | } | |
158 | } | |
159 | ||
f1dbf015 WL |
160 | void xen_hvm_inject_msi(uint64_t addr, uint32_t data) |
161 | { | |
4c9f8d1b | 162 | xen_xc_hvm_inject_msi(xen_xc, xen_domid, addr, data); |
f1dbf015 WL |
163 | } |
164 | ||
da98c8eb | 165 | static void xen_suspend_notifier(Notifier *notifier, void *data) |
c9622478 | 166 | { |
da98c8eb | 167 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 3); |
c9622478 AP |
168 | } |
169 | ||
9c11a8ac AP |
170 | /* Xen Interrupt Controller */ |
171 | ||
172 | static void xen_set_irq(void *opaque, int irq, int level) | |
173 | { | |
174 | xc_hvm_set_isa_irq_level(xen_xc, xen_domid, irq, level); | |
175 | } | |
176 | ||
177 | qemu_irq *xen_interrupt_controller_init(void) | |
178 | { | |
179 | return qemu_allocate_irqs(xen_set_irq, NULL, 16); | |
180 | } | |
181 | ||
432d268c JN |
182 | /* Memory Ops */ |
183 | ||
91176e31 | 184 | static void xen_ram_init(PCMachineState *pcms, |
3c2a9669 | 185 | ram_addr_t ram_size, MemoryRegion **ram_memory_p) |
432d268c | 186 | { |
ce76b8a8 | 187 | MemoryRegion *sysmem = get_system_memory(); |
ce76b8a8 | 188 | ram_addr_t block_len; |
c4f5cdc5 DS |
189 | uint64_t user_lowmem = object_property_get_int(qdev_get_machine(), |
190 | PC_MACHINE_MAX_RAM_BELOW_4G, | |
191 | &error_abort); | |
432d268c | 192 | |
a9dd38db | 193 | /* Handle the machine opt max-ram-below-4g. It is basically doing |
c4f5cdc5 DS |
194 | * min(xen limit, user limit). |
195 | */ | |
196 | if (HVM_BELOW_4G_RAM_END <= user_lowmem) { | |
197 | user_lowmem = HVM_BELOW_4G_RAM_END; | |
8a369e20 | 198 | } |
432d268c | 199 | |
c4f5cdc5 | 200 | if (ram_size >= user_lowmem) { |
91176e31 EH |
201 | pcms->above_4g_mem_size = ram_size - user_lowmem; |
202 | pcms->below_4g_mem_size = user_lowmem; | |
432d268c | 203 | } else { |
91176e31 EH |
204 | pcms->above_4g_mem_size = 0; |
205 | pcms->below_4g_mem_size = ram_size; | |
432d268c | 206 | } |
91176e31 | 207 | if (!pcms->above_4g_mem_size) { |
c4f5cdc5 DS |
208 | block_len = ram_size; |
209 | } else { | |
210 | /* | |
211 | * Xen does not allocate the memory continuously, it keeps a | |
212 | * hole of the size computed above or passed in. | |
213 | */ | |
91176e31 | 214 | block_len = (1ULL << 32) + pcms->above_4g_mem_size; |
c4f5cdc5 | 215 | } |
49946538 | 216 | memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len, |
f8ed85ac | 217 | &error_fatal); |
c4f5cdc5 DS |
218 | *ram_memory_p = &ram_memory; |
219 | vmstate_register_ram_global(&ram_memory); | |
432d268c | 220 | |
2c9b15ca | 221 | memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k", |
ce76b8a8 AK |
222 | &ram_memory, 0, 0xa0000); |
223 | memory_region_add_subregion(sysmem, 0, &ram_640k); | |
8a369e20 AP |
224 | /* Skip of the VGA IO memory space, it will be registered later by the VGA |
225 | * emulated device. | |
226 | * | |
227 | * The area between 0xc0000 and 0x100000 will be used by SeaBIOS to load | |
228 | * the Options ROM, so it is registered here as RAM. | |
229 | */ | |
2c9b15ca | 230 | memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo", |
3c2a9669 | 231 | &ram_memory, 0xc0000, |
91176e31 | 232 | pcms->below_4g_mem_size - 0xc0000); |
ce76b8a8 | 233 | memory_region_add_subregion(sysmem, 0xc0000, &ram_lo); |
91176e31 | 234 | if (pcms->above_4g_mem_size > 0) { |
2c9b15ca | 235 | memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi", |
ce76b8a8 | 236 | &ram_memory, 0x100000000ULL, |
91176e31 | 237 | pcms->above_4g_mem_size); |
ce76b8a8 | 238 | memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi); |
432d268c | 239 | } |
432d268c JN |
240 | } |
241 | ||
37aa7a0e MA |
242 | void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, MemoryRegion *mr, |
243 | Error **errp) | |
432d268c JN |
244 | { |
245 | unsigned long nr_pfn; | |
246 | xen_pfn_t *pfn_list; | |
247 | int i; | |
248 | ||
c234572d AP |
249 | if (runstate_check(RUN_STATE_INMIGRATE)) { |
250 | /* RAM already populated in Xen */ | |
251 | fprintf(stderr, "%s: do not alloc "RAM_ADDR_FMT | |
252 | " bytes of ram at "RAM_ADDR_FMT" when runstate is INMIGRATE\n", | |
253 | __func__, size, ram_addr); | |
254 | return; | |
255 | } | |
256 | ||
ce76b8a8 AK |
257 | if (mr == &ram_memory) { |
258 | return; | |
259 | } | |
260 | ||
432d268c JN |
261 | trace_xen_ram_alloc(ram_addr, size); |
262 | ||
263 | nr_pfn = size >> TARGET_PAGE_BITS; | |
7267c094 | 264 | pfn_list = g_malloc(sizeof (*pfn_list) * nr_pfn); |
432d268c JN |
265 | |
266 | for (i = 0; i < nr_pfn; i++) { | |
267 | pfn_list[i] = (ram_addr >> TARGET_PAGE_BITS) + i; | |
268 | } | |
269 | ||
270 | if (xc_domain_populate_physmap_exact(xen_xc, xen_domid, nr_pfn, 0, 0, pfn_list)) { | |
37aa7a0e MA |
271 | error_setg(errp, "xen: failed to populate ram at " RAM_ADDR_FMT, |
272 | ram_addr); | |
432d268c JN |
273 | } |
274 | ||
7267c094 | 275 | g_free(pfn_list); |
432d268c JN |
276 | } |
277 | ||
b4dd7802 | 278 | static XenPhysmap *get_physmapping(XenIOState *state, |
a8170e5e | 279 | hwaddr start_addr, ram_addr_t size) |
b4dd7802 AP |
280 | { |
281 | XenPhysmap *physmap = NULL; | |
282 | ||
283 | start_addr &= TARGET_PAGE_MASK; | |
284 | ||
285 | QLIST_FOREACH(physmap, &state->physmap, list) { | |
286 | if (range_covers_byte(physmap->start_addr, physmap->size, start_addr)) { | |
287 | return physmap; | |
288 | } | |
289 | } | |
290 | return NULL; | |
291 | } | |
292 | ||
a8170e5e | 293 | static hwaddr xen_phys_offset_to_gaddr(hwaddr start_addr, |
cd1ba7de AP |
294 | ram_addr_t size, void *opaque) |
295 | { | |
a8170e5e | 296 | hwaddr addr = start_addr & TARGET_PAGE_MASK; |
cd1ba7de AP |
297 | XenIOState *xen_io_state = opaque; |
298 | XenPhysmap *physmap = NULL; | |
299 | ||
300 | QLIST_FOREACH(physmap, &xen_io_state->physmap, list) { | |
301 | if (range_covers_byte(physmap->phys_offset, physmap->size, addr)) { | |
302 | return physmap->start_addr; | |
303 | } | |
304 | } | |
305 | ||
306 | return start_addr; | |
307 | } | |
308 | ||
b4dd7802 AP |
309 | #if CONFIG_XEN_CTRL_INTERFACE_VERSION >= 340 |
310 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 311 | hwaddr start_addr, |
b4dd7802 | 312 | ram_addr_t size, |
20581d20 | 313 | MemoryRegion *mr, |
a8170e5e | 314 | hwaddr offset_within_region) |
b4dd7802 AP |
315 | { |
316 | unsigned long i = 0; | |
317 | int rc = 0; | |
318 | XenPhysmap *physmap = NULL; | |
a8170e5e AK |
319 | hwaddr pfn, start_gpfn; |
320 | hwaddr phys_offset = memory_region_get_ram_addr(mr); | |
d1814e08 | 321 | char path[80], value[17]; |
3e1f5086 | 322 | const char *mr_name; |
b4dd7802 AP |
323 | |
324 | if (get_physmapping(state, start_addr, size)) { | |
325 | return 0; | |
326 | } | |
327 | if (size <= 0) { | |
328 | return -1; | |
329 | } | |
330 | ||
ebed8505 SS |
331 | /* Xen can only handle a single dirty log region for now and we want |
332 | * the linear framebuffer to be that region. | |
333 | * Avoid tracking any regions that is not videoram and avoid tracking | |
334 | * the legacy vga region. */ | |
20581d20 AK |
335 | if (mr == framebuffer && start_addr > 0xbffff) { |
336 | goto go_physmap; | |
ebed8505 SS |
337 | } |
338 | return -1; | |
339 | ||
340 | go_physmap: | |
f1b8caf1 SE |
341 | DPRINTF("mapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx"\n", |
342 | start_addr, start_addr + size); | |
b4dd7802 AP |
343 | |
344 | pfn = phys_offset >> TARGET_PAGE_BITS; | |
345 | start_gpfn = start_addr >> TARGET_PAGE_BITS; | |
346 | for (i = 0; i < size >> TARGET_PAGE_BITS; i++) { | |
347 | unsigned long idx = pfn + i; | |
348 | xen_pfn_t gpfn = start_gpfn + i; | |
349 | ||
20a544c7 | 350 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
351 | if (rc) { |
352 | DPRINTF("add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 353 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
354 | return -rc; |
355 | } | |
356 | } | |
357 | ||
3e1f5086 PC |
358 | mr_name = memory_region_name(mr); |
359 | ||
7267c094 | 360 | physmap = g_malloc(sizeof (XenPhysmap)); |
b4dd7802 AP |
361 | |
362 | physmap->start_addr = start_addr; | |
363 | physmap->size = size; | |
3e1f5086 | 364 | physmap->name = mr_name; |
b4dd7802 AP |
365 | physmap->phys_offset = phys_offset; |
366 | ||
367 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
368 | ||
369 | xc_domain_pin_memory_cacheattr(xen_xc, xen_domid, | |
370 | start_addr >> TARGET_PAGE_BITS, | |
8b6bb0ad | 371 | (start_addr + size - 1) >> TARGET_PAGE_BITS, |
b4dd7802 | 372 | XEN_DOMCTL_MEM_CACHEATTR_WB); |
d1814e08 SS |
373 | |
374 | snprintf(path, sizeof(path), | |
375 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/start_addr", | |
376 | xen_domid, (uint64_t)phys_offset); | |
377 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)start_addr); | |
378 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
379 | return -1; | |
380 | } | |
381 | snprintf(path, sizeof(path), | |
382 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/size", | |
383 | xen_domid, (uint64_t)phys_offset); | |
384 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)size); | |
385 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
386 | return -1; | |
387 | } | |
3e1f5086 | 388 | if (mr_name) { |
d1814e08 SS |
389 | snprintf(path, sizeof(path), |
390 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/name", | |
391 | xen_domid, (uint64_t)phys_offset); | |
3e1f5086 | 392 | if (!xs_write(state->xenstore, 0, path, mr_name, strlen(mr_name))) { |
d1814e08 SS |
393 | return -1; |
394 | } | |
395 | } | |
396 | ||
b4dd7802 AP |
397 | return 0; |
398 | } | |
399 | ||
400 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 401 | hwaddr start_addr, |
b4dd7802 AP |
402 | ram_addr_t size) |
403 | { | |
404 | unsigned long i = 0; | |
405 | int rc = 0; | |
406 | XenPhysmap *physmap = NULL; | |
a8170e5e | 407 | hwaddr phys_offset = 0; |
b4dd7802 AP |
408 | |
409 | physmap = get_physmapping(state, start_addr, size); | |
410 | if (physmap == NULL) { | |
411 | return -1; | |
412 | } | |
413 | ||
414 | phys_offset = physmap->phys_offset; | |
415 | size = physmap->size; | |
416 | ||
d18e173a WL |
417 | DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at " |
418 | "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset); | |
b4dd7802 AP |
419 | |
420 | size >>= TARGET_PAGE_BITS; | |
421 | start_addr >>= TARGET_PAGE_BITS; | |
422 | phys_offset >>= TARGET_PAGE_BITS; | |
423 | for (i = 0; i < size; i++) { | |
643f5932 | 424 | xen_pfn_t idx = start_addr + i; |
b4dd7802 AP |
425 | xen_pfn_t gpfn = phys_offset + i; |
426 | ||
20a544c7 | 427 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
428 | if (rc) { |
429 | fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 430 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
431 | return -rc; |
432 | } | |
433 | } | |
434 | ||
435 | QLIST_REMOVE(physmap, list); | |
436 | if (state->log_for_dirtybit == physmap) { | |
437 | state->log_for_dirtybit = NULL; | |
438 | } | |
c5633d99 | 439 | g_free(physmap); |
b4dd7802 AP |
440 | |
441 | return 0; | |
442 | } | |
443 | ||
444 | #else | |
445 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 446 | hwaddr start_addr, |
b4dd7802 | 447 | ram_addr_t size, |
20581d20 | 448 | MemoryRegion *mr, |
a8170e5e | 449 | hwaddr offset_within_region) |
b4dd7802 AP |
450 | { |
451 | return -ENOSYS; | |
452 | } | |
453 | ||
454 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 455 | hwaddr start_addr, |
b4dd7802 AP |
456 | ram_addr_t size) |
457 | { | |
458 | return -ENOSYS; | |
459 | } | |
460 | #endif | |
461 | ||
20581d20 AK |
462 | static void xen_set_memory(struct MemoryListener *listener, |
463 | MemoryRegionSection *section, | |
464 | bool add) | |
b4dd7802 | 465 | { |
20581d20 | 466 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
a8170e5e | 467 | hwaddr start_addr = section->offset_within_address_space; |
052e87b0 | 468 | ram_addr_t size = int128_get64(section->size); |
2d1a35be | 469 | bool log_dirty = memory_region_is_logging(section->mr, DIRTY_MEMORY_VGA); |
b4dd7802 AP |
470 | hvmmem_type_t mem_type; |
471 | ||
3996e85c PD |
472 | if (section->mr == &ram_memory) { |
473 | return; | |
474 | } else { | |
475 | if (add) { | |
476 | xen_map_memory_section(xen_xc, xen_domid, state->ioservid, | |
477 | section); | |
478 | } else { | |
479 | xen_unmap_memory_section(xen_xc, xen_domid, state->ioservid, | |
480 | section); | |
481 | } | |
482 | } | |
483 | ||
20581d20 | 484 | if (!memory_region_is_ram(section->mr)) { |
b4dd7802 AP |
485 | return; |
486 | } | |
487 | ||
3996e85c | 488 | if (log_dirty != add) { |
20581d20 AK |
489 | return; |
490 | } | |
491 | ||
492 | trace_xen_client_set_memory(start_addr, size, log_dirty); | |
b4dd7802 AP |
493 | |
494 | start_addr &= TARGET_PAGE_MASK; | |
495 | size = TARGET_PAGE_ALIGN(size); | |
20581d20 AK |
496 | |
497 | if (add) { | |
498 | if (!memory_region_is_rom(section->mr)) { | |
499 | xen_add_to_physmap(state, start_addr, size, | |
500 | section->mr, section->offset_within_region); | |
501 | } else { | |
502 | mem_type = HVMMEM_ram_ro; | |
503 | if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, | |
504 | start_addr >> TARGET_PAGE_BITS, | |
505 | size >> TARGET_PAGE_BITS)) { | |
506 | DPRINTF("xc_hvm_set_mem_type error, addr: "TARGET_FMT_plx"\n", | |
507 | start_addr); | |
508 | } | |
b4dd7802 | 509 | } |
20581d20 | 510 | } else { |
b4dd7802 AP |
511 | if (xen_remove_from_physmap(state, start_addr, size) < 0) { |
512 | DPRINTF("physmapping does not exist at "TARGET_FMT_plx"\n", start_addr); | |
513 | } | |
b4dd7802 AP |
514 | } |
515 | } | |
516 | ||
20581d20 AK |
517 | static void xen_region_add(MemoryListener *listener, |
518 | MemoryRegionSection *section) | |
519 | { | |
dfde4e6e | 520 | memory_region_ref(section->mr); |
20581d20 AK |
521 | xen_set_memory(listener, section, true); |
522 | } | |
523 | ||
524 | static void xen_region_del(MemoryListener *listener, | |
525 | MemoryRegionSection *section) | |
526 | { | |
527 | xen_set_memory(listener, section, false); | |
dfde4e6e | 528 | memory_region_unref(section->mr); |
20581d20 AK |
529 | } |
530 | ||
3996e85c PD |
531 | static void xen_io_add(MemoryListener *listener, |
532 | MemoryRegionSection *section) | |
533 | { | |
534 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
535 | ||
536 | memory_region_ref(section->mr); | |
537 | ||
538 | xen_map_io_section(xen_xc, xen_domid, state->ioservid, section); | |
539 | } | |
540 | ||
541 | static void xen_io_del(MemoryListener *listener, | |
542 | MemoryRegionSection *section) | |
543 | { | |
544 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
545 | ||
546 | xen_unmap_io_section(xen_xc, xen_domid, state->ioservid, section); | |
547 | ||
548 | memory_region_unref(section->mr); | |
549 | } | |
550 | ||
551 | static void xen_device_realize(DeviceListener *listener, | |
552 | DeviceState *dev) | |
553 | { | |
554 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
555 | ||
556 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
557 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
558 | ||
559 | xen_map_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
560 | } | |
561 | } | |
562 | ||
563 | static void xen_device_unrealize(DeviceListener *listener, | |
564 | DeviceState *dev) | |
565 | { | |
566 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
567 | ||
568 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
569 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
570 | ||
571 | xen_unmap_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
572 | } | |
573 | } | |
574 | ||
b18620cf | 575 | static void xen_sync_dirty_bitmap(XenIOState *state, |
a8170e5e | 576 | hwaddr start_addr, |
b18620cf | 577 | ram_addr_t size) |
b4dd7802 | 578 | { |
a8170e5e | 579 | hwaddr npages = size >> TARGET_PAGE_BITS; |
b4dd7802 AP |
580 | const int width = sizeof(unsigned long) * 8; |
581 | unsigned long bitmap[(npages + width - 1) / width]; | |
582 | int rc, i, j; | |
583 | const XenPhysmap *physmap = NULL; | |
584 | ||
585 | physmap = get_physmapping(state, start_addr, size); | |
586 | if (physmap == NULL) { | |
587 | /* not handled */ | |
b18620cf | 588 | return; |
b4dd7802 AP |
589 | } |
590 | ||
591 | if (state->log_for_dirtybit == NULL) { | |
592 | state->log_for_dirtybit = physmap; | |
593 | } else if (state->log_for_dirtybit != physmap) { | |
b18620cf AP |
594 | /* Only one range for dirty bitmap can be tracked. */ |
595 | return; | |
b4dd7802 | 596 | } |
b4dd7802 AP |
597 | |
598 | rc = xc_hvm_track_dirty_vram(xen_xc, xen_domid, | |
599 | start_addr >> TARGET_PAGE_BITS, npages, | |
600 | bitmap); | |
b18620cf | 601 | if (rc < 0) { |
74bc4151 RPM |
602 | #ifndef ENODATA |
603 | #define ENODATA ENOENT | |
604 | #endif | |
605 | if (errno == ENODATA) { | |
8aba7dc0 AP |
606 | memory_region_set_dirty(framebuffer, 0, size); |
607 | DPRINTF("xen: track_dirty_vram failed (0x" TARGET_FMT_plx | |
b18620cf | 608 | ", 0x" TARGET_FMT_plx "): %s\n", |
74bc4151 | 609 | start_addr, start_addr + size, strerror(errno)); |
b18620cf AP |
610 | } |
611 | return; | |
b4dd7802 AP |
612 | } |
613 | ||
614 | for (i = 0; i < ARRAY_SIZE(bitmap); i++) { | |
615 | unsigned long map = bitmap[i]; | |
616 | while (map != 0) { | |
adf9d70b | 617 | j = ctzl(map); |
b4dd7802 | 618 | map &= ~(1ul << j); |
5a97065b | 619 | memory_region_set_dirty(framebuffer, |
fd4aa979 BS |
620 | (i * width + j) * TARGET_PAGE_SIZE, |
621 | TARGET_PAGE_SIZE); | |
b4dd7802 AP |
622 | }; |
623 | } | |
b4dd7802 AP |
624 | } |
625 | ||
20581d20 | 626 | static void xen_log_start(MemoryListener *listener, |
b2dfd71c PB |
627 | MemoryRegionSection *section, |
628 | int old, int new) | |
b4dd7802 | 629 | { |
20581d20 | 630 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 631 | |
b2dfd71c PB |
632 | if (new & ~old & (1 << DIRTY_MEMORY_VGA)) { |
633 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, | |
634 | int128_get64(section->size)); | |
635 | } | |
b4dd7802 AP |
636 | } |
637 | ||
b2dfd71c PB |
638 | static void xen_log_stop(MemoryListener *listener, MemoryRegionSection *section, |
639 | int old, int new) | |
b4dd7802 | 640 | { |
20581d20 | 641 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 642 | |
b2dfd71c PB |
643 | if (old & ~new & (1 << DIRTY_MEMORY_VGA)) { |
644 | state->log_for_dirtybit = NULL; | |
645 | /* Disable dirty bit tracking */ | |
646 | xc_hvm_track_dirty_vram(xen_xc, xen_domid, 0, 0, NULL); | |
647 | } | |
b4dd7802 AP |
648 | } |
649 | ||
20581d20 | 650 | static void xen_log_sync(MemoryListener *listener, MemoryRegionSection *section) |
b4dd7802 | 651 | { |
20581d20 | 652 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 653 | |
b18620cf | 654 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, |
052e87b0 | 655 | int128_get64(section->size)); |
b4dd7802 AP |
656 | } |
657 | ||
20581d20 AK |
658 | static void xen_log_global_start(MemoryListener *listener) |
659 | { | |
39f42439 AP |
660 | if (xen_enabled()) { |
661 | xen_in_migration = true; | |
662 | } | |
20581d20 AK |
663 | } |
664 | ||
665 | static void xen_log_global_stop(MemoryListener *listener) | |
b4dd7802 | 666 | { |
39f42439 | 667 | xen_in_migration = false; |
b4dd7802 AP |
668 | } |
669 | ||
20581d20 AK |
670 | static MemoryListener xen_memory_listener = { |
671 | .region_add = xen_region_add, | |
672 | .region_del = xen_region_del, | |
b4dd7802 AP |
673 | .log_start = xen_log_start, |
674 | .log_stop = xen_log_stop, | |
20581d20 AK |
675 | .log_sync = xen_log_sync, |
676 | .log_global_start = xen_log_global_start, | |
677 | .log_global_stop = xen_log_global_stop, | |
72e22d2f | 678 | .priority = 10, |
b4dd7802 | 679 | }; |
432d268c | 680 | |
3996e85c PD |
681 | static MemoryListener xen_io_listener = { |
682 | .region_add = xen_io_add, | |
683 | .region_del = xen_io_del, | |
684 | .priority = 10, | |
685 | }; | |
686 | ||
687 | static DeviceListener xen_device_listener = { | |
688 | .realize = xen_device_realize, | |
689 | .unrealize = xen_device_unrealize, | |
690 | }; | |
691 | ||
9ce94e7c AS |
692 | /* get the ioreq packets from share mem */ |
693 | static ioreq_t *cpu_get_ioreq_from_shared_memory(XenIOState *state, int vcpu) | |
694 | { | |
695 | ioreq_t *req = xen_vcpu_ioreq(state->shared_page, vcpu); | |
696 | ||
697 | if (req->state != STATE_IOREQ_READY) { | |
698 | DPRINTF("I/O request not ready: " | |
699 | "%x, ptr: %x, port: %"PRIx64", " | |
700 | "data: %"PRIx64", count: %" FMT_ioreq_size ", size: %" FMT_ioreq_size "\n", | |
701 | req->state, req->data_is_ptr, req->addr, | |
702 | req->data, req->count, req->size); | |
703 | return NULL; | |
704 | } | |
705 | ||
706 | xen_rmb(); /* see IOREQ_READY /then/ read contents of ioreq */ | |
707 | ||
708 | req->state = STATE_IOREQ_INPROCESS; | |
709 | return req; | |
710 | } | |
711 | ||
712 | /* use poll to get the port notification */ | |
713 | /* ioreq_vec--out,the */ | |
714 | /* retval--the number of ioreq packet */ | |
715 | static ioreq_t *cpu_get_ioreq(XenIOState *state) | |
716 | { | |
717 | int i; | |
718 | evtchn_port_t port; | |
719 | ||
a2db2a1e | 720 | port = xenevtchn_pending(state->xce_handle); |
fda1f768 | 721 | if (port == state->bufioreq_local_port) { |
bc72ad67 AB |
722 | timer_mod(state->buffered_io_timer, |
723 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 SS |
724 | return NULL; |
725 | } | |
726 | ||
9ce94e7c | 727 | if (port != -1) { |
1cd25a88 | 728 | for (i = 0; i < max_cpus; i++) { |
9ce94e7c AS |
729 | if (state->ioreq_local_port[i] == port) { |
730 | break; | |
731 | } | |
732 | } | |
733 | ||
1cd25a88 | 734 | if (i == max_cpus) { |
9ce94e7c AS |
735 | hw_error("Fatal error while trying to get io event!\n"); |
736 | } | |
737 | ||
738 | /* unmask the wanted port again */ | |
a2db2a1e | 739 | xenevtchn_unmask(state->xce_handle, port); |
9ce94e7c AS |
740 | |
741 | /* get the io packet from shared memory */ | |
742 | state->send_vcpu = i; | |
743 | return cpu_get_ioreq_from_shared_memory(state, i); | |
744 | } | |
745 | ||
746 | /* read error or read nothing */ | |
747 | return NULL; | |
748 | } | |
749 | ||
750 | static uint32_t do_inp(pio_addr_t addr, unsigned long size) | |
751 | { | |
752 | switch (size) { | |
753 | case 1: | |
754 | return cpu_inb(addr); | |
755 | case 2: | |
756 | return cpu_inw(addr); | |
757 | case 4: | |
758 | return cpu_inl(addr); | |
759 | default: | |
760 | hw_error("inp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
761 | } | |
762 | } | |
763 | ||
764 | static void do_outp(pio_addr_t addr, | |
765 | unsigned long size, uint32_t val) | |
766 | { | |
767 | switch (size) { | |
768 | case 1: | |
769 | return cpu_outb(addr, val); | |
770 | case 2: | |
771 | return cpu_outw(addr, val); | |
772 | case 4: | |
773 | return cpu_outl(addr, val); | |
774 | default: | |
775 | hw_error("outp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
776 | } | |
777 | } | |
778 | ||
a3864829 IJ |
779 | /* |
780 | * Helper functions which read/write an object from/to physical guest | |
781 | * memory, as part of the implementation of an ioreq. | |
782 | * | |
783 | * Equivalent to | |
784 | * cpu_physical_memory_rw(addr + (req->df ? -1 : +1) * req->size * i, | |
785 | * val, req->size, 0/1) | |
786 | * except without the integer overflow problems. | |
787 | */ | |
788 | static void rw_phys_req_item(hwaddr addr, | |
789 | ioreq_t *req, uint32_t i, void *val, int rw) | |
790 | { | |
791 | /* Do everything unsigned so overflow just results in a truncated result | |
792 | * and accesses to undesired parts of guest memory, which is up | |
793 | * to the guest */ | |
794 | hwaddr offset = (hwaddr)req->size * i; | |
795 | if (req->df) { | |
796 | addr -= offset; | |
797 | } else { | |
798 | addr += offset; | |
799 | } | |
800 | cpu_physical_memory_rw(addr, val, req->size, rw); | |
801 | } | |
802 | ||
803 | static inline void read_phys_req_item(hwaddr addr, | |
804 | ioreq_t *req, uint32_t i, void *val) | |
9ce94e7c | 805 | { |
a3864829 IJ |
806 | rw_phys_req_item(addr, req, i, val, 0); |
807 | } | |
808 | static inline void write_phys_req_item(hwaddr addr, | |
809 | ioreq_t *req, uint32_t i, void *val) | |
810 | { | |
811 | rw_phys_req_item(addr, req, i, val, 1); | |
812 | } | |
9ce94e7c | 813 | |
a3864829 IJ |
814 | |
815 | static void cpu_ioreq_pio(ioreq_t *req) | |
816 | { | |
249e7e0f | 817 | uint32_t i; |
9ce94e7c | 818 | |
eeb6b13a DS |
819 | trace_cpu_ioreq_pio(req, req->dir, req->df, req->data_is_ptr, req->addr, |
820 | req->data, req->count, req->size); | |
821 | ||
9ce94e7c AS |
822 | if (req->dir == IOREQ_READ) { |
823 | if (!req->data_is_ptr) { | |
824 | req->data = do_inp(req->addr, req->size); | |
eeb6b13a DS |
825 | trace_cpu_ioreq_pio_read_reg(req, req->data, req->addr, |
826 | req->size); | |
9ce94e7c AS |
827 | } else { |
828 | uint32_t tmp; | |
829 | ||
830 | for (i = 0; i < req->count; i++) { | |
831 | tmp = do_inp(req->addr, req->size); | |
a3864829 | 832 | write_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
833 | } |
834 | } | |
835 | } else if (req->dir == IOREQ_WRITE) { | |
836 | if (!req->data_is_ptr) { | |
eeb6b13a DS |
837 | trace_cpu_ioreq_pio_write_reg(req, req->data, req->addr, |
838 | req->size); | |
9ce94e7c AS |
839 | do_outp(req->addr, req->size, req->data); |
840 | } else { | |
841 | for (i = 0; i < req->count; i++) { | |
842 | uint32_t tmp = 0; | |
843 | ||
a3864829 | 844 | read_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
845 | do_outp(req->addr, req->size, tmp); |
846 | } | |
847 | } | |
848 | } | |
849 | } | |
850 | ||
851 | static void cpu_ioreq_move(ioreq_t *req) | |
852 | { | |
249e7e0f | 853 | uint32_t i; |
9ce94e7c | 854 | |
eeb6b13a DS |
855 | trace_cpu_ioreq_move(req, req->dir, req->df, req->data_is_ptr, req->addr, |
856 | req->data, req->count, req->size); | |
857 | ||
9ce94e7c AS |
858 | if (!req->data_is_ptr) { |
859 | if (req->dir == IOREQ_READ) { | |
860 | for (i = 0; i < req->count; i++) { | |
a3864829 | 861 | read_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
862 | } |
863 | } else if (req->dir == IOREQ_WRITE) { | |
864 | for (i = 0; i < req->count; i++) { | |
a3864829 | 865 | write_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
866 | } |
867 | } | |
868 | } else { | |
2b734340 | 869 | uint64_t tmp; |
9ce94e7c AS |
870 | |
871 | if (req->dir == IOREQ_READ) { | |
872 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
873 | read_phys_req_item(req->addr, req, i, &tmp); |
874 | write_phys_req_item(req->data, req, i, &tmp); | |
9ce94e7c AS |
875 | } |
876 | } else if (req->dir == IOREQ_WRITE) { | |
877 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
878 | read_phys_req_item(req->data, req, i, &tmp); |
879 | write_phys_req_item(req->addr, req, i, &tmp); | |
9ce94e7c AS |
880 | } |
881 | } | |
882 | } | |
883 | } | |
884 | ||
37f9e258 DS |
885 | static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t *req) |
886 | { | |
887 | X86CPU *cpu; | |
888 | CPUX86State *env; | |
889 | ||
890 | cpu = X86_CPU(current_cpu); | |
891 | env = &cpu->env; | |
892 | env->regs[R_EAX] = req->data; | |
893 | env->regs[R_EBX] = vmport_regs->ebx; | |
894 | env->regs[R_ECX] = vmport_regs->ecx; | |
895 | env->regs[R_EDX] = vmport_regs->edx; | |
896 | env->regs[R_ESI] = vmport_regs->esi; | |
897 | env->regs[R_EDI] = vmport_regs->edi; | |
898 | } | |
899 | ||
900 | static void regs_from_cpu(vmware_regs_t *vmport_regs) | |
901 | { | |
902 | X86CPU *cpu = X86_CPU(current_cpu); | |
903 | CPUX86State *env = &cpu->env; | |
904 | ||
905 | vmport_regs->ebx = env->regs[R_EBX]; | |
906 | vmport_regs->ecx = env->regs[R_ECX]; | |
907 | vmport_regs->edx = env->regs[R_EDX]; | |
908 | vmport_regs->esi = env->regs[R_ESI]; | |
909 | vmport_regs->edi = env->regs[R_EDI]; | |
910 | } | |
911 | ||
912 | static void handle_vmport_ioreq(XenIOState *state, ioreq_t *req) | |
913 | { | |
914 | vmware_regs_t *vmport_regs; | |
915 | ||
916 | assert(state->shared_vmport_page); | |
917 | vmport_regs = | |
918 | &state->shared_vmport_page->vcpu_vmport_regs[state->send_vcpu]; | |
919 | QEMU_BUILD_BUG_ON(sizeof(*req) < sizeof(*vmport_regs)); | |
920 | ||
921 | current_cpu = state->cpu_by_vcpu_id[state->send_vcpu]; | |
922 | regs_to_cpu(vmport_regs, req); | |
923 | cpu_ioreq_pio(req); | |
924 | regs_from_cpu(vmport_regs); | |
925 | current_cpu = NULL; | |
926 | } | |
927 | ||
928 | static void handle_ioreq(XenIOState *state, ioreq_t *req) | |
9ce94e7c | 929 | { |
eeb6b13a DS |
930 | trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr, |
931 | req->addr, req->data, req->count, req->size); | |
932 | ||
9ce94e7c AS |
933 | if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) && |
934 | (req->size < sizeof (target_ulong))) { | |
935 | req->data &= ((target_ulong) 1 << (8 * req->size)) - 1; | |
936 | } | |
937 | ||
eeb6b13a DS |
938 | if (req->dir == IOREQ_WRITE) |
939 | trace_handle_ioreq_write(req, req->type, req->df, req->data_is_ptr, | |
940 | req->addr, req->data, req->count, req->size); | |
941 | ||
9ce94e7c AS |
942 | switch (req->type) { |
943 | case IOREQ_TYPE_PIO: | |
944 | cpu_ioreq_pio(req); | |
945 | break; | |
946 | case IOREQ_TYPE_COPY: | |
947 | cpu_ioreq_move(req); | |
948 | break; | |
37f9e258 DS |
949 | case IOREQ_TYPE_VMWARE_PORT: |
950 | handle_vmport_ioreq(state, req); | |
951 | break; | |
9ce94e7c AS |
952 | case IOREQ_TYPE_TIMEOFFSET: |
953 | break; | |
954 | case IOREQ_TYPE_INVALIDATE: | |
e41d7c69 | 955 | xen_invalidate_map_cache(); |
9ce94e7c | 956 | break; |
3996e85c PD |
957 | case IOREQ_TYPE_PCI_CONFIG: { |
958 | uint32_t sbdf = req->addr >> 32; | |
959 | uint32_t val; | |
960 | ||
961 | /* Fake a write to port 0xCF8 so that | |
962 | * the config space access will target the | |
963 | * correct device model. | |
964 | */ | |
965 | val = (1u << 31) | | |
966 | ((req->addr & 0x0f00) << 16) | | |
967 | ((sbdf & 0xffff) << 8) | | |
968 | (req->addr & 0xfc); | |
969 | do_outp(0xcf8, 4, val); | |
970 | ||
971 | /* Now issue the config space access via | |
972 | * port 0xCFC | |
973 | */ | |
974 | req->addr = 0xcfc | (req->addr & 0x03); | |
975 | cpu_ioreq_pio(req); | |
976 | break; | |
977 | } | |
9ce94e7c AS |
978 | default: |
979 | hw_error("Invalid ioreq type 0x%x\n", req->type); | |
980 | } | |
eeb6b13a DS |
981 | if (req->dir == IOREQ_READ) { |
982 | trace_handle_ioreq_read(req, req->type, req->df, req->data_is_ptr, | |
983 | req->addr, req->data, req->count, req->size); | |
984 | } | |
9ce94e7c AS |
985 | } |
986 | ||
fda1f768 | 987 | static int handle_buffered_iopage(XenIOState *state) |
9ce94e7c | 988 | { |
d8b441a3 | 989 | buffered_iopage_t *buf_page = state->buffered_io_page; |
9ce94e7c AS |
990 | buf_ioreq_t *buf_req = NULL; |
991 | ioreq_t req; | |
992 | int qw; | |
993 | ||
d8b441a3 | 994 | if (!buf_page) { |
fda1f768 | 995 | return 0; |
9ce94e7c AS |
996 | } |
997 | ||
fda1f768 SS |
998 | memset(&req, 0x00, sizeof(req)); |
999 | ||
d8b441a3 JB |
1000 | for (;;) { |
1001 | uint32_t rdptr = buf_page->read_pointer, wrptr; | |
1002 | ||
1003 | xen_rmb(); | |
1004 | wrptr = buf_page->write_pointer; | |
1005 | xen_rmb(); | |
1006 | if (rdptr != buf_page->read_pointer) { | |
1007 | continue; | |
1008 | } | |
1009 | if (rdptr == wrptr) { | |
1010 | break; | |
1011 | } | |
1012 | buf_req = &buf_page->buf_ioreq[rdptr % IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1013 | req.size = 1UL << buf_req->size; |
1014 | req.count = 1; | |
1015 | req.addr = buf_req->addr; | |
1016 | req.data = buf_req->data; | |
1017 | req.state = STATE_IOREQ_READY; | |
1018 | req.dir = buf_req->dir; | |
1019 | req.df = 1; | |
1020 | req.type = buf_req->type; | |
1021 | req.data_is_ptr = 0; | |
1022 | qw = (req.size == 8); | |
1023 | if (qw) { | |
d8b441a3 JB |
1024 | buf_req = &buf_page->buf_ioreq[(rdptr + 1) % |
1025 | IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1026 | req.data |= ((uint64_t)buf_req->data) << 32; |
1027 | } | |
1028 | ||
37f9e258 | 1029 | handle_ioreq(state, &req); |
9ce94e7c | 1030 | |
d8b441a3 | 1031 | atomic_add(&buf_page->read_pointer, qw + 1); |
9ce94e7c | 1032 | } |
fda1f768 SS |
1033 | |
1034 | return req.count; | |
9ce94e7c AS |
1035 | } |
1036 | ||
1037 | static void handle_buffered_io(void *opaque) | |
1038 | { | |
1039 | XenIOState *state = opaque; | |
1040 | ||
fda1f768 | 1041 | if (handle_buffered_iopage(state)) { |
bc72ad67 AB |
1042 | timer_mod(state->buffered_io_timer, |
1043 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 | 1044 | } else { |
bc72ad67 | 1045 | timer_del(state->buffered_io_timer); |
a2db2a1e | 1046 | xenevtchn_unmask(state->xce_handle, state->bufioreq_local_port); |
fda1f768 | 1047 | } |
9ce94e7c AS |
1048 | } |
1049 | ||
1050 | static void cpu_handle_ioreq(void *opaque) | |
1051 | { | |
1052 | XenIOState *state = opaque; | |
1053 | ioreq_t *req = cpu_get_ioreq(state); | |
1054 | ||
1055 | handle_buffered_iopage(state); | |
1056 | if (req) { | |
37f9e258 | 1057 | handle_ioreq(state, req); |
9ce94e7c AS |
1058 | |
1059 | if (req->state != STATE_IOREQ_INPROCESS) { | |
1060 | fprintf(stderr, "Badness in I/O request ... not in service?!: " | |
1061 | "%x, ptr: %x, port: %"PRIx64", " | |
37f9e258 DS |
1062 | "data: %"PRIx64", count: %" FMT_ioreq_size |
1063 | ", size: %" FMT_ioreq_size | |
1064 | ", type: %"FMT_ioreq_size"\n", | |
9ce94e7c | 1065 | req->state, req->data_is_ptr, req->addr, |
37f9e258 | 1066 | req->data, req->count, req->size, req->type); |
180640ea | 1067 | destroy_hvm_domain(false); |
9ce94e7c AS |
1068 | return; |
1069 | } | |
1070 | ||
1071 | xen_wmb(); /* Update ioreq contents /then/ update state. */ | |
1072 | ||
1073 | /* | |
1074 | * We do this before we send the response so that the tools | |
1075 | * have the opportunity to pick up on the reset before the | |
1076 | * guest resumes and does a hlt with interrupts disabled which | |
1077 | * causes Xen to powerdown the domain. | |
1078 | */ | |
1354869c | 1079 | if (runstate_is_running()) { |
9ce94e7c | 1080 | if (qemu_shutdown_requested_get()) { |
180640ea | 1081 | destroy_hvm_domain(false); |
9ce94e7c AS |
1082 | } |
1083 | if (qemu_reset_requested_get()) { | |
e063eb1f | 1084 | qemu_system_reset(VMRESET_REPORT); |
180640ea | 1085 | destroy_hvm_domain(true); |
9ce94e7c AS |
1086 | } |
1087 | } | |
1088 | ||
1089 | req->state = STATE_IORESP_READY; | |
a2db2a1e IC |
1090 | xenevtchn_notify(state->xce_handle, |
1091 | state->ioreq_local_port[state->send_vcpu]); | |
9ce94e7c AS |
1092 | } |
1093 | } | |
1094 | ||
1095 | static void xen_main_loop_prepare(XenIOState *state) | |
1096 | { | |
1097 | int evtchn_fd = -1; | |
1098 | ||
a2db2a1e IC |
1099 | if (state->xce_handle != NULL) { |
1100 | evtchn_fd = xenevtchn_fd(state->xce_handle); | |
9ce94e7c AS |
1101 | } |
1102 | ||
bc72ad67 | 1103 | state->buffered_io_timer = timer_new_ms(QEMU_CLOCK_REALTIME, handle_buffered_io, |
9ce94e7c | 1104 | state); |
9ce94e7c AS |
1105 | |
1106 | if (evtchn_fd != -1) { | |
37f9e258 DS |
1107 | CPUState *cpu_state; |
1108 | ||
1109 | DPRINTF("%s: Init cpu_by_vcpu_id\n", __func__); | |
1110 | CPU_FOREACH(cpu_state) { | |
1111 | DPRINTF("%s: cpu_by_vcpu_id[%d]=%p\n", | |
1112 | __func__, cpu_state->cpu_index, cpu_state); | |
1113 | state->cpu_by_vcpu_id[cpu_state->cpu_index] = cpu_state; | |
1114 | } | |
9ce94e7c AS |
1115 | qemu_set_fd_handler(evtchn_fd, cpu_handle_ioreq, NULL, state); |
1116 | } | |
1117 | } | |
1118 | ||
1119 | ||
1dfb4dd9 LC |
1120 | static void xen_hvm_change_state_handler(void *opaque, int running, |
1121 | RunState rstate) | |
9ce94e7c | 1122 | { |
3996e85c PD |
1123 | XenIOState *state = opaque; |
1124 | ||
9ce94e7c | 1125 | if (running) { |
3996e85c | 1126 | xen_main_loop_prepare(state); |
9ce94e7c | 1127 | } |
3996e85c PD |
1128 | |
1129 | xen_set_ioreq_server_state(xen_xc, xen_domid, | |
1130 | state->ioservid, | |
1131 | (rstate == RUN_STATE_RUNNING)); | |
9ce94e7c AS |
1132 | } |
1133 | ||
9e8dd451 | 1134 | static void xen_exit_notifier(Notifier *n, void *data) |
9ce94e7c AS |
1135 | { |
1136 | XenIOState *state = container_of(n, XenIOState, exit); | |
1137 | ||
a2db2a1e | 1138 | xenevtchn_close(state->xce_handle); |
29321335 | 1139 | xs_daemon_close(state->xenstore); |
9ce94e7c AS |
1140 | } |
1141 | ||
d1814e08 SS |
1142 | static void xen_read_physmap(XenIOState *state) |
1143 | { | |
1144 | XenPhysmap *physmap = NULL; | |
1145 | unsigned int len, num, i; | |
1146 | char path[80], *value = NULL; | |
1147 | char **entries = NULL; | |
1148 | ||
1149 | snprintf(path, sizeof(path), | |
1150 | "/local/domain/0/device-model/%d/physmap", xen_domid); | |
1151 | entries = xs_directory(state->xenstore, 0, path, &num); | |
1152 | if (entries == NULL) | |
1153 | return; | |
1154 | ||
1155 | for (i = 0; i < num; i++) { | |
1156 | physmap = g_malloc(sizeof (XenPhysmap)); | |
1157 | physmap->phys_offset = strtoull(entries[i], NULL, 16); | |
1158 | snprintf(path, sizeof(path), | |
1159 | "/local/domain/0/device-model/%d/physmap/%s/start_addr", | |
1160 | xen_domid, entries[i]); | |
1161 | value = xs_read(state->xenstore, 0, path, &len); | |
1162 | if (value == NULL) { | |
c5633d99 | 1163 | g_free(physmap); |
d1814e08 SS |
1164 | continue; |
1165 | } | |
1166 | physmap->start_addr = strtoull(value, NULL, 16); | |
1167 | free(value); | |
1168 | ||
1169 | snprintf(path, sizeof(path), | |
1170 | "/local/domain/0/device-model/%d/physmap/%s/size", | |
1171 | xen_domid, entries[i]); | |
1172 | value = xs_read(state->xenstore, 0, path, &len); | |
1173 | if (value == NULL) { | |
c5633d99 | 1174 | g_free(physmap); |
d1814e08 SS |
1175 | continue; |
1176 | } | |
1177 | physmap->size = strtoull(value, NULL, 16); | |
1178 | free(value); | |
1179 | ||
1180 | snprintf(path, sizeof(path), | |
1181 | "/local/domain/0/device-model/%d/physmap/%s/name", | |
1182 | xen_domid, entries[i]); | |
1183 | physmap->name = xs_read(state->xenstore, 0, path, &len); | |
1184 | ||
1185 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
1186 | } | |
1187 | free(entries); | |
d1814e08 SS |
1188 | } |
1189 | ||
11addd0a LJ |
1190 | static void xen_wakeup_notifier(Notifier *notifier, void *data) |
1191 | { | |
1192 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 0); | |
1193 | } | |
1194 | ||
dced4d2f | 1195 | void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory) |
29d3ccde | 1196 | { |
9ce94e7c | 1197 | int i, rc; |
3996e85c PD |
1198 | xen_pfn_t ioreq_pfn; |
1199 | xen_pfn_t bufioreq_pfn; | |
1200 | evtchn_port_t bufioreq_evtchn; | |
9ce94e7c AS |
1201 | XenIOState *state; |
1202 | ||
7267c094 | 1203 | state = g_malloc0(sizeof (XenIOState)); |
9ce94e7c | 1204 | |
a2db2a1e IC |
1205 | state->xce_handle = xenevtchn_open(NULL, 0); |
1206 | if (state->xce_handle == NULL) { | |
9ce94e7c | 1207 | perror("xen: event channel open"); |
dced4d2f | 1208 | goto err; |
9ce94e7c AS |
1209 | } |
1210 | ||
29321335 AP |
1211 | state->xenstore = xs_daemon_open(); |
1212 | if (state->xenstore == NULL) { | |
1213 | perror("xen: xenstore open"); | |
dced4d2f | 1214 | goto err; |
29321335 AP |
1215 | } |
1216 | ||
3996e85c PD |
1217 | rc = xen_create_ioreq_server(xen_xc, xen_domid, &state->ioservid); |
1218 | if (rc < 0) { | |
1219 | perror("xen: ioreq server create"); | |
dced4d2f | 1220 | goto err; |
3996e85c PD |
1221 | } |
1222 | ||
9ce94e7c AS |
1223 | state->exit.notify = xen_exit_notifier; |
1224 | qemu_add_exit_notifier(&state->exit); | |
1225 | ||
da98c8eb GH |
1226 | state->suspend.notify = xen_suspend_notifier; |
1227 | qemu_register_suspend_notifier(&state->suspend); | |
1228 | ||
11addd0a LJ |
1229 | state->wakeup.notify = xen_wakeup_notifier; |
1230 | qemu_register_wakeup_notifier(&state->wakeup); | |
1231 | ||
3996e85c PD |
1232 | rc = xen_get_ioreq_server_info(xen_xc, xen_domid, state->ioservid, |
1233 | &ioreq_pfn, &bufioreq_pfn, | |
1234 | &bufioreq_evtchn); | |
1235 | if (rc < 0) { | |
dced4d2f MA |
1236 | error_report("failed to get ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1237 | errno, xen_xc); | |
1238 | goto err; | |
3996e85c PD |
1239 | } |
1240 | ||
9ce94e7c | 1241 | DPRINTF("shared page at pfn %lx\n", ioreq_pfn); |
3996e85c PD |
1242 | DPRINTF("buffered io page at pfn %lx\n", bufioreq_pfn); |
1243 | DPRINTF("buffered io evtchn is %x\n", bufioreq_evtchn); | |
1244 | ||
e0cb42ae | 1245 | state->shared_page = xenforeignmemory_map(xen_fmem, xen_domid, |
9ed257d1 | 1246 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1247 | 1, &ioreq_pfn, NULL); |
9ce94e7c | 1248 | if (state->shared_page == NULL) { |
dced4d2f MA |
1249 | error_report("map shared IO page returned error %d handle=" XC_INTERFACE_FMT, |
1250 | errno, xen_xc); | |
1251 | goto err; | |
9ce94e7c AS |
1252 | } |
1253 | ||
37f9e258 DS |
1254 | rc = xen_get_vmport_regs_pfn(xen_xc, xen_domid, &ioreq_pfn); |
1255 | if (!rc) { | |
1256 | DPRINTF("shared vmport page at pfn %lx\n", ioreq_pfn); | |
1257 | state->shared_vmport_page = | |
e0cb42ae IC |
1258 | xenforeignmemory_map(xen_fmem, xen_domid, PROT_READ|PROT_WRITE, |
1259 | 1, &ioreq_pfn, NULL); | |
37f9e258 | 1260 | if (state->shared_vmport_page == NULL) { |
dced4d2f MA |
1261 | error_report("map shared vmport IO page returned error %d handle=" |
1262 | XC_INTERFACE_FMT, errno, xen_xc); | |
1263 | goto err; | |
37f9e258 DS |
1264 | } |
1265 | } else if (rc != -ENOSYS) { | |
dced4d2f MA |
1266 | error_report("get vmport regs pfn returned error %d, rc=%d", |
1267 | errno, rc); | |
1268 | goto err; | |
37f9e258 DS |
1269 | } |
1270 | ||
e0cb42ae | 1271 | state->buffered_io_page = xenforeignmemory_map(xen_fmem, xen_domid, |
3996e85c | 1272 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1273 | 1, &bufioreq_pfn, NULL); |
9ce94e7c | 1274 | if (state->buffered_io_page == NULL) { |
dced4d2f MA |
1275 | error_report("map buffered IO page returned error %d", errno); |
1276 | goto err; | |
9ce94e7c AS |
1277 | } |
1278 | ||
37f9e258 DS |
1279 | /* Note: cpus is empty at this point in init */ |
1280 | state->cpu_by_vcpu_id = g_malloc0(max_cpus * sizeof(CPUState *)); | |
1281 | ||
3996e85c PD |
1282 | rc = xen_set_ioreq_server_state(xen_xc, xen_domid, state->ioservid, true); |
1283 | if (rc < 0) { | |
dced4d2f MA |
1284 | error_report("failed to enable ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1285 | errno, xen_xc); | |
1286 | goto err; | |
3996e85c PD |
1287 | } |
1288 | ||
1cd25a88 | 1289 | state->ioreq_local_port = g_malloc0(max_cpus * sizeof (evtchn_port_t)); |
9ce94e7c AS |
1290 | |
1291 | /* FIXME: how about if we overflow the page here? */ | |
1cd25a88 | 1292 | for (i = 0; i < max_cpus; i++) { |
a2db2a1e | 1293 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
9ce94e7c AS |
1294 | xen_vcpu_eport(state->shared_page, i)); |
1295 | if (rc == -1) { | |
dced4d2f MA |
1296 | error_report("shared evtchn %d bind error %d", i, errno); |
1297 | goto err; | |
9ce94e7c AS |
1298 | } |
1299 | state->ioreq_local_port[i] = rc; | |
1300 | } | |
1301 | ||
a2db2a1e | 1302 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
3996e85c | 1303 | bufioreq_evtchn); |
fda1f768 | 1304 | if (rc == -1) { |
dced4d2f MA |
1305 | error_report("buffered evtchn bind error %d", errno); |
1306 | goto err; | |
fda1f768 SS |
1307 | } |
1308 | state->bufioreq_local_port = rc; | |
1309 | ||
432d268c | 1310 | /* Init RAM management */ |
cd1ba7de | 1311 | xen_map_cache_init(xen_phys_offset_to_gaddr, state); |
91176e31 | 1312 | xen_ram_init(pcms, ram_size, ram_memory); |
432d268c | 1313 | |
fb4bb2b5 | 1314 | qemu_add_vm_change_state_handler(xen_hvm_change_state_handler, state); |
9ce94e7c | 1315 | |
20581d20 | 1316 | state->memory_listener = xen_memory_listener; |
b4dd7802 | 1317 | QLIST_INIT(&state->physmap); |
f6790af6 | 1318 | memory_listener_register(&state->memory_listener, &address_space_memory); |
b4dd7802 AP |
1319 | state->log_for_dirtybit = NULL; |
1320 | ||
3996e85c PD |
1321 | state->io_listener = xen_io_listener; |
1322 | memory_listener_register(&state->io_listener, &address_space_io); | |
1323 | ||
1324 | state->device_listener = xen_device_listener; | |
1325 | device_listener_register(&state->device_listener); | |
1326 | ||
ad35a7da SS |
1327 | /* Initialize backend core & drivers */ |
1328 | if (xen_be_init() != 0) { | |
dced4d2f MA |
1329 | error_report("xen backend core setup failed"); |
1330 | goto err; | |
ad35a7da SS |
1331 | } |
1332 | xen_be_register("console", &xen_console_ops); | |
37cdfcf1 | 1333 | xen_be_register("vkbd", &xen_kbdmouse_ops); |
ad35a7da | 1334 | xen_be_register("qdisk", &xen_blkdev_ops); |
d1814e08 | 1335 | xen_read_physmap(state); |
dced4d2f | 1336 | return; |
ad35a7da | 1337 | |
dced4d2f MA |
1338 | err: |
1339 | error_report("xen hardware virtual machine initialisation failed"); | |
1340 | exit(1); | |
29d3ccde | 1341 | } |
9ce94e7c | 1342 | |
180640ea | 1343 | void destroy_hvm_domain(bool reboot) |
9ce94e7c AS |
1344 | { |
1345 | XenXC xc_handle; | |
1346 | int sts; | |
1347 | ||
1348 | xc_handle = xen_xc_interface_open(0, 0, 0); | |
1349 | if (xc_handle == XC_HANDLER_INITIAL_VALUE) { | |
1350 | fprintf(stderr, "Cannot acquire xenctrl handle\n"); | |
1351 | } else { | |
180640ea JB |
1352 | sts = xc_domain_shutdown(xc_handle, xen_domid, |
1353 | reboot ? SHUTDOWN_reboot : SHUTDOWN_poweroff); | |
9ce94e7c | 1354 | if (sts != 0) { |
180640ea JB |
1355 | fprintf(stderr, "xc_domain_shutdown failed to issue %s, " |
1356 | "sts %d, %s\n", reboot ? "reboot" : "poweroff", | |
1357 | sts, strerror(errno)); | |
9ce94e7c | 1358 | } else { |
180640ea JB |
1359 | fprintf(stderr, "Issued domain %d %s\n", xen_domid, |
1360 | reboot ? "reboot" : "poweroff"); | |
9ce94e7c AS |
1361 | } |
1362 | xc_interface_close(xc_handle); | |
1363 | } | |
1364 | } | |
c65adf9b AK |
1365 | |
1366 | void xen_register_framebuffer(MemoryRegion *mr) | |
1367 | { | |
1368 | framebuffer = mr; | |
1369 | } | |
eaab4d60 AK |
1370 | |
1371 | void xen_shutdown_fatal_error(const char *fmt, ...) | |
1372 | { | |
1373 | va_list ap; | |
1374 | ||
1375 | va_start(ap, fmt); | |
1376 | vfprintf(stderr, fmt, ap); | |
1377 | va_end(ap); | |
1378 | fprintf(stderr, "Will destroy the domain.\n"); | |
1379 | /* destroy the domain */ | |
1380 | qemu_system_shutdown_request(); | |
1381 | } | |
910b38e4 AP |
1382 | |
1383 | void xen_modified_memory(ram_addr_t start, ram_addr_t length) | |
1384 | { | |
1385 | if (unlikely(xen_in_migration)) { | |
1386 | int rc; | |
1387 | ram_addr_t start_pfn, nb_pages; | |
1388 | ||
1389 | if (length == 0) { | |
1390 | length = TARGET_PAGE_SIZE; | |
1391 | } | |
1392 | start_pfn = start >> TARGET_PAGE_BITS; | |
1393 | nb_pages = ((start + length + TARGET_PAGE_SIZE - 1) >> TARGET_PAGE_BITS) | |
1394 | - start_pfn; | |
1395 | rc = xc_hvm_modified_memory(xen_xc, xen_domid, start_pfn, nb_pages); | |
1396 | if (rc) { | |
1397 | fprintf(stderr, | |
1398 | "%s failed for "RAM_ADDR_FMT" ("RAM_ADDR_FMT"): %i, %s\n", | |
1399 | __func__, start, nb_pages, rc, strerror(-rc)); | |
1400 | } | |
1401 | } | |
1402 | } | |
04b0de0e WL |
1403 | |
1404 | void qmp_xen_set_global_dirty_log(bool enable, Error **errp) | |
1405 | { | |
1406 | if (enable) { | |
1407 | memory_global_dirty_log_start(); | |
1408 | } else { | |
1409 | memory_global_dirty_log_stop(); | |
1410 | } | |
1411 | } |