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23b96cdb AF |
1 | /* |
2 | * QEMU Intel 82374 emulation (Enhanced DMA controller) | |
3 | * | |
4 | * Copyright (c) 2010 Hervé Poussineau | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
0430891c | 25 | #include "qemu/osdep.h" |
0d09e41a | 26 | #include "hw/isa/isa.h" |
23b96cdb | 27 | |
449ae7ec HP |
28 | #define TYPE_I82374 "i82374" |
29 | #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) | |
30 | ||
23b96cdb AF |
31 | //#define DEBUG_I82374 |
32 | ||
33 | #ifdef DEBUG_I82374 | |
34 | #define DPRINTF(fmt, ...) \ | |
35 | do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) | |
36 | #else | |
37 | #define DPRINTF(fmt, ...) \ | |
38 | do {} while (0) | |
39 | #endif | |
40 | #define BADF(fmt, ...) \ | |
41 | do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) | |
42 | ||
43 | typedef struct I82374State { | |
449ae7ec HP |
44 | ISADevice parent_obj; |
45 | ||
46 | uint32_t iobase; | |
23b96cdb | 47 | uint8_t commands[8]; |
848696bf | 48 | PortioList port_list; |
23b96cdb AF |
49 | } I82374State; |
50 | ||
51 | static const VMStateDescription vmstate_i82374 = { | |
52 | .name = "i82374", | |
53 | .version_id = 0, | |
54 | .minimum_version_id = 0, | |
55 | .fields = (VMStateField[]) { | |
56 | VMSTATE_UINT8_ARRAY(commands, I82374State, 8), | |
57 | VMSTATE_END_OF_LIST() | |
58 | }, | |
59 | }; | |
60 | ||
61 | static uint32_t i82374_read_isr(void *opaque, uint32_t nport) | |
62 | { | |
63 | uint32_t val = 0; | |
64 | ||
65 | BADF("%s: %08x\n", __func__, nport); | |
66 | ||
67 | DPRINTF("%s: %08x=%08x\n", __func__, nport, val); | |
68 | return val; | |
69 | } | |
70 | ||
71 | static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) | |
72 | { | |
73 | DPRINTF("%s: %08x=%08x\n", __func__, nport, data); | |
74 | ||
75 | if (data != 0x42) { | |
76 | /* Not Stop S/G command */ | |
77 | BADF("%s: %08x=%08x\n", __func__, nport, data); | |
78 | } | |
79 | } | |
80 | ||
81 | static uint32_t i82374_read_status(void *opaque, uint32_t nport) | |
82 | { | |
83 | uint32_t val = 0; | |
84 | ||
85 | BADF("%s: %08x\n", __func__, nport); | |
86 | ||
87 | DPRINTF("%s: %08x=%08x\n", __func__, nport, val); | |
88 | return val; | |
89 | } | |
90 | ||
91 | static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) | |
92 | { | |
93 | DPRINTF("%s: %08x=%08x\n", __func__, nport, data); | |
94 | ||
95 | BADF("%s: %08x=%08x\n", __func__, nport, data); | |
96 | } | |
97 | ||
98 | static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) | |
99 | { | |
100 | uint32_t val = 0; | |
101 | ||
102 | BADF("%s: %08x\n", __func__, nport); | |
103 | ||
104 | DPRINTF("%s: %08x=%08x\n", __func__, nport, val); | |
105 | return val; | |
106 | } | |
107 | ||
f94b64ac JK |
108 | static const MemoryRegionPortio i82374_portio_list[] = { |
109 | { 0x0A, 1, 1, .read = i82374_read_isr, }, | |
110 | { 0x10, 8, 1, .write = i82374_write_command, }, | |
111 | { 0x18, 8, 1, .read = i82374_read_status, }, | |
112 | { 0x20, 0x20, 1, | |
113 | .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, | |
114 | PORTIO_END_OF_LIST(), | |
115 | }; | |
116 | ||
449ae7ec | 117 | static void i82374_realize(DeviceState *dev, Error **errp) |
23b96cdb | 118 | { |
449ae7ec | 119 | I82374State *s = I82374(dev); |
23b96cdb | 120 | |
449ae7ec | 121 | portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, |
848696bf | 122 | "i82374"); |
449ae7ec HP |
123 | portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), |
124 | s->iobase); | |
23b96cdb | 125 | |
57146941 | 126 | DMA_init(isa_bus_from_device(ISA_DEVICE(dev)), 1); |
449ae7ec | 127 | memset(s->commands, 0, sizeof(s->commands)); |
23b96cdb AF |
128 | } |
129 | ||
39bffca2 | 130 | static Property i82374_properties[] = { |
449ae7ec | 131 | DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), |
39bffca2 AL |
132 | DEFINE_PROP_END_OF_LIST() |
133 | }; | |
134 | ||
8f04ee08 AL |
135 | static void i82374_class_init(ObjectClass *klass, void *data) |
136 | { | |
39bffca2 | 137 | DeviceClass *dc = DEVICE_CLASS(klass); |
8f04ee08 | 138 | |
449ae7ec HP |
139 | dc->realize = i82374_realize; |
140 | dc->vmsd = &vmstate_i82374; | |
39bffca2 | 141 | dc->props = i82374_properties; |
8f04ee08 AL |
142 | } |
143 | ||
449ae7ec | 144 | static const TypeInfo i82374_info = { |
eb1440e7 | 145 | .name = TYPE_I82374, |
39bffca2 | 146 | .parent = TYPE_ISA_DEVICE, |
449ae7ec | 147 | .instance_size = sizeof(I82374State), |
8f04ee08 | 148 | .class_init = i82374_class_init, |
23b96cdb AF |
149 | }; |
150 | ||
83f7d43a | 151 | static void i82374_register_types(void) |
23b96cdb | 152 | { |
449ae7ec | 153 | type_register_static(&i82374_info); |
23b96cdb AF |
154 | } |
155 | ||
83f7d43a | 156 | type_init(i82374_register_types) |