]> Git Repo - qemu.git/blame - hw/ppc/mac.h
uninorth: use object link to pass OpenPIC object to uninorth
[qemu.git] / hw / ppc / mac.h
CommitLineData
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JM
1/*
2 * QEMU PowerMac emulation shared definitions and prototypes
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
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25
26#ifndef PPC_MAC_H
27#define PPC_MAC_H
3cbee15b 28
022c62cb 29#include "exec/memory.h"
95ed3b7c 30#include "hw/sysbus.h"
07a7484e 31#include "hw/ide/internal.h"
0d09e41a 32#include "hw/input/adb.h"
09a57347 33#include "hw/misc/mos6522.h"
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34#include "hw/pci/pci_host.h"
35#include "hw/pci-host/uninorth.h"
1e39101c 36
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37/* SMP is not enabled, for now */
38#define MAX_CPUS 1
39
bba831e8 40#define BIOS_SIZE (1024 * 1024)
3cbee15b 41#define NVRAM_SIZE 0x2000
e5d01b06 42#define PROM_FILENAME "openbios-ppc"
992e5acd 43#define PROM_ADDR 0xfff00000
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44
45#define KERNEL_LOAD_ADDR 0x01000000
b9e17a34 46#define KERNEL_GAP 0x00100000
3cbee15b 47
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48#define ESCC_CLOCK 3686400
49
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50/* Old World IRQs */
51#define OLDWORLD_CUDA_IRQ 0x12
52#define OLDWORLD_ESCCB_IRQ 0x10
53#define OLDWORLD_ESCCA_IRQ 0xf
54#define OLDWORLD_IDE0_IRQ 0xd
55#define OLDWORLD_IDE0_DMA_IRQ 0x2
56#define OLDWORLD_IDE1_IRQ 0xe
57#define OLDWORLD_IDE1_DMA_IRQ 0x3
09a57347 58
3cbee15b 59/* MacIO */
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60#define TYPE_MACIO_IDE "macio-ide"
61#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
62
63typedef struct MACIOIDEState {
64 /*< private >*/
65 SysBusDevice parent_obj;
66 /*< public >*/
0fc84331 67 uint32_t channel;
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68 qemu_irq real_ide_irq;
69 qemu_irq real_dma_irq;
70 qemu_irq ide_irq;
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71 qemu_irq dma_irq;
72
73 MemoryRegion mem;
74 IDEBus bus;
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75 IDEDMA dma;
76 void *dbdma;
cae32357 77 bool dma_active;
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78 uint32_t timing_reg;
79 uint32_t irq_reg;
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80} MACIOIDEState;
81
82void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
e451b85f 83void macio_ide_register_dma(MACIOIDEState *ide);
07a7484e 84
d037834a 85void macio_init(PCIDevice *dev,
343bd85a 86 MemoryRegion *pic_mem);
3cbee15b 87
3cbee15b 88/* Grackle PCI */
0e655047 89#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
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90
91/* UniNorth PCI */
0f4b5415 92UNINState *pci_pmac_init(qemu_irq *pic,
32cde615 93 MemoryRegion *address_space_mem);
0f4b5415 94UNINState *pci_pmac_u3_init(qemu_irq *pic,
32cde615 95 MemoryRegion *address_space_mem);
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96
97/* Mac NVRAM */
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98#define TYPE_MACIO_NVRAM "macio-nvram"
99#define MACIO_NVRAM(obj) \
100 OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM)
101
102typedef struct MacIONVRAMState {
103 /*< private >*/
104 SysBusDevice parent_obj;
105 /*< public >*/
106
107 uint32_t size;
108 uint32_t it_shift;
109
110 MemoryRegion mem;
111 uint8_t *data;
112} MacIONVRAMState;
3cbee15b 113
3cbee15b 114void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
2a6a4076 115#endif /* PPC_MAC_H */
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