projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 87ecb68b | 1 | /* NOR flash devices */ |
| cfe5f011 AK |
2 | |
| 3 | #include "memory.h" | |
| 4 | ||
| c227f099 | 5 | typedef struct pflash_t pflash_t; |
| 87ecb68b | 6 | |
| 88eeee0a | 7 | /* pflash_cfi01.c */ |
| cfe5f011 AK |
8 | pflash_t *pflash_cfi01_register(target_phys_addr_t base, |
| 9 | DeviceState *qdev, const char *name, | |
| 10 | target_phys_addr_t size, | |
| 88eeee0a AZ |
11 | BlockDriverState *bs, |
| 12 | uint32_t sector_len, int nb_blocs, int width, | |
| 13 | uint16_t id0, uint16_t id1, | |
| 01e0451a | 14 | uint16_t id2, uint16_t id3, int be); |
| 88eeee0a AZ |
15 | |
| 16 | /* pflash_cfi02.c */ | |
| cfe5f011 AK |
17 | pflash_t *pflash_cfi02_register(target_phys_addr_t base, |
| 18 | DeviceState *qdev, const char *name, | |
| 19 | target_phys_addr_t size, | |
| cf6d9118 | 20 | BlockDriverState *bs, uint32_t sector_len, |
| 4fbd24ba | 21 | int nb_blocs, int nb_mappings, int width, |
| 88eeee0a | 22 | uint16_t id0, uint16_t id1, |
| 6725070d | 23 | uint16_t id2, uint16_t id3, |
| 01e0451a AL |
24 | uint16_t unlock_addr0, uint16_t unlock_addr1, |
| 25 | int be); | |
| 87ecb68b | 26 | |
| cfe5f011 AK |
27 | MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl); |
| 28 | ||
| 87ecb68b | 29 | /* nand.c */ |
| d4220389 JR |
30 | DeviceState *nand_init(BlockDriverState *bdrv, int manf_id, int chip_id); |
| 31 | void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale, | |
| 51db57f7 | 32 | uint8_t ce, uint8_t wp, uint8_t gnd); |
| d4220389 JR |
33 | void nand_getpins(DeviceState *dev, int *rb); |
| 34 | void nand_setio(DeviceState *dev, uint32_t value); | |
| 35 | uint32_t nand_getio(DeviceState *dev); | |
| 36 | uint32_t nand_getbuswidth(DeviceState *dev); | |
| 87ecb68b PB |
37 | |
| 38 | #define NAND_MFR_TOSHIBA 0x98 | |
| 39 | #define NAND_MFR_SAMSUNG 0xec | |
| 40 | #define NAND_MFR_FUJITSU 0x04 | |
| 41 | #define NAND_MFR_NATIONAL 0x8f | |
| 42 | #define NAND_MFR_RENESAS 0x07 | |
| 43 | #define NAND_MFR_STMICRO 0x20 | |
| 44 | #define NAND_MFR_HYNIX 0xad | |
| 45 | #define NAND_MFR_MICRON 0x2c | |
| 46 | ||
| 7e7c5e4c | 47 | /* onenand.c */ |
| 500954e3 | 48 | void *onenand_raw_otp(DeviceState *onenand_device); |
| 7e7c5e4c | 49 | |
| 87ecb68b | 50 | /* ecc.c */ |
| bc24a225 | 51 | typedef struct { |
| 87ecb68b PB |
52 | uint8_t cp; /* Column parity */ |
| 53 | uint16_t lp[2]; /* Line parity */ | |
| 54 | uint16_t count; | |
| bc24a225 | 55 | } ECCState; |
| 87ecb68b | 56 | |
| bc24a225 PB |
57 | uint8_t ecc_digest(ECCState *s, uint8_t sample); |
| 58 | void ecc_reset(ECCState *s); | |
| 34f9f0b5 | 59 | extern VMStateDescription vmstate_ecc_state; |