]> Git Repo - qemu.git/blame - hw/ppc/spapr_rtc.c
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[qemu.git] / hw / ppc / spapr_rtc.c
CommitLineData
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1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * RTAS Real Time Clock
5 *
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
7 * Copyright 2014 David Gibson, Red Hat.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 *
27 */
0d75590d 28#include "qemu/osdep.h"
12f42174 29#include "cpu.h"
e0cf11f3 30#include "qemu/timer.h"
f01c5d84 31#include "sysemu/sysemu.h"
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32#include "hw/ppc/spapr.h"
33#include "qapi-event.h"
f348b6d1 34#include "qemu/cutils.h"
12f42174 35
147ff807 36void spapr_rtc_read(sPAPRRTCState *rtc, struct tm *tm, uint32_t *ns)
e5dad1d7 37{
f01c5d84 38 int64_t host_ns = qemu_clock_get_ns(rtc_clock);
880ae7de 39 int64_t guest_ns;
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40 time_t guest_s;
41
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42 assert(rtc);
43
880ae7de 44 guest_ns = host_ns + rtc->ns_offset;
13566fe3 45 guest_s = guest_ns / NANOSECONDS_PER_SECOND;
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46
47 if (tm) {
48 gmtime_r(&guest_s, tm);
49 }
e5dad1d7 50 if (ns) {
880ae7de 51 *ns = guest_ns;
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52 }
53}
54
147ff807 55int spapr_rtc_import_offset(sPAPRRTCState *rtc, int64_t legacy_offset)
880ae7de 56{
147ff807 57 if (!rtc) {
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58 return -ENODEV;
59 }
60
13566fe3 61 rtc->ns_offset = legacy_offset * NANOSECONDS_PER_SECOND;
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62
63 return 0;
64}
65
28e02042 66static void rtas_get_time_of_day(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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67 uint32_t token, uint32_t nargs,
68 target_ulong args,
69 uint32_t nret, target_ulong rets)
70{
71 struct tm tm;
e5dad1d7 72 uint32_t ns;
12f42174 73
bbade206 74 if ((nargs != 0) || (nret != 8)) {
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75 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
76 return;
77 }
78
147ff807 79 spapr_rtc_read(&spapr->rtc, &tm, &ns);
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80
81 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
82 rtas_st(rets, 1, tm.tm_year + 1900);
83 rtas_st(rets, 2, tm.tm_mon + 1);
84 rtas_st(rets, 3, tm.tm_mday);
85 rtas_st(rets, 4, tm.tm_hour);
86 rtas_st(rets, 5, tm.tm_min);
87 rtas_st(rets, 6, tm.tm_sec);
e5dad1d7 88 rtas_st(rets, 7, ns);
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89}
90
28e02042 91static void rtas_set_time_of_day(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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92 uint32_t token, uint32_t nargs,
93 target_ulong args,
94 uint32_t nret, target_ulong rets)
95{
147ff807 96 sPAPRRTCState *rtc = &spapr->rtc;
12f42174 97 struct tm tm;
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98 time_t new_s;
99 int64_t host_ns;
12f42174 100
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101 if ((nargs != 7) || (nret != 1)) {
102 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
103 return;
104 }
105
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106 tm.tm_year = rtas_ld(args, 0) - 1900;
107 tm.tm_mon = rtas_ld(args, 1) - 1;
108 tm.tm_mday = rtas_ld(args, 2);
109 tm.tm_hour = rtas_ld(args, 3);
110 tm.tm_min = rtas_ld(args, 4);
111 tm.tm_sec = rtas_ld(args, 5);
112
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113 new_s = mktimegm(&tm);
114 if (new_s == -1) {
115 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
116 return;
117 }
118
119 /* Generate a monitor event for the change */
12f42174 120 qapi_event_send_rtc_change(qemu_timedate_diff(&tm), &error_abort);
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121
122 host_ns = qemu_clock_get_ns(rtc_clock);
123
13566fe3 124 rtc->ns_offset = (new_s * NANOSECONDS_PER_SECOND) - host_ns;
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125
126 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
127}
128
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129static void spapr_rtc_qom_date(Object *obj, struct tm *current_tm, Error **errp)
130{
147ff807 131 spapr_rtc_read(SPAPR_RTC(obj), current_tm, NULL);
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132}
133
28df36a1 134static void spapr_rtc_realize(DeviceState *dev, Error **errp)
12f42174 135{
880ae7de 136 sPAPRRTCState *rtc = SPAPR_RTC(dev);
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137 struct tm tm;
138 time_t host_s;
139 int64_t rtc_ns;
140
141 /* Initialize the RTAS RTC from host time */
142
143 qemu_get_timedate(&tm, 0);
144 host_s = mktimegm(&tm);
145 rtc_ns = qemu_clock_get_ns(rtc_clock);
13566fe3 146 rtc->ns_offset = host_s * NANOSECONDS_PER_SECOND - rtc_ns;
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147
148 object_property_add_tm(OBJECT(rtc), "date", spapr_rtc_qom_date, NULL);
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149}
150
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151static const VMStateDescription vmstate_spapr_rtc = {
152 .name = "spapr/rtc",
153 .version_id = 1,
154 .minimum_version_id = 1,
155 .fields = (VMStateField[]) {
156 VMSTATE_INT64(ns_offset, sPAPRRTCState),
157 VMSTATE_END_OF_LIST()
158 },
159};
160
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161static void spapr_rtc_class_init(ObjectClass *oc, void *data)
162{
163 DeviceClass *dc = DEVICE_CLASS(oc);
164
165 dc->realize = spapr_rtc_realize;
880ae7de 166 dc->vmsd = &vmstate_spapr_rtc;
f01c5d84 167
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168 spapr_rtas_register(RTAS_GET_TIME_OF_DAY, "get-time-of-day",
169 rtas_get_time_of_day);
170 spapr_rtas_register(RTAS_SET_TIME_OF_DAY, "set-time-of-day",
171 rtas_set_time_of_day);
172}
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173
174static const TypeInfo spapr_rtc_info = {
175 .name = TYPE_SPAPR_RTC,
147ff807 176 .parent = TYPE_DEVICE,
28df36a1 177 .instance_size = sizeof(sPAPRRTCState),
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178 .class_init = spapr_rtc_class_init,
179};
180
181static void spapr_rtc_register_types(void)
182{
183 type_register_static(&spapr_rtc_info);
184}
185type_init(spapr_rtc_register_types)
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