[qemu.git] / hw / sh_intc.c

/*
 * SuperH interrupt controller module
 *
 * Copyright (c) 2007 Magnus Damm
 * Based on sh_timer.c and arm_timer.c by Paul Brook
 * Copyright (c) 2005-2006 CodeSourcery.
 *
 * This code is licenced under the GPL.
 */

#include <assert.h>
#include "sh_intc.h"
#include "hw.h"
#include "sh.h"

//#define DEBUG_INTC

#define INTC_A7(x) ((x) & 0x1fffffff)
#define INTC_ARRAY(x) (sizeof(x) / sizeof(x[0]))

#define INTC_MODE_NONE       0
#define INTC_MODE_DUAL_SET   1
#define INTC_MODE_DUAL_CLR   2
#define INTC_MODE_ENABLE_REG 3
#define INTC_MODE_MASK_REG   4
#define INTC_MODE_IS_PRIO    8

static unsigned int sh_intc_mode(unsigned long address,
				 unsigned long set_reg, unsigned long clr_reg)
{
    if ((address != INTC_A7(set_reg)) &&
	(address != INTC_A7(clr_reg)))
        return INTC_MODE_NONE;

    if (set_reg && clr_reg) {
        if (address == INTC_A7(set_reg))
            return INTC_MODE_DUAL_SET;
	else
            return INTC_MODE_DUAL_CLR;
    }

    if (set_reg)
        return INTC_MODE_ENABLE_REG;
    else
        return INTC_MODE_MASK_REG;
}

static void sh_intc_locate(struct intc_desc *desc,
			   unsigned long address,
			   unsigned long **datap,
			   intc_enum **enums,
			   unsigned int *first,
			   unsigned int *width,
			   unsigned int *modep)
{
    unsigned int i, mode;

    /* this is slow but works for now */

    if (desc->mask_regs) {
        for (i = 0; i < desc->nr_mask_regs; i++) {
	    struct intc_mask_reg *mr = desc->mask_regs + i;

	    mode = sh_intc_mode(address, mr->set_reg, mr->clr_reg);
	    if (mode == INTC_MODE_NONE)
                continue;

	    *modep = mode;
	    *datap = &mr->value;
	    *enums = mr->enum_ids;
	    *first = mr->reg_width - 1;
	    *width = 1;
	    return;
	}
    }

    if (desc->prio_regs) {
        for (i = 0; i < desc->nr_prio_regs; i++) {
	    struct intc_prio_reg *pr = desc->prio_regs + i;

	    mode = sh_intc_mode(address, pr->set_reg, pr->clr_reg);
	    if (mode == INTC_MODE_NONE)
                continue;

	    *modep = mode | INTC_MODE_IS_PRIO;
	    *datap = &pr->value;
	    *enums = pr->enum_ids;
	    *first = (pr->reg_width / pr->field_width) - 1;
	    *width = pr->field_width;
	    return;
	}
    }

    assert(0);
}

static void sh_intc_toggle(struct intc_desc *desc, intc_enum id,
			   int enable, int is_group)
{
    struct intc_source *source = desc->sources + id;
    int old = source->enable_count;

    if (!id)
	return;

    if (!source->next_enum_id && (!source->enable_max || !source->vect)) {
#ifdef DEBUG_INTC
        printf("sh_intc: reserved interrupt source %d modified\n", id);
#endif
	return;
    }

    if (source->vect) {
        if (enable)
            source->enable_count++;
	else 
            source->enable_count--;

        if (source->enable_count == source->enable_max) {
#ifdef DEBUG_INTC
            printf("sh_intc: enabling interrupt source %d -> 0x%04x\n",
		   id, source->vect);
#endif
	}

        if (old == source->enable_max) {
#ifdef DEBUG_INTC
            printf("sh_intc: disabling interrupt source %d -> 0x%04x\n",
		   id, source->vect);
#endif
	}
    }
#ifdef DEBUG_INTC
    else {
        printf("setting interrupt group %d to %d\n", id, !!enable);
    }
#endif

    if ((is_group || !source->vect) && source->next_enum_id) {
        sh_intc_toggle(desc, source->next_enum_id, enable, 1);
    }

#ifdef DEBUG_INTC
    if (!source->vect) {
        printf("setting interrupt group %d to %d - done\n", id, !!enable);
    }
#endif
}

static uint32_t sh_intc_read(void *opaque, target_phys_addr_t offset)
{
    struct intc_desc *desc = opaque;
    intc_enum *enum_ids = NULL;
    unsigned int first = 0;
    unsigned int width = 0;
    unsigned int mode = 0;
    unsigned long *valuep;

#ifdef DEBUG_INTC
    printf("sh_intc_read 0x%lx\n", (unsigned long) offset);
#endif

    sh_intc_locate(desc, (unsigned long)offset, &valuep, 
		   &enum_ids, &first, &width, &mode);
    return *valuep;
}

static void sh_intc_write(void *opaque, target_phys_addr_t offset,
			  uint32_t value)
{
    struct intc_desc *desc = opaque;
    intc_enum *enum_ids = NULL;
    unsigned int first = 0;
    unsigned int width = 0;
    unsigned int mode = 0;
    unsigned int k;
    unsigned long *valuep;
    unsigned long mask;

#ifdef DEBUG_INTC
    printf("sh_intc_write 0x%lx 0x%08x\n", (unsigned long) offset, value);
#endif

    sh_intc_locate(desc, (unsigned long)offset, &valuep, 
		   &enum_ids, &first, &width, &mode);

    switch (mode) {
    case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO: break;
    case INTC_MODE_DUAL_SET: value |= *valuep; break;
    case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
    default: assert(0);
    }

    for (k = 0; k <= first; k++) {
        mask = ((1 << width) - 1) << ((first - k) * width);

	if ((*valuep & mask) == (value & mask))
            continue;
#if 0
	printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n", 
	       k, first, enum_ids[k], (unsigned int)mask);
#endif
        sh_intc_toggle(desc, enum_ids[k], value & mask, 0);
    }

    *valuep = value;

#ifdef DEBUG_INTC
    printf("sh_intc_write 0x%lx -> 0x%08x\n", (unsigned long) offset, value);
#endif
}

static CPUReadMemoryFunc *sh_intc_readfn[] = {
    sh_intc_read,
    sh_intc_read,
    sh_intc_read
};

static CPUWriteMemoryFunc *sh_intc_writefn[] = {
    sh_intc_write,
    sh_intc_write,
    sh_intc_write
};

struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id)
{
    if (id)
        return desc->sources + id;

    return NULL;
}

static void sh_intc_register(struct intc_desc *desc, 
			     unsigned long address)
{
    if (address)
        cpu_register_physical_memory(INTC_A7(address), 4, desc->iomemtype);
}

static void sh_intc_register_source(struct intc_desc *desc,
				    intc_enum source,
				    struct intc_group *groups,
				    int nr_groups)
{
    unsigned int i, k;
    struct intc_source *s;

    if (desc->mask_regs) {
        for (i = 0; i < desc->nr_mask_regs; i++) {
	    struct intc_mask_reg *mr = desc->mask_regs + i;

	    for (k = 0; k < INTC_ARRAY(mr->enum_ids); k++) {
                if (mr->enum_ids[k] != source)
                    continue;

		s = sh_intc_source(desc, mr->enum_ids[k]);
		if (s)
                    s->enable_max++;
	    }
	}
    }

    if (desc->prio_regs) {
        for (i = 0; i < desc->nr_prio_regs; i++) {
	    struct intc_prio_reg *pr = desc->prio_regs + i;

	    for (k = 0; k < INTC_ARRAY(pr->enum_ids); k++) {
                if (pr->enum_ids[k] != source)
                    continue;

		s = sh_intc_source(desc, pr->enum_ids[k]);
		if (s)
                    s->enable_max++;
	    }
	}
    }

    if (groups) {
        for (i = 0; i < nr_groups; i++) {
	    struct intc_group *gr = groups + i;

	    for (k = 0; k < INTC_ARRAY(gr->enum_ids); k++) {
                if (gr->enum_ids[k] != source)
                    continue;

		s = sh_intc_source(desc, gr->enum_ids[k]);
		if (s)
                    s->enable_max++;
	    }
	}
    }

}

void sh_intc_register_sources(struct intc_desc *desc,
			      struct intc_vect *vectors,
			      int nr_vectors,
			      struct intc_group *groups,
			      int nr_groups)
{
    unsigned int i, k;
    struct intc_source *s;

    for (i = 0; i < nr_vectors; i++) {
	struct intc_vect *vect = vectors + i;

	sh_intc_register_source(desc, vect->enum_id, groups, nr_groups);
	s = sh_intc_source(desc, vect->enum_id);
	if (s)
	    s->vect = vect->vect;

#ifdef DEBUG_INTC
	printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n",
	       vect->enum_id, s->vect, s->enable_count, s->enable_max);
#endif
    }

    if (groups) {
        for (i = 0; i < nr_groups; i++) {
	    struct intc_group *gr = groups + i;

	    s = sh_intc_source(desc, gr->enum_id);
	    s->next_enum_id = gr->enum_ids[0];

	    for (k = 1; k < INTC_ARRAY(gr->enum_ids); k++) {
                if (!gr->enum_ids[k])
                    continue;

		s = sh_intc_source(desc, gr->enum_ids[k - 1]);
		s->next_enum_id = gr->enum_ids[k];
	    }

#ifdef DEBUG_INTC
	    printf("sh_intc: registered group %d (%d/%d)\n",
		   gr->enum_id, s->enable_count, s->enable_max);
#endif
	}
    }
}

int sh_intc_init(struct intc_desc *desc,
		 int nr_sources,
		 struct intc_mask_reg *mask_regs,
		 int nr_mask_regs,
		 struct intc_prio_reg *prio_regs,
		 int nr_prio_regs)
{
    unsigned int i;

    desc->nr_sources = nr_sources;
    desc->mask_regs = mask_regs;
    desc->nr_mask_regs = nr_mask_regs;
    desc->prio_regs = prio_regs;
    desc->nr_prio_regs = nr_prio_regs;

    i = sizeof(struct intc_source) * nr_sources;
    desc->sources = malloc(i);
    if (!desc->sources)
        return -1;

    memset(desc->sources, 0, i);
 
    desc->iomemtype = cpu_register_io_memory(0, sh_intc_readfn,
					     sh_intc_writefn, desc);
    if (desc->mask_regs) {
        for (i = 0; i < desc->nr_mask_regs; i++) {
	    struct intc_mask_reg *mr = desc->mask_regs + i;

	    sh_intc_register(desc, mr->set_reg);
	    sh_intc_register(desc, mr->clr_reg);
	}
    }

    if (desc->prio_regs) {
        for (i = 0; i < desc->nr_prio_regs; i++) {
	    struct intc_prio_reg *pr = desc->prio_regs + i;

	    sh_intc_register(desc, pr->set_reg);
	    sh_intc_register(desc, pr->clr_reg);
	}
    }

    return 0;
}
Commit	Line	Data
80f515e6 AZ	1	/*
	2	* SuperH interrupt controller module
	3	*
	4	* Copyright (c) 2007 Magnus Damm
	5	* Based on sh_timer.c and arm_timer.c by Paul Brook
	6	* Copyright (c) 2005-2006 CodeSourcery.
	7	*
	8	* This code is licenced under the GPL.
	9	*/
	10
	11	#include <assert.h>
	12	#include "sh_intc.h"
87ecb68b PB	13	#include "hw.h"
87ecb68b PB	14	#include "sh.h"
80f515e6 AZ	15
	16	//#define DEBUG_INTC
	17
	18	#define INTC_A7(x) ((x) & 0x1fffffff)
	19	#define INTC_ARRAY(x) (sizeof(x) / sizeof(x[0]))
	20
	21	#define INTC_MODE_NONE 0
	22	#define INTC_MODE_DUAL_SET 1
	23	#define INTC_MODE_DUAL_CLR 2
	24	#define INTC_MODE_ENABLE_REG 3
	25	#define INTC_MODE_MASK_REG 4
	26	#define INTC_MODE_IS_PRIO 8
	27
	28	static unsigned int sh_intc_mode(unsigned long address,
	29	unsigned long set_reg, unsigned long clr_reg)
	30	{
	31	if ((address != INTC_A7(set_reg)) &&
	32	(address != INTC_A7(clr_reg)))
	33	return INTC_MODE_NONE;
	34
	35	if (set_reg && clr_reg) {
	36	if (address == INTC_A7(set_reg))
	37	return INTC_MODE_DUAL_SET;
	38	else
	39	return INTC_MODE_DUAL_CLR;
	40	}
	41
	42	if (set_reg)
	43	return INTC_MODE_ENABLE_REG;
	44	else
	45	return INTC_MODE_MASK_REG;
	46	}
	47
	48	static void sh_intc_locate(struct intc_desc *desc,
	49	unsigned long address,
	50	unsigned long **datap,
	51	intc_enum **enums,
	52	unsigned int *first,
	53	unsigned int *width,
	54	unsigned int *modep)
	55	{
	56	unsigned int i, mode;
	57
	58	/* this is slow but works for now */
	59
	60	if (desc->mask_regs) {
	61	for (i = 0; i < desc->nr_mask_regs; i++) {
	62	struct intc_mask_reg *mr = desc->mask_regs + i;
	63
	64	mode = sh_intc_mode(address, mr->set_reg, mr->clr_reg);
	65	if (mode == INTC_MODE_NONE)
	66	continue;
	67
	68	*modep = mode;
	69	*datap = &mr->value;
	70	*enums = mr->enum_ids;
	71	*first = mr->reg_width - 1;
	72	*width = 1;
	73	return;
	74	}
	75	}
	76
	77	if (desc->prio_regs) {
	78	for (i = 0; i < desc->nr_prio_regs; i++) {
79	struct intc_prio_reg *pr = desc->prio_regs + i;
80
81	mode = sh_intc_mode(address, pr->set_reg, pr->clr_reg);
82	if (mode == INTC_MODE_NONE)
83	continue;
84
85	*modep = mode \| INTC_MODE_IS_PRIO;
86	*datap = &pr->value;
87	*enums = pr->enum_ids;
88	*first = (pr->reg_width / pr->field_width) - 1;
89	*width = pr->field_width;
90	return;
91	}
92	}
93
94	assert(0);
95	}
96
97	static void sh_intc_toggle(struct intc_desc *desc, intc_enum id,
98	int enable, int is_group)
99	{
100	struct intc_source *source = desc->sources + id;
101	int old = source->enable_count;
102
103	if (!id)
104	return;
105
106	if (!source->next_enum_id && (!source->enable_max \|\| !source->vect)) {
107	#ifdef DEBUG_INTC
108	printf("sh_intc: reserved interrupt source %d modified\n", id);
109	#endif
110	return;
111	}
112
113	if (source->vect) {
114	if (enable)
115	source->enable_count++;
116	else
117	source->enable_count--;
118
119	if (source->enable_count == source->enable_max) {
120	#ifdef DEBUG_INTC
121	printf("sh_intc: enabling interrupt source %d -> 0x%04x\n",
122	id, source->vect);
123	#endif
124	}
125
126	if (old == source->enable_max) {
127	#ifdef DEBUG_INTC
128	printf("sh_intc: disabling interrupt source %d -> 0x%04x\n",
129	id, source->vect);
130	#endif
131	}
132	}
133	#ifdef DEBUG_INTC
134	else {
135	printf("setting interrupt group %d to %d\n", id, !!enable);
136	}
137	#endif
138
139	if ((is_group \|\| !source->vect) && source->next_enum_id) {
140	sh_intc_toggle(desc, source->next_enum_id, enable, 1);
141	}
142
143	#ifdef DEBUG_INTC
144	if (!source->vect) {
145	printf("setting interrupt group %d to %d - done\n", id, !!enable);
146	}
147	#endif
148	}
149
150	static uint32_t sh_intc_read(void *opaque, target_phys_addr_t offset)
151	{
152	struct intc_desc *desc = opaque;
153	intc_enum *enum_ids = NULL;
154	unsigned int first = 0;
155	unsigned int width = 0;
156	unsigned int mode = 0;
157	unsigned long *valuep;
158
159	#ifdef DEBUG_INTC
160	printf("sh_intc_read 0x%lx\n", (unsigned long) offset);
161	#endif
162
163	sh_intc_locate(desc, (unsigned long)offset, &valuep,
164	&enum_ids, &first, &width, &mode);
165	return *valuep;
166	}
167
168	static void sh_intc_write(void *opaque, target_phys_addr_t offset,
169	uint32_t value)
170	{
171	struct intc_desc *desc = opaque;
172	intc_enum *enum_ids = NULL;
173	unsigned int first = 0;
174	unsigned int width = 0;
175	unsigned int mode = 0;
176	unsigned int k;
177	unsigned long *valuep;
178	unsigned long mask;
179
180	#ifdef DEBUG_INTC
181	printf("sh_intc_write 0x%lx 0x%08x\n", (unsigned long) offset, value);
182	#endif
183
184	sh_intc_locate(desc, (unsigned long)offset, &valuep,
185	&enum_ids, &first, &width, &mode);
186
187	switch (mode) {
188	case INTC_MODE_ENABLE_REG \| INTC_MODE_IS_PRIO: break;
189	case INTC_MODE_DUAL_SET: value \|= *valuep; break;
190	case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
191	default: assert(0);
192	}
193
194	for (k = 0; k <= first; k++) {
195	mask = ((1 << width) - 1) << ((first - k) * width);
196
197	if ((*valuep & mask) == (value & mask))
198	continue;
199	#if 0
200	printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n",
201	k, first, enum_ids[k], (unsigned int)mask);
202	#endif
203	sh_intc_toggle(desc, enum_ids[k], value & mask, 0);
204	}
205
206	*valuep = value;
207
208	#ifdef DEBUG_INTC
209	printf("sh_intc_write 0x%lx -> 0x%08x\n", (unsigned long) offset, value);
210	#endif
211	}
212
213	static CPUReadMemoryFunc *sh_intc_readfn[] = {
214	sh_intc_read,
215	sh_intc_read,
216	sh_intc_read
217	};
218
219	static CPUWriteMemoryFunc *sh_intc_writefn[] = {
220	sh_intc_write,
221	sh_intc_write,
222	sh_intc_write
223	};
224
225	struct intc_source sh_intc_source(struct intc_desc desc, intc_enum id)
226	{
227	if (id)
228	return desc->sources + id;
229
230	return NULL;
231	}
232
233	static void sh_intc_register(struct intc_desc *desc,
234	unsigned long address)
235	{
236	if (address)
237	cpu_register_physical_memory(INTC_A7(address), 4, desc->iomemtype);
238	}
239
240	static void sh_intc_register_source(struct intc_desc *desc,
241	intc_enum source,
242	struct intc_group *groups,
243	int nr_groups)
244	{
245	unsigned int i, k;
246	struct intc_source *s;
247
248	if (desc->mask_regs) {
249	for (i = 0; i < desc->nr_mask_regs; i++) {
250	struct intc_mask_reg *mr = desc->mask_regs + i;
251
252	for (k = 0; k < INTC_ARRAY(mr->enum_ids); k++) {
253	if (mr->enum_ids[k] != source)
254	continue;
255
256	s = sh_intc_source(desc, mr->enum_ids[k]);
257	if (s)
258	s->enable_max++;
259	}
260	}
261	}
262
263	if (desc->prio_regs) {
264	for (i = 0; i < desc->nr_prio_regs; i++) {
265	struct intc_prio_reg *pr = desc->prio_regs + i;
266
267	for (k = 0; k < INTC_ARRAY(pr->enum_ids); k++) {
268	if (pr->enum_ids[k] != source)
269	continue;
270
271	s = sh_intc_source(desc, pr->enum_ids[k]);
272	if (s)
273	s->enable_max++;
274	}
275	}
276	}
277
278	if (groups) {
279	for (i = 0; i < nr_groups; i++) {
280	struct intc_group *gr = groups + i;
281
282	for (k = 0; k < INTC_ARRAY(gr->enum_ids); k++) {
283	if (gr->enum_ids[k] != source)
284	continue;
285
286	s = sh_intc_source(desc, gr->enum_ids[k]);
287	if (s)
288	s->enable_max++;
289	}
290	}
291	}
292
293	}
294
295	void sh_intc_register_sources(struct intc_desc *desc,
296	struct intc_vect *vectors,
297	int nr_vectors,
298	struct intc_group *groups,
299	int nr_groups)
300	{
301	unsigned int i, k;
302	struct intc_source *s;
303
304	for (i = 0; i < nr_vectors; i++) {
305	struct intc_vect *vect = vectors + i;
306
307	sh_intc_register_source(desc, vect->enum_id, groups, nr_groups);
308	s = sh_intc_source(desc, vect->enum_id);
309	if (s)
310	s->vect = vect->vect;
311
312	#ifdef DEBUG_INTC
313	printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n",
314	vect->enum_id, s->vect, s->enable_count, s->enable_max);
315	#endif
316	}
317
318	if (groups) {
319	for (i = 0; i < nr_groups; i++) {
320	struct intc_group *gr = groups + i;
321
322	s = sh_intc_source(desc, gr->enum_id);
323	s->next_enum_id = gr->enum_ids[0];
324
325	for (k = 1; k < INTC_ARRAY(gr->enum_ids); k++) {
326	if (!gr->enum_ids[k])
327	continue;
328
329	s = sh_intc_source(desc, gr->enum_ids[k - 1]);
330	s->next_enum_id = gr->enum_ids[k];
331	}
332
333	#ifdef DEBUG_INTC
334	printf("sh_intc: registered group %d (%d/%d)\n",
335	gr->enum_id, s->enable_count, s->enable_max);
336	#endif
337	}
338	}
339	}
340
341	int sh_intc_init(struct intc_desc *desc,
342	int nr_sources,
343	struct intc_mask_reg *mask_regs,
344	int nr_mask_regs,
345	struct intc_prio_reg *prio_regs,
346	int nr_prio_regs)
347	{
348	unsigned int i;
349
350	desc->nr_sources = nr_sources;
351	desc->mask_regs = mask_regs;
352	desc->nr_mask_regs = nr_mask_regs;
353	desc->prio_regs = prio_regs;
354	desc->nr_prio_regs = nr_prio_regs;
355
356	i = sizeof(struct intc_source) * nr_sources;
357	desc->sources = malloc(i);
358	if (!desc->sources)
359	return -1;
360
361	memset(desc->sources, 0, i);
362
363	desc->iomemtype = cpu_register_io_memory(0, sh_intc_readfn,
364	sh_intc_writefn, desc);
365	if (desc->mask_regs) {
366	for (i = 0; i < desc->nr_mask_regs; i++) {
367	struct intc_mask_reg *mr = desc->mask_regs + i;
368
369	sh_intc_register(desc, mr->set_reg);
370	sh_intc_register(desc, mr->clr_reg);
371	}
372	}
373
374	if (desc->prio_regs) {
375	for (i = 0; i < desc->nr_prio_regs; i++) {
376	struct intc_prio_reg *pr = desc->prio_regs + i;
377
378	sh_intc_register(desc, pr->set_reg);
379	sh_intc_register(desc, pr->clr_reg);
380	}
381	}
382
383	return 0;
384	}