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Commit | Line | Data |
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244ab90e AL |
1 | /* |
2 | * DMA helper functions | |
3 | * | |
4 | * Copyright (c) 2009 Red Hat | |
5 | * | |
6 | * This work is licensed under the terms of the GNU General Public License | |
7 | * (GNU GPL), version 2 or later. | |
8 | */ | |
9 | ||
d38ea87a | 10 | #include "qemu/osdep.h" |
4be74634 | 11 | #include "sysemu/block-backend.h" |
9c17d615 | 12 | #include "sysemu/dma.h" |
c57c4658 | 13 | #include "trace.h" |
1de7afc9 | 14 | #include "qemu/thread.h" |
6a1751b7 | 15 | #include "qemu/main-loop.h" |
244ab90e | 16 | |
e5332e63 DG |
17 | /* #define DEBUG_IOMMU */ |
18 | ||
df32fd1c | 19 | int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len) |
d86a77f8 | 20 | { |
df32fd1c | 21 | dma_barrier(as, DMA_DIRECTION_FROM_DEVICE); |
24addbc7 | 22 | |
d86a77f8 DG |
23 | #define FILLBUF_SIZE 512 |
24 | uint8_t fillbuf[FILLBUF_SIZE]; | |
25 | int l; | |
24addbc7 | 26 | bool error = false; |
d86a77f8 DG |
27 | |
28 | memset(fillbuf, c, FILLBUF_SIZE); | |
29 | while (len > 0) { | |
30 | l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; | |
5c9eb028 PM |
31 | error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED, |
32 | fillbuf, l, true); | |
bc9b78de BH |
33 | len -= l; |
34 | addr += l; | |
d86a77f8 | 35 | } |
e5332e63 | 36 | |
24addbc7 | 37 | return error; |
d86a77f8 DG |
38 | } |
39 | ||
f487b677 PB |
40 | void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint, |
41 | AddressSpace *as) | |
244ab90e | 42 | { |
7267c094 | 43 | qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry)); |
244ab90e AL |
44 | qsg->nsg = 0; |
45 | qsg->nalloc = alloc_hint; | |
46 | qsg->size = 0; | |
df32fd1c | 47 | qsg->as = as; |
f487b677 PB |
48 | qsg->dev = dev; |
49 | object_ref(OBJECT(dev)); | |
244ab90e AL |
50 | } |
51 | ||
d3231181 | 52 | void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len) |
244ab90e AL |
53 | { |
54 | if (qsg->nsg == qsg->nalloc) { | |
55 | qsg->nalloc = 2 * qsg->nalloc + 1; | |
7267c094 | 56 | qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry)); |
244ab90e AL |
57 | } |
58 | qsg->sg[qsg->nsg].base = base; | |
59 | qsg->sg[qsg->nsg].len = len; | |
60 | qsg->size += len; | |
61 | ++qsg->nsg; | |
62 | } | |
63 | ||
64 | void qemu_sglist_destroy(QEMUSGList *qsg) | |
65 | { | |
f487b677 | 66 | object_unref(OBJECT(qsg->dev)); |
7267c094 | 67 | g_free(qsg->sg); |
ea8d82a1 | 68 | memset(qsg, 0, sizeof(*qsg)); |
244ab90e AL |
69 | } |
70 | ||
59a703eb | 71 | typedef struct { |
7c84b1b8 | 72 | BlockAIOCB common; |
8a8e63eb | 73 | AioContext *ctx; |
7c84b1b8 | 74 | BlockAIOCB *acb; |
59a703eb | 75 | QEMUSGList *sg; |
d4f510eb | 76 | uint64_t offset; |
43cf8ae6 | 77 | DMADirection dir; |
59a703eb | 78 | int sg_cur_index; |
d3231181 | 79 | dma_addr_t sg_cur_byte; |
59a703eb AL |
80 | QEMUIOVector iov; |
81 | QEMUBH *bh; | |
cb144ccb | 82 | DMAIOFunc *io_func; |
8a8e63eb | 83 | void *io_func_opaque; |
37b7842c | 84 | } DMAAIOCB; |
59a703eb | 85 | |
4be74634 | 86 | static void dma_blk_cb(void *opaque, int ret); |
59a703eb AL |
87 | |
88 | static void reschedule_dma(void *opaque) | |
89 | { | |
37b7842c | 90 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; |
59a703eb AL |
91 | |
92 | qemu_bh_delete(dbs->bh); | |
93 | dbs->bh = NULL; | |
4be74634 | 94 | dma_blk_cb(dbs, 0); |
59a703eb AL |
95 | } |
96 | ||
4be74634 | 97 | static void dma_blk_unmap(DMAAIOCB *dbs) |
59a703eb | 98 | { |
59a703eb AL |
99 | int i; |
100 | ||
59a703eb | 101 | for (i = 0; i < dbs->iov.niov; ++i) { |
df32fd1c | 102 | dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base, |
c65bcef3 DG |
103 | dbs->iov.iov[i].iov_len, dbs->dir, |
104 | dbs->iov.iov[i].iov_len); | |
59a703eb | 105 | } |
c3adb5b9 PB |
106 | qemu_iovec_reset(&dbs->iov); |
107 | } | |
108 | ||
109 | static void dma_complete(DMAAIOCB *dbs, int ret) | |
110 | { | |
c57c4658 KW |
111 | trace_dma_complete(dbs, ret, dbs->common.cb); |
112 | ||
4be74634 | 113 | dma_blk_unmap(dbs); |
c3adb5b9 PB |
114 | if (dbs->common.cb) { |
115 | dbs->common.cb(dbs->common.opaque, ret); | |
116 | } | |
117 | qemu_iovec_destroy(&dbs->iov); | |
118 | if (dbs->bh) { | |
119 | qemu_bh_delete(dbs->bh); | |
120 | dbs->bh = NULL; | |
121 | } | |
8007429a | 122 | qemu_aio_unref(dbs); |
7403b14e AL |
123 | } |
124 | ||
4be74634 | 125 | static void dma_blk_cb(void *opaque, int ret) |
7403b14e AL |
126 | { |
127 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; | |
c65bcef3 | 128 | dma_addr_t cur_addr, cur_len; |
7403b14e AL |
129 | void *mem; |
130 | ||
4be74634 | 131 | trace_dma_blk_cb(dbs, ret); |
c57c4658 | 132 | |
7403b14e | 133 | dbs->acb = NULL; |
d4f510eb | 134 | dbs->offset += dbs->iov.size; |
59a703eb AL |
135 | |
136 | if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) { | |
c3adb5b9 | 137 | dma_complete(dbs, ret); |
59a703eb AL |
138 | return; |
139 | } | |
4be74634 | 140 | dma_blk_unmap(dbs); |
59a703eb AL |
141 | |
142 | while (dbs->sg_cur_index < dbs->sg->nsg) { | |
143 | cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte; | |
144 | cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte; | |
df32fd1c | 145 | mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir); |
59a703eb AL |
146 | if (!mem) |
147 | break; | |
148 | qemu_iovec_add(&dbs->iov, mem, cur_len); | |
149 | dbs->sg_cur_byte += cur_len; | |
150 | if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) { | |
151 | dbs->sg_cur_byte = 0; | |
152 | ++dbs->sg_cur_index; | |
153 | } | |
154 | } | |
155 | ||
156 | if (dbs->iov.size == 0) { | |
c57c4658 | 157 | trace_dma_map_wait(dbs); |
8a8e63eb | 158 | dbs->bh = aio_bh_new(dbs->ctx, reschedule_dma, dbs); |
e95205e1 | 159 | cpu_register_map_client(dbs->bh); |
59a703eb AL |
160 | return; |
161 | } | |
162 | ||
58f423fb KW |
163 | if (dbs->iov.size & ~BDRV_SECTOR_MASK) { |
164 | qemu_iovec_discard_back(&dbs->iov, dbs->iov.size & ~BDRV_SECTOR_MASK); | |
165 | } | |
166 | ||
8a8e63eb PB |
167 | dbs->acb = dbs->io_func(dbs->offset, &dbs->iov, |
168 | dma_blk_cb, dbs, dbs->io_func_opaque); | |
6bee44ea | 169 | assert(dbs->acb); |
59a703eb AL |
170 | } |
171 | ||
7c84b1b8 | 172 | static void dma_aio_cancel(BlockAIOCB *acb) |
c16b5a2c CH |
173 | { |
174 | DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common); | |
175 | ||
c57c4658 KW |
176 | trace_dma_aio_cancel(dbs); |
177 | ||
c16b5a2c | 178 | if (dbs->acb) { |
4be74634 | 179 | blk_aio_cancel_async(dbs->acb); |
c16b5a2c | 180 | } |
e95205e1 FZ |
181 | if (dbs->bh) { |
182 | cpu_unregister_map_client(dbs->bh); | |
183 | qemu_bh_delete(dbs->bh); | |
184 | dbs->bh = NULL; | |
185 | } | |
c16b5a2c CH |
186 | } |
187 | ||
9bb9da46 | 188 | |
d7331bed | 189 | static const AIOCBInfo dma_aiocb_info = { |
c16b5a2c | 190 | .aiocb_size = sizeof(DMAAIOCB), |
9bb9da46 | 191 | .cancel_async = dma_aio_cancel, |
c16b5a2c CH |
192 | }; |
193 | ||
8a8e63eb PB |
194 | BlockAIOCB *dma_blk_io(AioContext *ctx, |
195 | QEMUSGList *sg, uint64_t offset, | |
196 | DMAIOFunc *io_func, void *io_func_opaque, | |
197 | BlockCompletionFunc *cb, | |
43cf8ae6 | 198 | void *opaque, DMADirection dir) |
59a703eb | 199 | { |
8a8e63eb | 200 | DMAAIOCB *dbs = qemu_aio_get(&dma_aiocb_info, NULL, cb, opaque); |
59a703eb | 201 | |
8a8e63eb | 202 | trace_dma_blk_io(dbs, io_func_opaque, offset, (dir == DMA_DIRECTION_TO_DEVICE)); |
c57c4658 | 203 | |
37b7842c | 204 | dbs->acb = NULL; |
59a703eb | 205 | dbs->sg = sg; |
8a8e63eb | 206 | dbs->ctx = ctx; |
cbe0ed62 | 207 | dbs->offset = offset; |
59a703eb AL |
208 | dbs->sg_cur_index = 0; |
209 | dbs->sg_cur_byte = 0; | |
43cf8ae6 | 210 | dbs->dir = dir; |
cb144ccb | 211 | dbs->io_func = io_func; |
8a8e63eb | 212 | dbs->io_func_opaque = io_func_opaque; |
59a703eb AL |
213 | dbs->bh = NULL; |
214 | qemu_iovec_init(&dbs->iov, sg->nsg); | |
4be74634 | 215 | dma_blk_cb(dbs, 0); |
37b7842c | 216 | return &dbs->common; |
59a703eb AL |
217 | } |
218 | ||
219 | ||
8a8e63eb PB |
220 | static |
221 | BlockAIOCB *dma_blk_read_io_func(int64_t offset, QEMUIOVector *iov, | |
222 | BlockCompletionFunc *cb, void *cb_opaque, | |
223 | void *opaque) | |
224 | { | |
225 | BlockBackend *blk = opaque; | |
226 | return blk_aio_preadv(blk, offset, iov, 0, cb, cb_opaque); | |
227 | } | |
228 | ||
4be74634 | 229 | BlockAIOCB *dma_blk_read(BlockBackend *blk, |
cbe0ed62 | 230 | QEMUSGList *sg, uint64_t offset, |
4be74634 | 231 | void (*cb)(void *opaque, int ret), void *opaque) |
59a703eb | 232 | { |
8a8e63eb PB |
233 | return dma_blk_io(blk_get_aio_context(blk), |
234 | sg, offset, dma_blk_read_io_func, blk, cb, opaque, | |
4be74634 | 235 | DMA_DIRECTION_FROM_DEVICE); |
59a703eb AL |
236 | } |
237 | ||
8a8e63eb PB |
238 | static |
239 | BlockAIOCB *dma_blk_write_io_func(int64_t offset, QEMUIOVector *iov, | |
240 | BlockCompletionFunc *cb, void *cb_opaque, | |
241 | void *opaque) | |
242 | { | |
243 | BlockBackend *blk = opaque; | |
244 | return blk_aio_pwritev(blk, offset, iov, 0, cb, cb_opaque); | |
245 | } | |
246 | ||
4be74634 | 247 | BlockAIOCB *dma_blk_write(BlockBackend *blk, |
cbe0ed62 | 248 | QEMUSGList *sg, uint64_t offset, |
4be74634 | 249 | void (*cb)(void *opaque, int ret), void *opaque) |
59a703eb | 250 | { |
8a8e63eb PB |
251 | return dma_blk_io(blk_get_aio_context(blk), |
252 | sg, offset, dma_blk_write_io_func, blk, cb, opaque, | |
4be74634 | 253 | DMA_DIRECTION_TO_DEVICE); |
59a703eb | 254 | } |
8171ee35 PB |
255 | |
256 | ||
c65bcef3 DG |
257 | static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg, |
258 | DMADirection dir) | |
8171ee35 PB |
259 | { |
260 | uint64_t resid; | |
261 | int sg_cur_index; | |
262 | ||
263 | resid = sg->size; | |
264 | sg_cur_index = 0; | |
265 | len = MIN(len, resid); | |
266 | while (len > 0) { | |
267 | ScatterGatherEntry entry = sg->sg[sg_cur_index++]; | |
268 | int32_t xfer = MIN(len, entry.len); | |
df32fd1c | 269 | dma_memory_rw(sg->as, entry.base, ptr, xfer, dir); |
8171ee35 PB |
270 | ptr += xfer; |
271 | len -= xfer; | |
272 | resid -= xfer; | |
273 | } | |
274 | ||
275 | return resid; | |
276 | } | |
277 | ||
278 | uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
279 | { | |
c65bcef3 | 280 | return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE); |
8171ee35 PB |
281 | } |
282 | ||
283 | uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
284 | { | |
c65bcef3 | 285 | return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE); |
8171ee35 | 286 | } |
84a69356 | 287 | |
4be74634 | 288 | void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie, |
84a69356 PB |
289 | QEMUSGList *sg, enum BlockAcctType type) |
290 | { | |
4be74634 | 291 | block_acct_start(blk_get_stats(blk), cookie, sg->size, type); |
84a69356 | 292 | } |