[qemu.git] / target-ppc / gdbstub.c

/*
 * PowerPC gdb server stub
 *
 * Copyright (c) 2003-2005 Fabrice Bellard
 * Copyright (c) 2013 SUSE LINUX Products GmbH
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"

static int ppc_gdb_register_len_apple(int n)
{
    switch (n) {
    case 0 ... 31:
        /* gprs */
        return 8;
    case 32 ... 63:
        /* fprs */
        return 8;
    case 64 ... 95:
        return 16;
    case 64+32: /* nip */
    case 65+32: /* msr */
    case 67+32: /* lr */
    case 68+32: /* ctr */
    case 69+32: /* xer */
    case 70+32: /* fpscr */
        return 8;
    case 66+32: /* cr */
        return 4;
    default:
        return 0;
    }
}

static int ppc_gdb_register_len(int n)
{
    switch (n) {
    case 0 ... 31:
        /* gprs */
        return sizeof(target_ulong);
    case 32 ... 63:
        /* fprs */
        if (gdb_has_xml) {
            return 0;
        }
        return 8;
    case 66:
        /* cr */
        return 4;
    case 64:
        /* nip */
    case 65:
        /* msr */
    case 67:
        /* lr */
    case 68:
        /* ctr */
    case 69:
        /* xer */
        return sizeof(target_ulong);
    case 70:
        /* fpscr */
        if (gdb_has_xml) {
            return 0;
        }
        return sizeof(target_ulong);
    default:
        return 0;
    }
}

/* We need to present the registers to gdb in the "current" memory ordering.
   For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to
   the proper ordering for the binary, and cannot be changed.
   For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check
   the current mode of the chip to see if we're running in little-endian.  */
void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
{
#ifndef CONFIG_USER_ONLY
    if (!msr_le) {
        /* do nothing */
    } else if (len == 4) {
        bswap32s((uint32_t *)mem_buf);
    } else if (len == 8) {
        bswap64s((uint64_t *)mem_buf);
    } else {
        g_assert_not_reached();
    }
#endif
}

/* Old gdb always expects FP registers.  Newer (xml-aware) gdb only
 * expects whatever the target description contains.  Due to a
 * historical mishap the FP registers appear in between core integer
 * regs and PC, MSR, CR, and so forth.  We hack round this by giving the
 * FP regs zero size when talking to a newer gdb.
 */

int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    int r = ppc_gdb_register_len(n);

    if (!r) {
        return r;
    }

    if (n < 32) {
        /* gprs */
        gdb_get_regl(mem_buf, env->gpr[n]);
    } else if (n < 64) {
        /* fprs */
        stfq_p(mem_buf, env->fpr[n-32]);
    } else {
        switch (n) {
        case 64:
            gdb_get_regl(mem_buf, env->nip);
            break;
        case 65:
            gdb_get_regl(mem_buf, env->msr);
            break;
        case 66:
            {
                uint32_t cr = 0;
                int i;
                for (i = 0; i < 8; i++) {
                    cr |= env->crf[i] << (32 - ((i + 1) * 4));
                }
                gdb_get_reg32(mem_buf, cr);
                break;
            }
        case 67:
            gdb_get_regl(mem_buf, env->lr);
            break;
        case 68:
            gdb_get_regl(mem_buf, env->ctr);
            break;
        case 69:
            gdb_get_regl(mem_buf, env->xer);
            break;
        case 70:
            gdb_get_reg32(mem_buf, env->fpscr);
            break;
        }
    }
    ppc_maybe_bswap_register(env, mem_buf, r);
    return r;
}

int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    int r = ppc_gdb_register_len_apple(n);

    if (!r) {
        return r;
    }

    if (n < 32) {
        /* gprs */
        gdb_get_reg64(mem_buf, env->gpr[n]);
    } else if (n < 64) {
        /* fprs */
        stfq_p(mem_buf, env->fpr[n-32]);
    } else if (n < 96) {
        /* Altivec */
        stq_p(mem_buf, n - 64);
        stq_p(mem_buf + 8, 0);
    } else {
        switch (n) {
        case 64 + 32:
            gdb_get_reg64(mem_buf, env->nip);
            break;
        case 65 + 32:
            gdb_get_reg64(mem_buf, env->msr);
            break;
        case 66 + 32:
            {
                uint32_t cr = 0;
                int i;
                for (i = 0; i < 8; i++) {
                    cr |= env->crf[i] << (32 - ((i + 1) * 4));
                }
                gdb_get_reg32(mem_buf, cr);
                break;
            }
        case 67 + 32:
            gdb_get_reg64(mem_buf, env->lr);
            break;
        case 68 + 32:
            gdb_get_reg64(mem_buf, env->ctr);
            break;
        case 69 + 32:
            gdb_get_reg64(mem_buf, env->xer);
            break;
        case 70 + 32:
            gdb_get_reg64(mem_buf, env->fpscr);
            break;
        }
    }
    ppc_maybe_bswap_register(env, mem_buf, r);
    return r;
}

int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    int r = ppc_gdb_register_len(n);

    if (!r) {
        return r;
    }
    ppc_maybe_bswap_register(env, mem_buf, r);
    if (n < 32) {
        /* gprs */
        env->gpr[n] = ldtul_p(mem_buf);
    } else if (n < 64) {
        /* fprs */
        env->fpr[n-32] = ldfq_p(mem_buf);
    } else {
        switch (n) {
        case 64:
            env->nip = ldtul_p(mem_buf);
            break;
        case 65:
            ppc_store_msr(env, ldtul_p(mem_buf));
            break;
        case 66:
            {
                uint32_t cr = ldl_p(mem_buf);
                int i;
                for (i = 0; i < 8; i++) {
                    env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
                }
                break;
            }
        case 67:
            env->lr = ldtul_p(mem_buf);
            break;
        case 68:
            env->ctr = ldtul_p(mem_buf);
            break;
        case 69:
            env->xer = ldtul_p(mem_buf);
            break;
        case 70:
            /* fpscr */
            store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
            break;
        }
    }
    return r;
}
int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
{
    PowerPCCPU *cpu = POWERPC_CPU(cs);
    CPUPPCState *env = &cpu->env;
    int r = ppc_gdb_register_len_apple(n);

    if (!r) {
        return r;
    }
    ppc_maybe_bswap_register(env, mem_buf, r);
    if (n < 32) {
        /* gprs */
        env->gpr[n] = ldq_p(mem_buf);
    } else if (n < 64) {
        /* fprs */
        env->fpr[n-32] = ldfq_p(mem_buf);
    } else {
        switch (n) {
        case 64 + 32:
            env->nip = ldq_p(mem_buf);
            break;
        case 65 + 32:
            ppc_store_msr(env, ldq_p(mem_buf));
            break;
        case 66 + 32:
            {
                uint32_t cr = ldl_p(mem_buf);
                int i;
                for (i = 0; i < 8; i++) {
                    env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
                }
                break;
            }
        case 67 + 32:
            env->lr = ldq_p(mem_buf);
            break;
        case 68 + 32:
            env->ctr = ldq_p(mem_buf);
            break;
        case 69 + 32:
            env->xer = ldq_p(mem_buf);
            break;
        case 70 + 32:
            /* fpscr */
            store_fpscr(env, ldq_p(mem_buf), 0xffffffff);
            break;
        }
    }
    return r;
}
Commit	Line	Data
0980bfab AF	1	/*
	2	* PowerPC gdb server stub
	3	*
	4	* Copyright (c) 2003-2005 Fabrice Bellard
	5	* Copyright (c) 2013 SUSE LINUX Products GmbH
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
0d75590d	20	#include "qemu/osdep.h"
5b50e790 AF	21	#include "qemu-common.h"
5b50e790 AF	22	#include "exec/gdbstub.h"
0980bfab	23
b3cad3ab AG	24	static int ppc_gdb_register_len_apple(int n)
	25	{
	26	switch (n) {
	27	case 0 ... 31:
	28	/* gprs */
	29	return 8;
	30	case 32 ... 63:
	31	/* fprs */
	32	return 8;
	33	case 64 ... 95:
	34	return 16;
	35	case 64+32: /* nip */
	36	case 65+32: /* msr */
	37	case 67+32: /* lr */
	38	case 68+32: /* ctr */
	39	case 69+32: /* xer */
	40	case 70+32: /* fpscr */
	41	return 8;
	42	case 66+32: /* cr */
	43	return 4;
	44	default:
	45	return 0;
	46	}
	47	}
	48
c46e9831 TF	49	static int ppc_gdb_register_len(int n)
	50	{
	51	switch (n) {
	52	case 0 ... 31:
	53	/* gprs */
	54	return sizeof(target_ulong);
	55	case 32 ... 63:
	56	/* fprs */
	57	if (gdb_has_xml) {
	58	return 0;
	59	}
	60	return 8;
	61	case 66:
	62	/* cr */
	63	return 4;
	64	case 64:
	65	/* nip */
	66	case 65:
	67	/* msr */
	68	case 67:
	69	/* lr */
	70	case 68:
	71	/* ctr */
	72	case 69:
	73	/* xer */
	74	return sizeof(target_ulong);
	75	case 70:
	76	/* fpscr */
	77	if (gdb_has_xml) {
	78	return 0;
	79	}
	80	return sizeof(target_ulong);
	81	default:
	82	return 0;
	83	}
	84	}
	85
be5c9dda RH	86	/* We need to present the registers to gdb in the "current" memory ordering.
	87	For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to
	88	the proper ordering for the binary, and cannot be changed.
	89	For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check
	90	the current mode of the chip to see if we're running in little-endian. */
376dbce0	91	void ppc_maybe_bswap_register(CPUPPCState env, uint8_t mem_buf, int len)
8a286ce4	92	{
be5c9dda RH	93	#ifndef CONFIG_USER_ONLY
	94	if (!msr_le) {
	95	/* do nothing */
	96	} else if (len == 4) {
8a286ce4 TF	97	bswap32s((uint32_t *)mem_buf);
	98	} else if (len == 8) {
	99	bswap64s((uint64_t *)mem_buf);
	100	} else {
	101	g_assert_not_reached();
	102	}
be5c9dda	103	#endif
8a286ce4 TF	104	}
8a286ce4 TF	105
0980bfab AF	106	/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
	107	* expects whatever the target description contains. Due to a
	108	* historical mishap the FP registers appear in between core integer
	109	* regs and PC, MSR, CR, and so forth. We hack round this by giving the
	110	* FP regs zero size when talking to a newer gdb.
	111	*/
	112
5b50e790	113	int ppc_cpu_gdb_read_register(CPUState cs, uint8_t mem_buf, int n)
0980bfab	114	{
5b50e790 AF	115	PowerPCCPU *cpu = POWERPC_CPU(cs);
5b50e790 AF	116	CPUPPCState *env = &cpu->env;
c46e9831 TF	117	int r = ppc_gdb_register_len(n);
	118
	119	if (!r) {
	120	return r;
	121	}
5b50e790	122
0980bfab AF	123	if (n < 32) {
0980bfab AF	124	/* gprs */
c46e9831	125	gdb_get_regl(mem_buf, env->gpr[n]);
0980bfab AF	126	} else if (n < 64) {
0980bfab AF	127	/* fprs */
0980bfab	128	stfq_p(mem_buf, env->fpr[n-32]);
0980bfab AF	129	} else {
	130	switch (n) {
	131	case 64:
c46e9831 TF	132	gdb_get_regl(mem_buf, env->nip);
c46e9831 TF	133	break;
0980bfab	134	case 65:
c46e9831 TF	135	gdb_get_regl(mem_buf, env->msr);
c46e9831 TF	136	break;
0980bfab AF	137	case 66:
	138	{
	139	uint32_t cr = 0;
	140	int i;
	141	for (i = 0; i < 8; i++) {
	142	cr \|= env->crf[i] << (32 - ((i + 1) * 4));
	143	}
c46e9831 TF	144	gdb_get_reg32(mem_buf, cr);
c46e9831 TF	145	break;
0980bfab AF	146	}
0980bfab AF	147	case 67:
c46e9831 TF	148	gdb_get_regl(mem_buf, env->lr);
c46e9831 TF	149	break;
0980bfab	150	case 68:
c46e9831 TF	151	gdb_get_regl(mem_buf, env->ctr);
c46e9831 TF	152	break;
0980bfab	153	case 69:
c46e9831 TF	154	gdb_get_regl(mem_buf, env->xer);
c46e9831 TF	155	break;
0980bfab	156	case 70:
c46e9831 TF	157	gdb_get_reg32(mem_buf, env->fpscr);
c46e9831 TF	158	break;
0980bfab AF	159	}
0980bfab AF	160	}
376dbce0	161	ppc_maybe_bswap_register(env, mem_buf, r);
c46e9831	162	return r;
0980bfab AF	163	}
0980bfab AF	164
b3cad3ab AG	165	int ppc_cpu_gdb_read_register_apple(CPUState cs, uint8_t mem_buf, int n)
	166	{
	167	PowerPCCPU *cpu = POWERPC_CPU(cs);
	168	CPUPPCState *env = &cpu->env;
	169	int r = ppc_gdb_register_len_apple(n);
	170
	171	if (!r) {
	172	return r;
	173	}
	174
	175	if (n < 32) {
	176	/* gprs */
	177	gdb_get_reg64(mem_buf, env->gpr[n]);
	178	} else if (n < 64) {
	179	/* fprs */
	180	stfq_p(mem_buf, env->fpr[n-32]);
	181	} else if (n < 96) {
	182	/* Altivec */
	183	stq_p(mem_buf, n - 64);
	184	stq_p(mem_buf + 8, 0);
	185	} else {
	186	switch (n) {
	187	case 64 + 32:
	188	gdb_get_reg64(mem_buf, env->nip);
	189	break;
	190	case 65 + 32:
	191	gdb_get_reg64(mem_buf, env->msr);
	192	break;
	193	case 66 + 32:
	194	{
	195	uint32_t cr = 0;
	196	int i;
	197	for (i = 0; i < 8; i++) {
	198	cr \|= env->crf[i] << (32 - ((i + 1) * 4));
	199	}
	200	gdb_get_reg32(mem_buf, cr);
	201	break;
	202	}
	203	case 67 + 32:
	204	gdb_get_reg64(mem_buf, env->lr);
	205	break;
	206	case 68 + 32:
	207	gdb_get_reg64(mem_buf, env->ctr);
	208	break;
	209	case 69 + 32:
	210	gdb_get_reg64(mem_buf, env->xer);
	211	break;
	212	case 70 + 32:
	213	gdb_get_reg64(mem_buf, env->fpscr);
	214	break;
	215	}
	216	}
376dbce0	217	ppc_maybe_bswap_register(env, mem_buf, r);
b3cad3ab AG	218	return r;
	219	}
	220
5b50e790	221	int ppc_cpu_gdb_write_register(CPUState cs, uint8_t mem_buf, int n)
0980bfab	222	{
5b50e790 AF	223	PowerPCCPU *cpu = POWERPC_CPU(cs);
5b50e790 AF	224	CPUPPCState *env = &cpu->env;
c46e9831	225	int r = ppc_gdb_register_len(n);
5b50e790	226
c46e9831 TF	227	if (!r) {
	228	return r;
	229	}
376dbce0	230	ppc_maybe_bswap_register(env, mem_buf, r);
0980bfab AF	231	if (n < 32) {
	232	/* gprs */
	233	env->gpr[n] = ldtul_p(mem_buf);
0980bfab AF	234	} else if (n < 64) {
0980bfab AF	235	/* fprs */
0980bfab	236	env->fpr[n-32] = ldfq_p(mem_buf);
0980bfab AF	237	} else {
	238	switch (n) {
	239	case 64:
	240	env->nip = ldtul_p(mem_buf);
c46e9831	241	break;
0980bfab AF	242	case 65:
0980bfab AF	243	ppc_store_msr(env, ldtul_p(mem_buf));
c46e9831	244	break;
0980bfab AF	245	case 66:
	246	{
	247	uint32_t cr = ldl_p(mem_buf);
	248	int i;
	249	for (i = 0; i < 8; i++) {
	250	env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
	251	}
c46e9831	252	break;
0980bfab AF	253	}
	254	case 67:
	255	env->lr = ldtul_p(mem_buf);
c46e9831	256	break;
0980bfab AF	257	case 68:
0980bfab AF	258	env->ctr = ldtul_p(mem_buf);
c46e9831	259	break;
0980bfab AF	260	case 69:
0980bfab AF	261	env->xer = ldtul_p(mem_buf);
c46e9831	262	break;
0980bfab AF	263	case 70:
0980bfab AF	264	/* fpscr */
0980bfab	265	store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
c46e9831	266	break;
0980bfab AF	267	}
0980bfab AF	268	}
c46e9831	269	return r;
0980bfab	270	}
b3cad3ab AG	271	int ppc_cpu_gdb_write_register_apple(CPUState cs, uint8_t mem_buf, int n)
	272	{
	273	PowerPCCPU *cpu = POWERPC_CPU(cs);
	274	CPUPPCState *env = &cpu->env;
	275	int r = ppc_gdb_register_len_apple(n);
	276
	277	if (!r) {
	278	return r;
	279	}
376dbce0	280	ppc_maybe_bswap_register(env, mem_buf, r);
b3cad3ab AG	281	if (n < 32) {
	282	/* gprs */
	283	env->gpr[n] = ldq_p(mem_buf);
	284	} else if (n < 64) {
	285	/* fprs */
	286	env->fpr[n-32] = ldfq_p(mem_buf);
	287	} else {
	288	switch (n) {
	289	case 64 + 32:
	290	env->nip = ldq_p(mem_buf);
	291	break;
	292	case 65 + 32:
	293	ppc_store_msr(env, ldq_p(mem_buf));
	294	break;
	295	case 66 + 32:
	296	{
	297	uint32_t cr = ldl_p(mem_buf);
	298	int i;
	299	for (i = 0; i < 8; i++) {
	300	env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
	301	}
	302	break;
	303	}
	304	case 67 + 32:
	305	env->lr = ldq_p(mem_buf);
	306	break;
	307	case 68 + 32:
	308	env->ctr = ldq_p(mem_buf);
	309	break;
	310	case 69 + 32:
	311	env->xer = ldq_p(mem_buf);
	312	break;
	313	case 70 + 32:
	314	/* fpscr */
	315	store_fpscr(env, ldq_p(mem_buf), 0xffffffff);
	316	break;
	317	}
	318	}
	319	return r;
	320	}