]>
Commit | Line | Data |
---|---|---|
3622634b MA |
1 | #ifndef TILEGX_TARGET_SYSCALL_H |
2 | #define TILEGX_TARGET_SYSCALL_H | |
2cb154bc CG |
3 | |
4 | #define UNAME_MACHINE "tilegx" | |
5 | #define UNAME_MINIMUM_RELEASE "3.19" | |
6 | ||
7 | #define MMAP_SHIFT TARGET_PAGE_BITS | |
8 | ||
9 | #define TILEGX_IS_ERRNO(ret) \ | |
10 | ((ret) > 0xfffffffffffff000ULL) /* errno is 0 -- 4096 */ | |
11 | ||
12 | typedef uint64_t tilegx_reg_t; | |
13 | ||
14 | struct target_pt_regs { | |
15 | ||
16 | union { | |
17 | /* Saved main processor registers; 56..63 are special. */ | |
18 | tilegx_reg_t regs[56]; | |
19 | struct { | |
20 | tilegx_reg_t __regs[53]; | |
21 | tilegx_reg_t tp; /* aliases regs[TREG_TP] */ | |
22 | tilegx_reg_t sp; /* aliases regs[TREG_SP] */ | |
23 | tilegx_reg_t lr; /* aliases regs[TREG_LR] */ | |
24 | }; | |
25 | }; | |
26 | ||
27 | /* Saved special registers. */ | |
28 | tilegx_reg_t pc; /* stored in EX_CONTEXT_K_0 */ | |
29 | tilegx_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */ | |
30 | tilegx_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */ | |
31 | tilegx_reg_t orig_r0; /* r0 at syscall entry, else zero */ | |
32 | tilegx_reg_t flags; /* flags (see below) */ | |
33 | tilegx_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */ | |
34 | tilegx_reg_t pad[2]; | |
35 | }; | |
36 | ||
37 | #define TARGET_MLOCKALL_MCL_CURRENT 1 | |
38 | #define TARGET_MLOCKALL_MCL_FUTURE 2 | |
39 | ||
bf0f60a6 CG |
40 | /* For faultnum */ |
41 | #define TARGET_INT_SWINT_1 14 | |
42 | ||
2cb154bc | 43 | #endif |