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Commit | Line | Data |
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79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation micro-operations for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
a541f297 FB |
21 | //#define DEBUG_OP |
22 | ||
79aceca5 FB |
23 | #include "config.h" |
24 | #include "exec.h" | |
76a66253 | 25 | #include "op_helper.h" |
79aceca5 | 26 | |
28b6751f FB |
27 | #define REG 0 |
28 | #include "op_template.h" | |
29 | ||
30 | #define REG 1 | |
31 | #include "op_template.h" | |
32 | ||
33 | #define REG 2 | |
34 | #include "op_template.h" | |
35 | ||
36 | #define REG 3 | |
37 | #include "op_template.h" | |
38 | ||
39 | #define REG 4 | |
40 | #include "op_template.h" | |
41 | ||
42 | #define REG 5 | |
43 | #include "op_template.h" | |
44 | ||
45 | #define REG 6 | |
46 | #include "op_template.h" | |
47 | ||
48 | #define REG 7 | |
49 | #include "op_template.h" | |
50 | ||
51 | #define REG 8 | |
52 | #include "op_template.h" | |
53 | ||
54 | #define REG 9 | |
55 | #include "op_template.h" | |
56 | ||
57 | #define REG 10 | |
58 | #include "op_template.h" | |
59 | ||
60 | #define REG 11 | |
61 | #include "op_template.h" | |
62 | ||
63 | #define REG 12 | |
64 | #include "op_template.h" | |
65 | ||
66 | #define REG 13 | |
67 | #include "op_template.h" | |
68 | ||
69 | #define REG 14 | |
70 | #include "op_template.h" | |
71 | ||
72 | #define REG 15 | |
73 | #include "op_template.h" | |
74 | ||
75 | #define REG 16 | |
76 | #include "op_template.h" | |
77 | ||
78 | #define REG 17 | |
79 | #include "op_template.h" | |
80 | ||
81 | #define REG 18 | |
82 | #include "op_template.h" | |
83 | ||
84 | #define REG 19 | |
85 | #include "op_template.h" | |
86 | ||
87 | #define REG 20 | |
88 | #include "op_template.h" | |
89 | ||
90 | #define REG 21 | |
91 | #include "op_template.h" | |
92 | ||
93 | #define REG 22 | |
94 | #include "op_template.h" | |
95 | ||
96 | #define REG 23 | |
97 | #include "op_template.h" | |
98 | ||
99 | #define REG 24 | |
100 | #include "op_template.h" | |
101 | ||
102 | #define REG 25 | |
103 | #include "op_template.h" | |
104 | ||
105 | #define REG 26 | |
106 | #include "op_template.h" | |
107 | ||
108 | #define REG 27 | |
109 | #include "op_template.h" | |
110 | ||
111 | #define REG 28 | |
112 | #include "op_template.h" | |
113 | ||
114 | #define REG 29 | |
115 | #include "op_template.h" | |
116 | ||
117 | #define REG 30 | |
118 | #include "op_template.h" | |
119 | ||
120 | #define REG 31 | |
121 | #include "op_template.h" | |
122 | ||
a496775f JM |
123 | |
124 | void OPPROTO op_print_mem_EA (void) | |
125 | { | |
126 | do_print_mem_EA(T0); | |
127 | RETURN(); | |
128 | } | |
129 | ||
3fc6c082 | 130 | /* PowerPC state maintenance operations */ |
79aceca5 | 131 | /* set_Rc0 */ |
36081602 | 132 | void OPPROTO op_set_Rc0 (void) |
79aceca5 | 133 | { |
966439a6 | 134 | env->crf[0] = T0 | xer_so; |
79aceca5 FB |
135 | RETURN(); |
136 | } | |
137 | ||
fb0eaffc | 138 | /* Set Rc1 (for floating point arithmetic) */ |
36081602 | 139 | void OPPROTO op_set_Rc1 (void) |
fb0eaffc | 140 | { |
36081602 | 141 | env->crf[1] = env->fpscr[7]; |
fb0eaffc FB |
142 | RETURN(); |
143 | } | |
144 | ||
9a64fbe4 | 145 | /* Constants load */ |
76a66253 JM |
146 | void OPPROTO op_reset_T0 (void) |
147 | { | |
148 | T0 = 0; | |
149 | RETURN(); | |
150 | } | |
151 | ||
36081602 | 152 | void OPPROTO op_set_T0 (void) |
79aceca5 | 153 | { |
d9bce9d9 | 154 | T0 = (uint32_t)PARAM1; |
79aceca5 FB |
155 | RETURN(); |
156 | } | |
157 | ||
d9bce9d9 JM |
158 | #if defined(TARGET_PPC64) |
159 | void OPPROTO op_set_T0_64 (void) | |
160 | { | |
161 | T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
162 | RETURN(); | |
163 | } | |
164 | #endif | |
165 | ||
36081602 | 166 | void OPPROTO op_set_T1 (void) |
79aceca5 | 167 | { |
d9bce9d9 JM |
168 | T1 = (uint32_t)PARAM1; |
169 | RETURN(); | |
170 | } | |
171 | ||
172 | #if defined(TARGET_PPC64) | |
173 | void OPPROTO op_set_T1_64 (void) | |
174 | { | |
175 | T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
79aceca5 FB |
176 | RETURN(); |
177 | } | |
d9bce9d9 | 178 | #endif |
79aceca5 | 179 | |
76a66253 | 180 | #if 0 // unused |
36081602 | 181 | void OPPROTO op_set_T2 (void) |
79aceca5 | 182 | { |
2f401176 | 183 | T2 = (uint32_t)PARAM1; |
79aceca5 FB |
184 | RETURN(); |
185 | } | |
76a66253 | 186 | #endif |
79aceca5 | 187 | |
76a66253 | 188 | void OPPROTO op_move_T1_T0 (void) |
79aceca5 | 189 | { |
76a66253 JM |
190 | T1 = T0; |
191 | RETURN(); | |
9a64fbe4 FB |
192 | } |
193 | ||
d9bce9d9 JM |
194 | void OPPROTO op_move_T2_T0 (void) |
195 | { | |
196 | T2 = T0; | |
197 | RETURN(); | |
198 | } | |
199 | ||
76a66253 | 200 | /* Generate exceptions */ |
36081602 | 201 | void OPPROTO op_raise_exception_err (void) |
9a64fbe4 | 202 | { |
36081602 | 203 | do_raise_exception_err(PARAM1, PARAM2); |
9a64fbe4 FB |
204 | } |
205 | ||
36081602 | 206 | void OPPROTO op_update_nip (void) |
9a64fbe4 | 207 | { |
d9bce9d9 | 208 | env->nip = (uint32_t)PARAM1; |
76a66253 | 209 | RETURN(); |
9a64fbe4 FB |
210 | } |
211 | ||
d9bce9d9 JM |
212 | #if defined(TARGET_PPC64) |
213 | void OPPROTO op_update_nip_64 (void) | |
214 | { | |
215 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
216 | RETURN(); | |
217 | } | |
218 | #endif | |
219 | ||
36081602 | 220 | void OPPROTO op_debug (void) |
ea4e754f FB |
221 | { |
222 | do_raise_exception(EXCP_DEBUG); | |
223 | } | |
224 | ||
36081602 | 225 | void OPPROTO op_exit_tb (void) |
9a64fbe4 | 226 | { |
76a66253 | 227 | EXIT_TB(); |
9a64fbe4 FB |
228 | } |
229 | ||
76a66253 | 230 | /* Load/store special registers */ |
36081602 | 231 | void OPPROTO op_load_cr (void) |
9a64fbe4 | 232 | { |
76a66253 | 233 | do_load_cr(); |
79aceca5 FB |
234 | RETURN(); |
235 | } | |
236 | ||
36081602 | 237 | void OPPROTO op_store_cr (void) |
79aceca5 | 238 | { |
36081602 | 239 | do_store_cr(PARAM1); |
79aceca5 FB |
240 | RETURN(); |
241 | } | |
242 | ||
76a66253 | 243 | void OPPROTO op_load_cro (void) |
79aceca5 | 244 | { |
76a66253 | 245 | T0 = env->crf[PARAM1]; |
79aceca5 FB |
246 | RETURN(); |
247 | } | |
248 | ||
76a66253 | 249 | void OPPROTO op_store_cro (void) |
79aceca5 | 250 | { |
76a66253 | 251 | env->crf[PARAM1] = T0; |
79aceca5 FB |
252 | RETURN(); |
253 | } | |
254 | ||
36081602 | 255 | void OPPROTO op_load_xer_cr (void) |
79aceca5 FB |
256 | { |
257 | T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); | |
258 | RETURN(); | |
259 | } | |
260 | ||
36081602 | 261 | void OPPROTO op_clear_xer_ov (void) |
79aceca5 FB |
262 | { |
263 | xer_so = 0; | |
264 | xer_ov = 0; | |
e864cabd JM |
265 | RETURN(); |
266 | } | |
267 | ||
36081602 | 268 | void OPPROTO op_clear_xer_ca (void) |
e864cabd | 269 | { |
79aceca5 FB |
270 | xer_ca = 0; |
271 | RETURN(); | |
272 | } | |
273 | ||
36081602 | 274 | void OPPROTO op_load_xer_bc (void) |
79aceca5 | 275 | { |
9a64fbe4 | 276 | T1 = xer_bc; |
79aceca5 FB |
277 | RETURN(); |
278 | } | |
279 | ||
76a66253 JM |
280 | void OPPROTO op_store_xer_bc (void) |
281 | { | |
282 | xer_bc = T0; | |
283 | RETURN(); | |
284 | } | |
285 | ||
36081602 | 286 | void OPPROTO op_load_xer (void) |
79aceca5 | 287 | { |
76a66253 | 288 | do_load_xer(); |
79aceca5 FB |
289 | RETURN(); |
290 | } | |
291 | ||
36081602 | 292 | void OPPROTO op_store_xer (void) |
79aceca5 | 293 | { |
76a66253 JM |
294 | do_store_xer(); |
295 | RETURN(); | |
296 | } | |
297 | ||
c80f84e3 JM |
298 | #if defined(TARGET_PPC64) |
299 | void OPPROTO op_store_pri (void) | |
300 | { | |
301 | do_store_pri(PARAM1); | |
302 | RETURN(); | |
303 | } | |
304 | #endif | |
305 | ||
76a66253 JM |
306 | #if !defined(CONFIG_USER_ONLY) |
307 | /* Segment registers load and store */ | |
36081602 | 308 | void OPPROTO op_load_sr (void) |
76a66253 | 309 | { |
36081602 | 310 | T0 = env->sr[T1]; |
76a66253 JM |
311 | RETURN(); |
312 | } | |
313 | ||
36081602 | 314 | void OPPROTO op_store_sr (void) |
76a66253 JM |
315 | { |
316 | do_store_sr(env, T1, T0); | |
317 | RETURN(); | |
318 | } | |
319 | ||
36081602 | 320 | void OPPROTO op_load_sdr1 (void) |
76a66253 | 321 | { |
36081602 | 322 | T0 = env->sdr1; |
76a66253 JM |
323 | RETURN(); |
324 | } | |
325 | ||
36081602 | 326 | void OPPROTO op_store_sdr1 (void) |
76a66253 JM |
327 | { |
328 | do_store_sdr1(env, T0); | |
79aceca5 FB |
329 | RETURN(); |
330 | } | |
331 | ||
d9bce9d9 JM |
332 | #if defined (TARGET_PPC64) |
333 | void OPPROTO op_load_asr (void) | |
334 | { | |
335 | T0 = env->asr; | |
336 | RETURN(); | |
337 | } | |
338 | ||
339 | void OPPROTO op_store_asr (void) | |
340 | { | |
341 | ppc_store_asr(env, T0); | |
342 | RETURN(); | |
343 | } | |
344 | #endif | |
345 | ||
36081602 | 346 | void OPPROTO op_load_msr (void) |
79aceca5 | 347 | { |
3fc6c082 | 348 | T0 = do_load_msr(env); |
79aceca5 FB |
349 | RETURN(); |
350 | } | |
351 | ||
36081602 | 352 | void OPPROTO op_store_msr (void) |
79aceca5 | 353 | { |
a97fed52 JM |
354 | if (do_store_msr(env, T0)) { |
355 | env->halted = 1; | |
356 | do_raise_exception(EXCP_HLT); | |
357 | } | |
9a64fbe4 FB |
358 | RETURN(); |
359 | } | |
d9bce9d9 | 360 | |
be147d08 JM |
361 | void OPPROTO op_update_riee (void) |
362 | { | |
363 | msr_ri = (T0 >> MSR_RI) & 1; | |
364 | msr_ee = (T0 >> MSR_EE) & 1; | |
365 | RETURN(); | |
366 | } | |
367 | ||
d9bce9d9 JM |
368 | #if defined (TARGET_PPC64) |
369 | void OPPROTO op_store_msr_32 (void) | |
370 | { | |
a97fed52 JM |
371 | if (ppc_store_msr_32(env, T0)) { |
372 | env->halted = 1; | |
373 | do_raise_exception(EXCP_HLT); | |
374 | } | |
d9bce9d9 JM |
375 | RETURN(); |
376 | } | |
377 | #endif | |
76a66253 | 378 | #endif |
9a64fbe4 FB |
379 | |
380 | /* SPR */ | |
a496775f JM |
381 | void OPPROTO op_load_spr (void) |
382 | { | |
383 | T0 = env->spr[PARAM1]; | |
384 | RETURN(); | |
385 | } | |
386 | ||
387 | void OPPROTO op_store_spr (void) | |
388 | { | |
389 | env->spr[PARAM1] = T0; | |
390 | RETURN(); | |
391 | } | |
392 | ||
393 | void OPPROTO op_load_dump_spr (void) | |
394 | { | |
395 | T0 = ppc_load_dump_spr(PARAM1); | |
396 | RETURN(); | |
397 | } | |
398 | ||
399 | void OPPROTO op_store_dump_spr (void) | |
9a64fbe4 | 400 | { |
a496775f | 401 | ppc_store_dump_spr(PARAM1, T0); |
9a64fbe4 FB |
402 | RETURN(); |
403 | } | |
404 | ||
a496775f | 405 | void OPPROTO op_mask_spr (void) |
9a64fbe4 | 406 | { |
a496775f | 407 | env->spr[PARAM1] &= ~T0; |
79aceca5 FB |
408 | RETURN(); |
409 | } | |
410 | ||
36081602 | 411 | void OPPROTO op_load_lr (void) |
79aceca5 | 412 | { |
36081602 | 413 | T0 = env->lr; |
9a64fbe4 FB |
414 | RETURN(); |
415 | } | |
416 | ||
36081602 | 417 | void OPPROTO op_store_lr (void) |
9a64fbe4 | 418 | { |
36081602 | 419 | env->lr = T0; |
9a64fbe4 FB |
420 | RETURN(); |
421 | } | |
422 | ||
36081602 | 423 | void OPPROTO op_load_ctr (void) |
9a64fbe4 | 424 | { |
36081602 | 425 | T0 = env->ctr; |
9a64fbe4 FB |
426 | RETURN(); |
427 | } | |
428 | ||
36081602 | 429 | void OPPROTO op_store_ctr (void) |
9a64fbe4 | 430 | { |
36081602 | 431 | env->ctr = T0; |
9a64fbe4 FB |
432 | RETURN(); |
433 | } | |
434 | ||
36081602 | 435 | void OPPROTO op_load_tbl (void) |
9a64fbe4 | 436 | { |
36081602 | 437 | T0 = cpu_ppc_load_tbl(env); |
9a64fbe4 FB |
438 | RETURN(); |
439 | } | |
440 | ||
36081602 | 441 | void OPPROTO op_load_tbu (void) |
9a64fbe4 | 442 | { |
36081602 | 443 | T0 = cpu_ppc_load_tbu(env); |
9a64fbe4 FB |
444 | RETURN(); |
445 | } | |
446 | ||
a062e36c JM |
447 | void OPPROTO op_load_atbl (void) |
448 | { | |
449 | T0 = cpu_ppc_load_atbl(env); | |
450 | RETURN(); | |
451 | } | |
452 | ||
453 | void OPPROTO op_load_atbu (void) | |
454 | { | |
455 | T0 = cpu_ppc_load_atbu(env); | |
456 | RETURN(); | |
457 | } | |
458 | ||
76a66253 | 459 | #if !defined(CONFIG_USER_ONLY) |
36081602 | 460 | void OPPROTO op_store_tbl (void) |
9a64fbe4 | 461 | { |
36081602 | 462 | cpu_ppc_store_tbl(env, T0); |
79aceca5 FB |
463 | RETURN(); |
464 | } | |
465 | ||
36081602 | 466 | void OPPROTO op_store_tbu (void) |
9a64fbe4 | 467 | { |
36081602 | 468 | cpu_ppc_store_tbu(env, T0); |
9a64fbe4 FB |
469 | RETURN(); |
470 | } | |
471 | ||
a062e36c JM |
472 | void OPPROTO op_store_atbl (void) |
473 | { | |
474 | cpu_ppc_store_atbl(env, T0); | |
475 | RETURN(); | |
476 | } | |
477 | ||
478 | void OPPROTO op_store_atbu (void) | |
479 | { | |
480 | cpu_ppc_store_atbu(env, T0); | |
481 | RETURN(); | |
482 | } | |
483 | ||
36081602 | 484 | void OPPROTO op_load_decr (void) |
9a64fbe4 | 485 | { |
36081602 | 486 | T0 = cpu_ppc_load_decr(env); |
76a66253 JM |
487 | RETURN(); |
488 | } | |
9fddaa0c | 489 | |
36081602 | 490 | void OPPROTO op_store_decr (void) |
9fddaa0c | 491 | { |
36081602 | 492 | cpu_ppc_store_decr(env, T0); |
9a64fbe4 FB |
493 | RETURN(); |
494 | } | |
495 | ||
36081602 | 496 | void OPPROTO op_load_ibat (void) |
9a64fbe4 | 497 | { |
36081602 | 498 | T0 = env->IBAT[PARAM1][PARAM2]; |
76a66253 | 499 | RETURN(); |
9a64fbe4 FB |
500 | } |
501 | ||
76a66253 | 502 | void OPPROTO op_store_ibatu (void) |
9a64fbe4 | 503 | { |
3fc6c082 FB |
504 | do_store_ibatu(env, PARAM1, T0); |
505 | RETURN(); | |
506 | } | |
507 | ||
76a66253 | 508 | void OPPROTO op_store_ibatl (void) |
3fc6c082 FB |
509 | { |
510 | #if 1 | |
511 | env->IBAT[1][PARAM1] = T0; | |
512 | #else | |
513 | do_store_ibatl(env, PARAM1, T0); | |
514 | #endif | |
515 | RETURN(); | |
9a64fbe4 FB |
516 | } |
517 | ||
36081602 | 518 | void OPPROTO op_load_dbat (void) |
9a64fbe4 | 519 | { |
36081602 | 520 | T0 = env->DBAT[PARAM1][PARAM2]; |
76a66253 | 521 | RETURN(); |
9a64fbe4 FB |
522 | } |
523 | ||
76a66253 | 524 | void OPPROTO op_store_dbatu (void) |
3fc6c082 FB |
525 | { |
526 | do_store_dbatu(env, PARAM1, T0); | |
527 | RETURN(); | |
528 | } | |
529 | ||
76a66253 | 530 | void OPPROTO op_store_dbatl (void) |
9a64fbe4 | 531 | { |
3fc6c082 FB |
532 | #if 1 |
533 | env->DBAT[1][PARAM1] = T0; | |
534 | #else | |
535 | do_store_dbatl(env, PARAM1, T0); | |
536 | #endif | |
537 | RETURN(); | |
9a64fbe4 | 538 | } |
76a66253 | 539 | #endif /* !defined(CONFIG_USER_ONLY) */ |
9a64fbe4 | 540 | |
fb0eaffc | 541 | /* FPSCR */ |
36081602 | 542 | void OPPROTO op_load_fpscr (void) |
fb0eaffc | 543 | { |
76a66253 | 544 | do_load_fpscr(); |
fb0eaffc FB |
545 | RETURN(); |
546 | } | |
547 | ||
36081602 | 548 | void OPPROTO op_store_fpscr (void) |
fb0eaffc | 549 | { |
76a66253 | 550 | do_store_fpscr(PARAM1); |
fb0eaffc FB |
551 | RETURN(); |
552 | } | |
553 | ||
36081602 | 554 | void OPPROTO op_reset_scrfx (void) |
fb0eaffc | 555 | { |
36081602 | 556 | env->fpscr[7] &= ~0x8; |
fb0eaffc FB |
557 | RETURN(); |
558 | } | |
559 | ||
79aceca5 | 560 | /* crf operations */ |
36081602 | 561 | void OPPROTO op_getbit_T0 (void) |
79aceca5 | 562 | { |
36081602 | 563 | T0 = (T0 >> PARAM1) & 1; |
79aceca5 FB |
564 | RETURN(); |
565 | } | |
566 | ||
36081602 | 567 | void OPPROTO op_getbit_T1 (void) |
79aceca5 | 568 | { |
36081602 | 569 | T1 = (T1 >> PARAM1) & 1; |
79aceca5 FB |
570 | RETURN(); |
571 | } | |
572 | ||
36081602 | 573 | void OPPROTO op_setcrfbit (void) |
79aceca5 | 574 | { |
2f401176 | 575 | T1 = (T1 & (uint32_t)PARAM1) | (T0 << PARAM2); |
79aceca5 FB |
576 | RETURN(); |
577 | } | |
578 | ||
579 | /* Branch */ | |
36081602 | 580 | #define EIP env->nip |
9a64fbe4 | 581 | |
36081602 | 582 | void OPPROTO op_setlr (void) |
e98a6e40 | 583 | { |
36081602 | 584 | env->lr = (uint32_t)PARAM1; |
76a66253 | 585 | RETURN(); |
e98a6e40 FB |
586 | } |
587 | ||
d9bce9d9 JM |
588 | #if defined (TARGET_PPC64) |
589 | void OPPROTO op_setlr_64 (void) | |
590 | { | |
36081602 | 591 | env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
592 | RETURN(); |
593 | } | |
594 | #endif | |
595 | ||
36081602 | 596 | void OPPROTO op_goto_tb0 (void) |
e98a6e40 | 597 | { |
c53be334 FB |
598 | GOTO_TB(op_goto_tb0, PARAM1, 0); |
599 | } | |
600 | ||
36081602 | 601 | void OPPROTO op_goto_tb1 (void) |
c53be334 FB |
602 | { |
603 | GOTO_TB(op_goto_tb1, PARAM1, 1); | |
e98a6e40 FB |
604 | } |
605 | ||
d9bce9d9 | 606 | void OPPROTO op_b_T1 (void) |
e98a6e40 | 607 | { |
36081602 | 608 | env->nip = (uint32_t)(T1 & ~3); |
76a66253 | 609 | RETURN(); |
e98a6e40 FB |
610 | } |
611 | ||
d9bce9d9 JM |
612 | #if defined (TARGET_PPC64) |
613 | void OPPROTO op_b_T1_64 (void) | |
614 | { | |
36081602 | 615 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 JM |
616 | RETURN(); |
617 | } | |
618 | #endif | |
619 | ||
36081602 | 620 | void OPPROTO op_jz_T0 (void) |
e98a6e40 | 621 | { |
c53be334 FB |
622 | if (!T0) |
623 | GOTO_LABEL_PARAM(1); | |
e98a6e40 FB |
624 | RETURN(); |
625 | } | |
626 | ||
d9bce9d9 | 627 | void OPPROTO op_btest_T1 (void) |
e98a6e40 FB |
628 | { |
629 | if (T0) { | |
36081602 | 630 | env->nip = (uint32_t)(T1 & ~3); |
e98a6e40 | 631 | } else { |
36081602 | 632 | env->nip = (uint32_t)PARAM1; |
e98a6e40 FB |
633 | } |
634 | RETURN(); | |
635 | } | |
636 | ||
d9bce9d9 JM |
637 | #if defined (TARGET_PPC64) |
638 | void OPPROTO op_btest_T1_64 (void) | |
639 | { | |
640 | if (T0) { | |
36081602 | 641 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 | 642 | } else { |
36081602 | 643 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
644 | } |
645 | RETURN(); | |
646 | } | |
647 | #endif | |
648 | ||
36081602 | 649 | void OPPROTO op_movl_T1_ctr (void) |
e98a6e40 | 650 | { |
36081602 | 651 | T1 = env->ctr; |
76a66253 | 652 | RETURN(); |
e98a6e40 FB |
653 | } |
654 | ||
36081602 | 655 | void OPPROTO op_movl_T1_lr (void) |
e98a6e40 | 656 | { |
36081602 | 657 | T1 = env->lr; |
76a66253 | 658 | RETURN(); |
e98a6e40 FB |
659 | } |
660 | ||
661 | /* tests with result in T0 */ | |
d9bce9d9 JM |
662 | void OPPROTO op_test_ctr (void) |
663 | { | |
36081602 | 664 | T0 = (uint32_t)env->ctr; |
d9bce9d9 JM |
665 | RETURN(); |
666 | } | |
e98a6e40 | 667 | |
d9bce9d9 JM |
668 | #if defined(TARGET_PPC64) |
669 | void OPPROTO op_test_ctr_64 (void) | |
e98a6e40 | 670 | { |
36081602 | 671 | T0 = (uint64_t)env->ctr; |
d9bce9d9 JM |
672 | RETURN(); |
673 | } | |
674 | #endif | |
675 | ||
676 | void OPPROTO op_test_ctr_true (void) | |
677 | { | |
36081602 | 678 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 679 | RETURN(); |
e98a6e40 FB |
680 | } |
681 | ||
d9bce9d9 JM |
682 | #if defined(TARGET_PPC64) |
683 | void OPPROTO op_test_ctr_true_64 (void) | |
e98a6e40 | 684 | { |
36081602 | 685 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 686 | RETURN(); |
e98a6e40 | 687 | } |
d9bce9d9 | 688 | #endif |
e98a6e40 | 689 | |
d9bce9d9 | 690 | void OPPROTO op_test_ctr_false (void) |
e98a6e40 | 691 | { |
36081602 | 692 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 693 | RETURN(); |
e98a6e40 FB |
694 | } |
695 | ||
d9bce9d9 JM |
696 | #if defined(TARGET_PPC64) |
697 | void OPPROTO op_test_ctr_false_64 (void) | |
e98a6e40 | 698 | { |
36081602 | 699 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 700 | RETURN(); |
e98a6e40 | 701 | } |
d9bce9d9 JM |
702 | #endif |
703 | ||
704 | void OPPROTO op_test_ctrz (void) | |
705 | { | |
36081602 | 706 | T0 = ((uint32_t)env->ctr == 0); |
d9bce9d9 JM |
707 | RETURN(); |
708 | } | |
709 | ||
710 | #if defined(TARGET_PPC64) | |
711 | void OPPROTO op_test_ctrz_64 (void) | |
712 | { | |
36081602 | 713 | T0 = ((uint64_t)env->ctr == 0); |
d9bce9d9 JM |
714 | RETURN(); |
715 | } | |
716 | #endif | |
717 | ||
718 | void OPPROTO op_test_ctrz_true (void) | |
719 | { | |
36081602 | 720 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
721 | RETURN(); |
722 | } | |
723 | ||
724 | #if defined(TARGET_PPC64) | |
725 | void OPPROTO op_test_ctrz_true_64 (void) | |
726 | { | |
36081602 | 727 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
728 | RETURN(); |
729 | } | |
730 | #endif | |
e98a6e40 | 731 | |
d9bce9d9 | 732 | void OPPROTO op_test_ctrz_false (void) |
e98a6e40 | 733 | { |
36081602 | 734 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 735 | RETURN(); |
e98a6e40 FB |
736 | } |
737 | ||
d9bce9d9 JM |
738 | #if defined(TARGET_PPC64) |
739 | void OPPROTO op_test_ctrz_false_64 (void) | |
e98a6e40 | 740 | { |
36081602 | 741 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 742 | RETURN(); |
e98a6e40 | 743 | } |
d9bce9d9 | 744 | #endif |
e98a6e40 | 745 | |
36081602 | 746 | void OPPROTO op_test_true (void) |
e98a6e40 | 747 | { |
36081602 | 748 | T0 = (T0 & PARAM1); |
76a66253 | 749 | RETURN(); |
e98a6e40 FB |
750 | } |
751 | ||
36081602 | 752 | void OPPROTO op_test_false (void) |
e98a6e40 | 753 | { |
36081602 | 754 | T0 = ((T0 & PARAM1) == 0); |
76a66253 | 755 | RETURN(); |
e98a6e40 | 756 | } |
79aceca5 FB |
757 | |
758 | /* CTR maintenance */ | |
36081602 | 759 | void OPPROTO op_dec_ctr (void) |
79aceca5 | 760 | { |
36081602 | 761 | env->ctr--; |
79aceca5 FB |
762 | RETURN(); |
763 | } | |
764 | ||
765 | /*** Integer arithmetic ***/ | |
766 | /* add */ | |
36081602 | 767 | void OPPROTO op_add (void) |
79aceca5 FB |
768 | { |
769 | T0 += T1; | |
770 | RETURN(); | |
771 | } | |
772 | ||
d9bce9d9 | 773 | void OPPROTO op_check_addo (void) |
79aceca5 | 774 | { |
d9bce9d9 JM |
775 | if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
776 | ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) { | |
777 | xer_ov = 0; | |
778 | } else { | |
d9bce9d9 | 779 | xer_ov = 1; |
966439a6 | 780 | xer_so = 1; |
d9bce9d9 | 781 | } |
e864cabd | 782 | RETURN(); |
79aceca5 FB |
783 | } |
784 | ||
d9bce9d9 JM |
785 | #if defined(TARGET_PPC64) |
786 | void OPPROTO op_check_addo_64 (void) | |
79aceca5 | 787 | { |
d9bce9d9 | 788 | if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
1698b741 | 789 | ((uint64_t)T2 ^ (uint64_t)T0) & (1ULL << 63)))) { |
d9bce9d9 | 790 | xer_ov = 0; |
79aceca5 | 791 | } else { |
d9bce9d9 | 792 | xer_ov = 1; |
966439a6 | 793 | xer_so = 1; |
d9bce9d9 | 794 | } |
e864cabd | 795 | RETURN(); |
d9bce9d9 JM |
796 | } |
797 | #endif | |
798 | ||
799 | /* add carrying */ | |
800 | void OPPROTO op_check_addc (void) | |
801 | { | |
802 | if (likely((uint32_t)T0 >= (uint32_t)T2)) { | |
79aceca5 | 803 | xer_ca = 0; |
d9bce9d9 JM |
804 | } else { |
805 | xer_ca = 1; | |
79aceca5 FB |
806 | } |
807 | RETURN(); | |
808 | } | |
809 | ||
d9bce9d9 JM |
810 | #if defined(TARGET_PPC64) |
811 | void OPPROTO op_check_addc_64 (void) | |
79aceca5 | 812 | { |
d9bce9d9 JM |
813 | if (likely((uint64_t)T0 >= (uint64_t)T2)) { |
814 | xer_ca = 0; | |
815 | } else { | |
816 | xer_ca = 1; | |
817 | } | |
79aceca5 FB |
818 | RETURN(); |
819 | } | |
d9bce9d9 | 820 | #endif |
79aceca5 FB |
821 | |
822 | /* add extended */ | |
76a66253 | 823 | void OPPROTO op_adde (void) |
79aceca5 | 824 | { |
fdabc366 | 825 | do_adde(); |
76a66253 | 826 | RETURN(); |
79aceca5 FB |
827 | } |
828 | ||
d9bce9d9 JM |
829 | #if defined(TARGET_PPC64) |
830 | void OPPROTO op_adde_64 (void) | |
79aceca5 | 831 | { |
d9bce9d9 | 832 | do_adde_64(); |
79aceca5 FB |
833 | RETURN(); |
834 | } | |
d9bce9d9 | 835 | #endif |
79aceca5 FB |
836 | |
837 | /* add immediate */ | |
36081602 | 838 | void OPPROTO op_addi (void) |
79aceca5 | 839 | { |
36081602 | 840 | T0 += (int32_t)PARAM1; |
79aceca5 FB |
841 | RETURN(); |
842 | } | |
843 | ||
d9bce9d9 JM |
844 | /* add to minus one extended */ |
845 | void OPPROTO op_add_me (void) | |
79aceca5 | 846 | { |
d9bce9d9 JM |
847 | T0 += xer_ca + (-1); |
848 | if (likely((uint32_t)T1 != 0)) | |
79aceca5 | 849 | xer_ca = 1; |
79aceca5 FB |
850 | RETURN(); |
851 | } | |
852 | ||
d9bce9d9 JM |
853 | #if defined(TARGET_PPC64) |
854 | void OPPROTO op_add_me_64 (void) | |
79aceca5 | 855 | { |
79aceca5 | 856 | T0 += xer_ca + (-1); |
d9bce9d9 | 857 | if (likely((uint64_t)T1 != 0)) |
79aceca5 FB |
858 | xer_ca = 1; |
859 | RETURN(); | |
860 | } | |
d9bce9d9 | 861 | #endif |
79aceca5 | 862 | |
76a66253 | 863 | void OPPROTO op_addmeo (void) |
79aceca5 | 864 | { |
fdabc366 | 865 | do_addmeo(); |
79aceca5 FB |
866 | RETURN(); |
867 | } | |
868 | ||
d9bce9d9 JM |
869 | void OPPROTO op_addmeo_64 (void) |
870 | { | |
871 | do_addmeo(); | |
872 | RETURN(); | |
873 | } | |
874 | ||
79aceca5 | 875 | /* add to zero extended */ |
d9bce9d9 | 876 | void OPPROTO op_add_ze (void) |
79aceca5 | 877 | { |
79aceca5 | 878 | T0 += xer_ca; |
79aceca5 FB |
879 | RETURN(); |
880 | } | |
881 | ||
d9bce9d9 JM |
882 | /* divide word */ |
883 | void OPPROTO op_divw (void) | |
79aceca5 | 884 | { |
d9bce9d9 JM |
885 | if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
886 | (int32_t)T1 == 0)) { | |
887 | T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31)); | |
888 | } else { | |
889 | T0 = (int32_t)T0 / (int32_t)T1; | |
890 | } | |
79aceca5 FB |
891 | RETURN(); |
892 | } | |
893 | ||
d9bce9d9 JM |
894 | #if defined(TARGET_PPC64) |
895 | void OPPROTO op_divd (void) | |
79aceca5 | 896 | { |
d9bce9d9 JM |
897 | if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) || |
898 | (int64_t)T1 == 0)) { | |
899 | T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63)); | |
79aceca5 | 900 | } else { |
d9bce9d9 | 901 | T0 = (int64_t)T0 / (int64_t)T1; |
79aceca5 FB |
902 | } |
903 | RETURN(); | |
904 | } | |
d9bce9d9 | 905 | #endif |
79aceca5 | 906 | |
76a66253 | 907 | void OPPROTO op_divwo (void) |
79aceca5 | 908 | { |
fdabc366 | 909 | do_divwo(); |
79aceca5 FB |
910 | RETURN(); |
911 | } | |
912 | ||
d9bce9d9 JM |
913 | #if defined(TARGET_PPC64) |
914 | void OPPROTO op_divdo (void) | |
915 | { | |
916 | do_divdo(); | |
917 | RETURN(); | |
918 | } | |
919 | #endif | |
920 | ||
79aceca5 | 921 | /* divide word unsigned */ |
d9bce9d9 JM |
922 | void OPPROTO op_divwu (void) |
923 | { | |
924 | if (unlikely(T1 == 0)) { | |
925 | T0 = 0; | |
926 | } else { | |
927 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
928 | } | |
929 | RETURN(); | |
930 | } | |
931 | ||
932 | #if defined(TARGET_PPC64) | |
933 | void OPPROTO op_divdu (void) | |
79aceca5 | 934 | { |
d9bce9d9 | 935 | if (unlikely(T1 == 0)) { |
79aceca5 FB |
936 | T0 = 0; |
937 | } else { | |
938 | T0 /= T1; | |
939 | } | |
940 | RETURN(); | |
941 | } | |
d9bce9d9 | 942 | #endif |
79aceca5 | 943 | |
76a66253 | 944 | void OPPROTO op_divwuo (void) |
79aceca5 | 945 | { |
fdabc366 | 946 | do_divwuo(); |
79aceca5 FB |
947 | RETURN(); |
948 | } | |
949 | ||
d9bce9d9 JM |
950 | #if defined(TARGET_PPC64) |
951 | void OPPROTO op_divduo (void) | |
952 | { | |
953 | do_divduo(); | |
954 | RETURN(); | |
955 | } | |
956 | #endif | |
957 | ||
79aceca5 | 958 | /* multiply high word */ |
d9bce9d9 | 959 | void OPPROTO op_mulhw (void) |
79aceca5 | 960 | { |
d9bce9d9 | 961 | T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32; |
79aceca5 FB |
962 | RETURN(); |
963 | } | |
964 | ||
d9bce9d9 JM |
965 | #if defined(TARGET_PPC64) |
966 | void OPPROTO op_mulhd (void) | |
967 | { | |
968 | uint64_t tl, th; | |
969 | ||
970 | do_imul64(&tl, &th); | |
971 | T0 = th; | |
972 | RETURN(); | |
973 | } | |
974 | #endif | |
975 | ||
79aceca5 | 976 | /* multiply high word unsigned */ |
d9bce9d9 | 977 | void OPPROTO op_mulhwu (void) |
79aceca5 | 978 | { |
d9bce9d9 | 979 | T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32; |
79aceca5 FB |
980 | RETURN(); |
981 | } | |
982 | ||
d9bce9d9 JM |
983 | #if defined(TARGET_PPC64) |
984 | void OPPROTO op_mulhdu (void) | |
985 | { | |
986 | uint64_t tl, th; | |
987 | ||
988 | do_mul64(&tl, &th); | |
989 | T0 = th; | |
990 | RETURN(); | |
991 | } | |
992 | #endif | |
993 | ||
79aceca5 | 994 | /* multiply low immediate */ |
36081602 | 995 | void OPPROTO op_mulli (void) |
79aceca5 | 996 | { |
d9bce9d9 | 997 | T0 = ((int32_t)T0 * (int32_t)PARAM1); |
79aceca5 FB |
998 | RETURN(); |
999 | } | |
1000 | ||
1001 | /* multiply low word */ | |
36081602 | 1002 | void OPPROTO op_mullw (void) |
d9bce9d9 JM |
1003 | { |
1004 | T0 = (int32_t)(T0 * T1); | |
1005 | RETURN(); | |
1006 | } | |
1007 | ||
1008 | #if defined(TARGET_PPC64) | |
1009 | void OPPROTO op_mulld (void) | |
79aceca5 FB |
1010 | { |
1011 | T0 *= T1; | |
1012 | RETURN(); | |
1013 | } | |
d9bce9d9 | 1014 | #endif |
79aceca5 | 1015 | |
76a66253 | 1016 | void OPPROTO op_mullwo (void) |
79aceca5 | 1017 | { |
fdabc366 | 1018 | do_mullwo(); |
79aceca5 FB |
1019 | RETURN(); |
1020 | } | |
1021 | ||
d9bce9d9 JM |
1022 | #if defined(TARGET_PPC64) |
1023 | void OPPROTO op_mulldo (void) | |
1024 | { | |
1025 | do_mulldo(); | |
1026 | RETURN(); | |
1027 | } | |
1028 | #endif | |
1029 | ||
79aceca5 | 1030 | /* negate */ |
d9bce9d9 | 1031 | void OPPROTO op_neg (void) |
79aceca5 | 1032 | { |
d9bce9d9 JM |
1033 | if (likely(T0 != INT32_MIN)) { |
1034 | T0 = -(int32_t)T0; | |
79aceca5 FB |
1035 | } |
1036 | RETURN(); | |
1037 | } | |
1038 | ||
d9bce9d9 JM |
1039 | #if defined(TARGET_PPC64) |
1040 | void OPPROTO op_neg_64 (void) | |
1041 | { | |
1042 | if (likely(T0 != INT64_MIN)) { | |
1043 | T0 = -(int64_t)T0; | |
1044 | } | |
1045 | RETURN(); | |
1046 | } | |
1047 | #endif | |
1048 | ||
76a66253 | 1049 | void OPPROTO op_nego (void) |
79aceca5 | 1050 | { |
fdabc366 | 1051 | do_nego(); |
79aceca5 FB |
1052 | RETURN(); |
1053 | } | |
1054 | ||
d9bce9d9 JM |
1055 | #if defined(TARGET_PPC64) |
1056 | void OPPROTO op_nego_64 (void) | |
1057 | { | |
1058 | do_nego_64(); | |
1059 | RETURN(); | |
1060 | } | |
1061 | #endif | |
1062 | ||
0cfec834 | 1063 | /* subtract from */ |
36081602 | 1064 | void OPPROTO op_subf (void) |
79aceca5 FB |
1065 | { |
1066 | T0 = T1 - T0; | |
1067 | RETURN(); | |
1068 | } | |
1069 | ||
d9bce9d9 JM |
1070 | void OPPROTO op_check_subfo (void) |
1071 | { | |
1072 | if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & | |
1073 | ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) { | |
1074 | xer_ov = 0; | |
1075 | } else { | |
d9bce9d9 | 1076 | xer_ov = 1; |
966439a6 | 1077 | xer_so = 1; |
d9bce9d9 JM |
1078 | } |
1079 | RETURN(); | |
1080 | } | |
1081 | ||
1082 | #if defined(TARGET_PPC64) | |
1083 | void OPPROTO op_check_subfo_64 (void) | |
79aceca5 | 1084 | { |
d9bce9d9 JM |
1085 | if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) & |
1086 | ((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) { | |
1087 | xer_ov = 0; | |
1088 | } else { | |
d9bce9d9 | 1089 | xer_ov = 1; |
966439a6 | 1090 | xer_so = 1; |
d9bce9d9 | 1091 | } |
79aceca5 FB |
1092 | RETURN(); |
1093 | } | |
d9bce9d9 | 1094 | #endif |
79aceca5 | 1095 | |
0cfec834 | 1096 | /* subtract from carrying */ |
d9bce9d9 | 1097 | void OPPROTO op_check_subfc (void) |
79aceca5 | 1098 | { |
d9bce9d9 | 1099 | if (likely((uint32_t)T0 > (uint32_t)T1)) { |
79aceca5 | 1100 | xer_ca = 0; |
d9bce9d9 JM |
1101 | } else { |
1102 | xer_ca = 1; | |
79aceca5 FB |
1103 | } |
1104 | RETURN(); | |
1105 | } | |
1106 | ||
d9bce9d9 JM |
1107 | #if defined(TARGET_PPC64) |
1108 | void OPPROTO op_check_subfc_64 (void) | |
79aceca5 | 1109 | { |
d9bce9d9 JM |
1110 | if (likely((uint64_t)T0 > (uint64_t)T1)) { |
1111 | xer_ca = 0; | |
1112 | } else { | |
1113 | xer_ca = 1; | |
1114 | } | |
79aceca5 FB |
1115 | RETURN(); |
1116 | } | |
d9bce9d9 | 1117 | #endif |
79aceca5 | 1118 | |
0cfec834 | 1119 | /* subtract from extended */ |
76a66253 | 1120 | void OPPROTO op_subfe (void) |
79aceca5 | 1121 | { |
fdabc366 | 1122 | do_subfe(); |
79aceca5 FB |
1123 | RETURN(); |
1124 | } | |
1125 | ||
d9bce9d9 JM |
1126 | #if defined(TARGET_PPC64) |
1127 | void OPPROTO op_subfe_64 (void) | |
79aceca5 | 1128 | { |
d9bce9d9 | 1129 | do_subfe_64(); |
79aceca5 FB |
1130 | RETURN(); |
1131 | } | |
d9bce9d9 | 1132 | #endif |
79aceca5 | 1133 | |
0cfec834 | 1134 | /* subtract from immediate carrying */ |
d9bce9d9 | 1135 | void OPPROTO op_subfic (void) |
79aceca5 | 1136 | { |
b6e27ab8 | 1137 | T0 = (int32_t)PARAM1 + ~T0 + 1; |
d9bce9d9 | 1138 | if ((uint32_t)T0 <= (uint32_t)PARAM1) { |
79aceca5 FB |
1139 | xer_ca = 1; |
1140 | } else { | |
1141 | xer_ca = 0; | |
1142 | } | |
1143 | RETURN(); | |
1144 | } | |
1145 | ||
d9bce9d9 JM |
1146 | #if defined(TARGET_PPC64) |
1147 | void OPPROTO op_subfic_64 (void) | |
1148 | { | |
2f401176 | 1149 | T0 = (int64_t)PARAM1 + ~T0 + 1; |
d9bce9d9 JM |
1150 | if ((uint64_t)T0 <= (uint64_t)PARAM1) { |
1151 | xer_ca = 1; | |
1152 | } else { | |
1153 | xer_ca = 0; | |
1154 | } | |
1155 | RETURN(); | |
1156 | } | |
1157 | #endif | |
1158 | ||
0cfec834 | 1159 | /* subtract from minus one extended */ |
d9bce9d9 | 1160 | void OPPROTO op_subfme (void) |
79aceca5 FB |
1161 | { |
1162 | T0 = ~T0 + xer_ca - 1; | |
d9bce9d9 JM |
1163 | if (likely((uint32_t)T0 != (uint32_t)-1)) |
1164 | xer_ca = 1; | |
1165 | RETURN(); | |
1166 | } | |
79aceca5 | 1167 | |
d9bce9d9 JM |
1168 | #if defined(TARGET_PPC64) |
1169 | void OPPROTO op_subfme_64 (void) | |
1170 | { | |
1171 | T0 = ~T0 + xer_ca - 1; | |
1172 | if (likely((uint64_t)T0 != (uint64_t)-1)) | |
79aceca5 FB |
1173 | xer_ca = 1; |
1174 | RETURN(); | |
1175 | } | |
d9bce9d9 | 1176 | #endif |
79aceca5 | 1177 | |
76a66253 | 1178 | void OPPROTO op_subfmeo (void) |
79aceca5 | 1179 | { |
fdabc366 | 1180 | do_subfmeo(); |
79aceca5 FB |
1181 | RETURN(); |
1182 | } | |
1183 | ||
d9bce9d9 JM |
1184 | #if defined(TARGET_PPC64) |
1185 | void OPPROTO op_subfmeo_64 (void) | |
1186 | { | |
1187 | do_subfmeo_64(); | |
1188 | RETURN(); | |
1189 | } | |
1190 | #endif | |
1191 | ||
0cfec834 | 1192 | /* subtract from zero extended */ |
d9bce9d9 | 1193 | void OPPROTO op_subfze (void) |
79aceca5 FB |
1194 | { |
1195 | T1 = ~T0; | |
1196 | T0 = T1 + xer_ca; | |
d9bce9d9 | 1197 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 FB |
1198 | xer_ca = 1; |
1199 | } else { | |
1200 | xer_ca = 0; | |
1201 | } | |
1202 | RETURN(); | |
1203 | } | |
1204 | ||
d9bce9d9 JM |
1205 | #if defined(TARGET_PPC64) |
1206 | void OPPROTO op_subfze_64 (void) | |
1207 | { | |
1208 | T1 = ~T0; | |
1209 | T0 = T1 + xer_ca; | |
1210 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1211 | xer_ca = 1; | |
1212 | } else { | |
1213 | xer_ca = 0; | |
1214 | } | |
1215 | RETURN(); | |
1216 | } | |
1217 | #endif | |
1218 | ||
76a66253 | 1219 | void OPPROTO op_subfzeo (void) |
79aceca5 | 1220 | { |
fdabc366 | 1221 | do_subfzeo(); |
79aceca5 FB |
1222 | RETURN(); |
1223 | } | |
1224 | ||
d9bce9d9 JM |
1225 | #if defined(TARGET_PPC64) |
1226 | void OPPROTO op_subfzeo_64 (void) | |
1227 | { | |
1228 | do_subfzeo_64(); | |
1229 | RETURN(); | |
1230 | } | |
1231 | #endif | |
1232 | ||
79aceca5 FB |
1233 | /*** Integer comparison ***/ |
1234 | /* compare */ | |
d9bce9d9 JM |
1235 | void OPPROTO op_cmp (void) |
1236 | { | |
1237 | if ((int32_t)T0 < (int32_t)T1) { | |
1238 | T0 = 0x08; | |
1239 | } else if ((int32_t)T0 > (int32_t)T1) { | |
1240 | T0 = 0x04; | |
1241 | } else { | |
1242 | T0 = 0x02; | |
1243 | } | |
966439a6 | 1244 | T0 |= xer_so; |
d9bce9d9 JM |
1245 | RETURN(); |
1246 | } | |
1247 | ||
1248 | #if defined(TARGET_PPC64) | |
1249 | void OPPROTO op_cmp_64 (void) | |
79aceca5 | 1250 | { |
d9bce9d9 | 1251 | if ((int64_t)T0 < (int64_t)T1) { |
79aceca5 | 1252 | T0 = 0x08; |
d9bce9d9 | 1253 | } else if ((int64_t)T0 > (int64_t)T1) { |
79aceca5 FB |
1254 | T0 = 0x04; |
1255 | } else { | |
1256 | T0 = 0x02; | |
1257 | } | |
966439a6 | 1258 | T0 |= xer_so; |
79aceca5 FB |
1259 | RETURN(); |
1260 | } | |
d9bce9d9 | 1261 | #endif |
79aceca5 FB |
1262 | |
1263 | /* compare immediate */ | |
d9bce9d9 | 1264 | void OPPROTO op_cmpi (void) |
79aceca5 | 1265 | { |
d9bce9d9 | 1266 | if ((int32_t)T0 < (int32_t)PARAM1) { |
79aceca5 | 1267 | T0 = 0x08; |
d9bce9d9 | 1268 | } else if ((int32_t)T0 > (int32_t)PARAM1) { |
79aceca5 FB |
1269 | T0 = 0x04; |
1270 | } else { | |
1271 | T0 = 0x02; | |
1272 | } | |
966439a6 | 1273 | T0 |= xer_so; |
79aceca5 FB |
1274 | RETURN(); |
1275 | } | |
1276 | ||
d9bce9d9 JM |
1277 | #if defined(TARGET_PPC64) |
1278 | void OPPROTO op_cmpi_64 (void) | |
1279 | { | |
1280 | if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) { | |
1281 | T0 = 0x08; | |
1282 | } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) { | |
1283 | T0 = 0x04; | |
1284 | } else { | |
1285 | T0 = 0x02; | |
1286 | } | |
966439a6 | 1287 | T0 |= xer_so; |
d9bce9d9 JM |
1288 | RETURN(); |
1289 | } | |
1290 | #endif | |
1291 | ||
79aceca5 | 1292 | /* compare logical */ |
d9bce9d9 | 1293 | void OPPROTO op_cmpl (void) |
79aceca5 | 1294 | { |
d9bce9d9 | 1295 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 | 1296 | T0 = 0x08; |
d9bce9d9 | 1297 | } else if ((uint32_t)T0 > (uint32_t)T1) { |
79aceca5 FB |
1298 | T0 = 0x04; |
1299 | } else { | |
1300 | T0 = 0x02; | |
1301 | } | |
966439a6 | 1302 | T0 |= xer_so; |
79aceca5 FB |
1303 | RETURN(); |
1304 | } | |
1305 | ||
d9bce9d9 JM |
1306 | #if defined(TARGET_PPC64) |
1307 | void OPPROTO op_cmpl_64 (void) | |
1308 | { | |
1309 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1310 | T0 = 0x08; | |
1311 | } else if ((uint64_t)T0 > (uint64_t)T1) { | |
1312 | T0 = 0x04; | |
1313 | } else { | |
1314 | T0 = 0x02; | |
1315 | } | |
966439a6 | 1316 | T0 |= xer_so; |
d9bce9d9 JM |
1317 | RETURN(); |
1318 | } | |
1319 | #endif | |
1320 | ||
79aceca5 | 1321 | /* compare logical immediate */ |
d9bce9d9 JM |
1322 | void OPPROTO op_cmpli (void) |
1323 | { | |
1324 | if ((uint32_t)T0 < (uint32_t)PARAM1) { | |
1325 | T0 = 0x08; | |
1326 | } else if ((uint32_t)T0 > (uint32_t)PARAM1) { | |
1327 | T0 = 0x04; | |
1328 | } else { | |
1329 | T0 = 0x02; | |
1330 | } | |
966439a6 | 1331 | T0 |= xer_so; |
d9bce9d9 JM |
1332 | RETURN(); |
1333 | } | |
1334 | ||
1335 | #if defined(TARGET_PPC64) | |
1336 | void OPPROTO op_cmpli_64 (void) | |
79aceca5 | 1337 | { |
d9bce9d9 | 1338 | if ((uint64_t)T0 < (uint64_t)PARAM1) { |
79aceca5 | 1339 | T0 = 0x08; |
d9bce9d9 | 1340 | } else if ((uint64_t)T0 > (uint64_t)PARAM1) { |
79aceca5 FB |
1341 | T0 = 0x04; |
1342 | } else { | |
1343 | T0 = 0x02; | |
1344 | } | |
966439a6 | 1345 | T0 |= xer_so; |
79aceca5 FB |
1346 | RETURN(); |
1347 | } | |
d9bce9d9 JM |
1348 | #endif |
1349 | ||
1350 | void OPPROTO op_isel (void) | |
1351 | { | |
1352 | if (T0) | |
1353 | T0 = T1; | |
1354 | else | |
1355 | T0 = T2; | |
1356 | RETURN(); | |
1357 | } | |
1358 | ||
1359 | void OPPROTO op_popcntb (void) | |
1360 | { | |
1361 | do_popcntb(); | |
1362 | RETURN(); | |
1363 | } | |
1364 | ||
1365 | #if defined(TARGET_PPC64) | |
1366 | void OPPROTO op_popcntb_64 (void) | |
1367 | { | |
1368 | do_popcntb_64(); | |
1369 | RETURN(); | |
1370 | } | |
1371 | #endif | |
79aceca5 FB |
1372 | |
1373 | /*** Integer logical ***/ | |
1374 | /* and */ | |
36081602 | 1375 | void OPPROTO op_and (void) |
79aceca5 FB |
1376 | { |
1377 | T0 &= T1; | |
1378 | RETURN(); | |
1379 | } | |
1380 | ||
1381 | /* andc */ | |
36081602 | 1382 | void OPPROTO op_andc (void) |
79aceca5 FB |
1383 | { |
1384 | T0 &= ~T1; | |
1385 | RETURN(); | |
1386 | } | |
1387 | ||
1388 | /* andi. */ | |
76a66253 | 1389 | void OPPROTO op_andi_T0 (void) |
79aceca5 | 1390 | { |
2f401176 | 1391 | T0 &= (uint32_t)PARAM1; |
79aceca5 FB |
1392 | RETURN(); |
1393 | } | |
1394 | ||
76a66253 JM |
1395 | void OPPROTO op_andi_T1 (void) |
1396 | { | |
2f401176 | 1397 | T1 &= (uint32_t)PARAM1; |
76a66253 JM |
1398 | RETURN(); |
1399 | } | |
1400 | ||
40d0591e JM |
1401 | #if defined(TARGET_PPC64) |
1402 | void OPPROTO op_andi_T0_64 (void) | |
1403 | { | |
2f401176 | 1404 | T0 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1405 | RETURN(); |
1406 | } | |
1407 | ||
1408 | void OPPROTO op_andi_T1_64 (void) | |
1409 | { | |
2f401176 | 1410 | T1 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1411 | RETURN(); |
1412 | } | |
1413 | #endif | |
1414 | ||
1415 | ||
79aceca5 | 1416 | /* count leading zero */ |
76a66253 | 1417 | void OPPROTO op_cntlzw (void) |
79aceca5 | 1418 | { |
0487d6a8 | 1419 | T0 = _do_cntlzw(T0); |
79aceca5 FB |
1420 | RETURN(); |
1421 | } | |
1422 | ||
d9bce9d9 JM |
1423 | #if defined(TARGET_PPC64) |
1424 | void OPPROTO op_cntlzd (void) | |
1425 | { | |
0487d6a8 | 1426 | T0 = _do_cntlzd(T0); |
d9bce9d9 JM |
1427 | RETURN(); |
1428 | } | |
1429 | #endif | |
1430 | ||
79aceca5 | 1431 | /* eqv */ |
36081602 | 1432 | void OPPROTO op_eqv (void) |
79aceca5 FB |
1433 | { |
1434 | T0 = ~(T0 ^ T1); | |
1435 | RETURN(); | |
1436 | } | |
1437 | ||
1438 | /* extend sign byte */ | |
d9bce9d9 | 1439 | void OPPROTO op_extsb (void) |
79aceca5 | 1440 | { |
d9bce9d9 JM |
1441 | #if defined (TARGET_PPC64) |
1442 | T0 = (int64_t)((int8_t)T0); | |
1443 | #else | |
1444 | T0 = (int32_t)((int8_t)T0); | |
1445 | #endif | |
79aceca5 FB |
1446 | RETURN(); |
1447 | } | |
1448 | ||
1449 | /* extend sign half word */ | |
d9bce9d9 | 1450 | void OPPROTO op_extsh (void) |
79aceca5 | 1451 | { |
d9bce9d9 JM |
1452 | #if defined (TARGET_PPC64) |
1453 | T0 = (int64_t)((int16_t)T0); | |
1454 | #else | |
1455 | T0 = (int32_t)((int16_t)T0); | |
1456 | #endif | |
79aceca5 FB |
1457 | RETURN(); |
1458 | } | |
1459 | ||
d9bce9d9 JM |
1460 | #if defined (TARGET_PPC64) |
1461 | void OPPROTO op_extsw (void) | |
1462 | { | |
1463 | T0 = (int64_t)((int32_t)T0); | |
1464 | RETURN(); | |
1465 | } | |
1466 | #endif | |
1467 | ||
79aceca5 | 1468 | /* nand */ |
36081602 | 1469 | void OPPROTO op_nand (void) |
79aceca5 FB |
1470 | { |
1471 | T0 = ~(T0 & T1); | |
1472 | RETURN(); | |
1473 | } | |
1474 | ||
1475 | /* nor */ | |
36081602 | 1476 | void OPPROTO op_nor (void) |
79aceca5 FB |
1477 | { |
1478 | T0 = ~(T0 | T1); | |
1479 | RETURN(); | |
1480 | } | |
1481 | ||
1482 | /* or */ | |
36081602 | 1483 | void OPPROTO op_or (void) |
79aceca5 FB |
1484 | { |
1485 | T0 |= T1; | |
1486 | RETURN(); | |
1487 | } | |
1488 | ||
1489 | /* orc */ | |
36081602 | 1490 | void OPPROTO op_orc (void) |
79aceca5 FB |
1491 | { |
1492 | T0 |= ~T1; | |
1493 | RETURN(); | |
1494 | } | |
1495 | ||
1496 | /* ori */ | |
36081602 | 1497 | void OPPROTO op_ori (void) |
79aceca5 | 1498 | { |
2f401176 | 1499 | T0 |= (uint32_t)PARAM1; |
79aceca5 FB |
1500 | RETURN(); |
1501 | } | |
1502 | ||
1503 | /* xor */ | |
36081602 | 1504 | void OPPROTO op_xor (void) |
79aceca5 FB |
1505 | { |
1506 | T0 ^= T1; | |
1507 | RETURN(); | |
1508 | } | |
1509 | ||
1510 | /* xori */ | |
36081602 | 1511 | void OPPROTO op_xori (void) |
79aceca5 | 1512 | { |
2f401176 | 1513 | T0 ^= (uint32_t)PARAM1; |
79aceca5 FB |
1514 | RETURN(); |
1515 | } | |
1516 | ||
1517 | /*** Integer rotate ***/ | |
76a66253 | 1518 | void OPPROTO op_rotl32_T0_T1 (void) |
79aceca5 | 1519 | { |
76a66253 | 1520 | T0 = rotl32(T0, T1 & 0x1F); |
79aceca5 FB |
1521 | RETURN(); |
1522 | } | |
1523 | ||
76a66253 | 1524 | void OPPROTO op_rotli32_T0 (void) |
79aceca5 | 1525 | { |
76a66253 | 1526 | T0 = rotl32(T0, PARAM1); |
79aceca5 FB |
1527 | RETURN(); |
1528 | } | |
1529 | ||
51789c41 JM |
1530 | #if defined(TARGET_PPC64) |
1531 | void OPPROTO op_rotl64_T0_T1 (void) | |
1532 | { | |
1533 | T0 = rotl64(T0, T1 & 0x3F); | |
1534 | RETURN(); | |
1535 | } | |
1536 | ||
1537 | void OPPROTO op_rotli64_T0 (void) | |
1538 | { | |
1539 | T0 = rotl64(T0, PARAM1); | |
1540 | RETURN(); | |
1541 | } | |
1542 | #endif | |
1543 | ||
79aceca5 FB |
1544 | /*** Integer shift ***/ |
1545 | /* shift left word */ | |
d9bce9d9 | 1546 | void OPPROTO op_slw (void) |
79aceca5 FB |
1547 | { |
1548 | if (T1 & 0x20) { | |
1549 | T0 = 0; | |
d9bce9d9 JM |
1550 | } else { |
1551 | T0 = (uint32_t)(T0 << T1); | |
1552 | } | |
1553 | RETURN(); | |
1554 | } | |
1555 | ||
1556 | #if defined(TARGET_PPC64) | |
1557 | void OPPROTO op_sld (void) | |
1558 | { | |
1559 | if (T1 & 0x40) { | |
1560 | T0 = 0; | |
79aceca5 FB |
1561 | } else { |
1562 | T0 = T0 << T1; | |
1563 | } | |
1564 | RETURN(); | |
1565 | } | |
d9bce9d9 | 1566 | #endif |
79aceca5 FB |
1567 | |
1568 | /* shift right algebraic word */ | |
76a66253 | 1569 | void OPPROTO op_sraw (void) |
79aceca5 | 1570 | { |
9a64fbe4 | 1571 | do_sraw(); |
79aceca5 FB |
1572 | RETURN(); |
1573 | } | |
1574 | ||
d9bce9d9 JM |
1575 | #if defined(TARGET_PPC64) |
1576 | void OPPROTO op_srad (void) | |
1577 | { | |
1578 | do_srad(); | |
1579 | RETURN(); | |
1580 | } | |
1581 | #endif | |
1582 | ||
79aceca5 | 1583 | /* shift right algebraic word immediate */ |
d9bce9d9 | 1584 | void OPPROTO op_srawi (void) |
79aceca5 | 1585 | { |
d9bce9d9 JM |
1586 | uint32_t mask = (uint32_t)PARAM2; |
1587 | ||
1588 | T0 = (int32_t)T0 >> PARAM1; | |
1589 | if ((int32_t)T1 < 0 && (T1 & mask) != 0) { | |
79aceca5 FB |
1590 | xer_ca = 1; |
1591 | } else { | |
1592 | xer_ca = 0; | |
1593 | } | |
1594 | RETURN(); | |
1595 | } | |
1596 | ||
d9bce9d9 JM |
1597 | #if defined(TARGET_PPC64) |
1598 | void OPPROTO op_sradi (void) | |
1599 | { | |
1600 | uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3; | |
1601 | ||
1602 | T0 = (int64_t)T0 >> PARAM1; | |
1603 | if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) { | |
1604 | xer_ca = 1; | |
1605 | } else { | |
1606 | xer_ca = 0; | |
1607 | } | |
1608 | RETURN(); | |
1609 | } | |
1610 | #endif | |
1611 | ||
79aceca5 | 1612 | /* shift right word */ |
d9bce9d9 | 1613 | void OPPROTO op_srw (void) |
79aceca5 FB |
1614 | { |
1615 | if (T1 & 0x20) { | |
1616 | T0 = 0; | |
1617 | } else { | |
d9bce9d9 JM |
1618 | T0 = (uint32_t)T0 >> T1; |
1619 | } | |
1620 | RETURN(); | |
1621 | } | |
1622 | ||
1623 | #if defined(TARGET_PPC64) | |
1624 | void OPPROTO op_srd (void) | |
1625 | { | |
1626 | if (T1 & 0x40) { | |
1627 | T0 = 0; | |
1628 | } else { | |
1629 | T0 = (uint64_t)T0 >> T1; | |
79aceca5 FB |
1630 | } |
1631 | RETURN(); | |
1632 | } | |
d9bce9d9 | 1633 | #endif |
79aceca5 | 1634 | |
76a66253 JM |
1635 | void OPPROTO op_sl_T0_T1 (void) |
1636 | { | |
1637 | T0 = T0 << T1; | |
1638 | RETURN(); | |
1639 | } | |
1640 | ||
1641 | void OPPROTO op_sli_T0 (void) | |
1642 | { | |
1643 | T0 = T0 << PARAM1; | |
1644 | RETURN(); | |
1645 | } | |
1646 | ||
1647 | void OPPROTO op_srl_T0_T1 (void) | |
1648 | { | |
d9bce9d9 JM |
1649 | T0 = (uint32_t)T0 >> T1; |
1650 | RETURN(); | |
1651 | } | |
1652 | ||
1653 | #if defined(TARGET_PPC64) | |
1654 | void OPPROTO op_srl_T0_T1_64 (void) | |
1655 | { | |
1656 | T0 = (uint32_t)T0 >> T1; | |
76a66253 JM |
1657 | RETURN(); |
1658 | } | |
d9bce9d9 | 1659 | #endif |
76a66253 JM |
1660 | |
1661 | void OPPROTO op_srli_T0 (void) | |
1662 | { | |
d9bce9d9 | 1663 | T0 = (uint32_t)T0 >> PARAM1; |
76a66253 JM |
1664 | RETURN(); |
1665 | } | |
1666 | ||
d9bce9d9 JM |
1667 | #if defined(TARGET_PPC64) |
1668 | void OPPROTO op_srli_T0_64 (void) | |
1669 | { | |
1670 | T0 = (uint64_t)T0 >> PARAM1; | |
1671 | RETURN(); | |
1672 | } | |
1673 | #endif | |
1674 | ||
76a66253 JM |
1675 | void OPPROTO op_srli_T1 (void) |
1676 | { | |
d9bce9d9 | 1677 | T1 = (uint32_t)T1 >> PARAM1; |
76a66253 JM |
1678 | RETURN(); |
1679 | } | |
1680 | ||
d9bce9d9 JM |
1681 | #if defined(TARGET_PPC64) |
1682 | void OPPROTO op_srli_T1_64 (void) | |
1683 | { | |
1684 | T1 = (uint64_t)T1 >> PARAM1; | |
1685 | RETURN(); | |
1686 | } | |
1687 | #endif | |
1688 | ||
79aceca5 | 1689 | /*** Floating-Point arithmetic ***/ |
9a64fbe4 | 1690 | /* fadd - fadd. */ |
36081602 | 1691 | void OPPROTO op_fadd (void) |
79aceca5 | 1692 | { |
76a66253 | 1693 | FT0 = float64_add(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1694 | RETURN(); |
1695 | } | |
1696 | ||
9a64fbe4 | 1697 | /* fsub - fsub. */ |
36081602 | 1698 | void OPPROTO op_fsub (void) |
79aceca5 | 1699 | { |
76a66253 | 1700 | FT0 = float64_sub(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1701 | RETURN(); |
1702 | } | |
1703 | ||
9a64fbe4 | 1704 | /* fmul - fmul. */ |
36081602 | 1705 | void OPPROTO op_fmul (void) |
79aceca5 | 1706 | { |
76a66253 | 1707 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1708 | RETURN(); |
1709 | } | |
1710 | ||
9a64fbe4 | 1711 | /* fdiv - fdiv. */ |
36081602 | 1712 | void OPPROTO op_fdiv (void) |
79aceca5 | 1713 | { |
fdabc366 | 1714 | FT0 = float64_div(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1715 | RETURN(); |
1716 | } | |
28b6751f | 1717 | |
9a64fbe4 | 1718 | /* fsqrt - fsqrt. */ |
36081602 | 1719 | void OPPROTO op_fsqrt (void) |
28b6751f | 1720 | { |
9a64fbe4 FB |
1721 | do_fsqrt(); |
1722 | RETURN(); | |
28b6751f FB |
1723 | } |
1724 | ||
d7e4b87e JM |
1725 | /* fre - fre. */ |
1726 | void OPPROTO op_fre (void) | |
1727 | { | |
1728 | do_fre(); | |
1729 | RETURN(); | |
1730 | } | |
1731 | ||
9a64fbe4 | 1732 | /* fres - fres. */ |
36081602 | 1733 | void OPPROTO op_fres (void) |
28b6751f | 1734 | { |
9a64fbe4 FB |
1735 | do_fres(); |
1736 | RETURN(); | |
28b6751f FB |
1737 | } |
1738 | ||
9a64fbe4 | 1739 | /* frsqrte - frsqrte. */ |
36081602 | 1740 | void OPPROTO op_frsqrte (void) |
28b6751f | 1741 | { |
4ecc3190 | 1742 | do_frsqrte(); |
9a64fbe4 | 1743 | RETURN(); |
28b6751f FB |
1744 | } |
1745 | ||
9a64fbe4 | 1746 | /* fsel - fsel. */ |
36081602 | 1747 | void OPPROTO op_fsel (void) |
28b6751f | 1748 | { |
9a64fbe4 FB |
1749 | do_fsel(); |
1750 | RETURN(); | |
28b6751f FB |
1751 | } |
1752 | ||
9a64fbe4 FB |
1753 | /*** Floating-Point multiply-and-add ***/ |
1754 | /* fmadd - fmadd. */ | |
36081602 | 1755 | void OPPROTO op_fmadd (void) |
28b6751f | 1756 | { |
e864cabd JM |
1757 | #if USE_PRECISE_EMULATION |
1758 | do_fmadd(); | |
1759 | #else | |
76a66253 JM |
1760 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1761 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 1762 | #endif |
9a64fbe4 | 1763 | RETURN(); |
28b6751f FB |
1764 | } |
1765 | ||
9a64fbe4 | 1766 | /* fmsub - fmsub. */ |
36081602 | 1767 | void OPPROTO op_fmsub (void) |
28b6751f | 1768 | { |
e864cabd JM |
1769 | #if USE_PRECISE_EMULATION |
1770 | do_fmsub(); | |
1771 | #else | |
76a66253 JM |
1772 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1773 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 1774 | #endif |
9a64fbe4 | 1775 | RETURN(); |
28b6751f FB |
1776 | } |
1777 | ||
9a64fbe4 | 1778 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
36081602 | 1779 | void OPPROTO op_fnmadd (void) |
28b6751f | 1780 | { |
4b3686fa | 1781 | do_fnmadd(); |
9a64fbe4 | 1782 | RETURN(); |
28b6751f FB |
1783 | } |
1784 | ||
9a64fbe4 | 1785 | /* fnmsub - fnmsub. */ |
36081602 | 1786 | void OPPROTO op_fnmsub (void) |
28b6751f | 1787 | { |
4b3686fa | 1788 | do_fnmsub(); |
9a64fbe4 | 1789 | RETURN(); |
28b6751f FB |
1790 | } |
1791 | ||
9a64fbe4 FB |
1792 | /*** Floating-Point round & convert ***/ |
1793 | /* frsp - frsp. */ | |
36081602 | 1794 | void OPPROTO op_frsp (void) |
28b6751f | 1795 | { |
76a66253 | 1796 | FT0 = float64_to_float32(FT0, &env->fp_status); |
9a64fbe4 | 1797 | RETURN(); |
28b6751f FB |
1798 | } |
1799 | ||
9a64fbe4 | 1800 | /* fctiw - fctiw. */ |
36081602 | 1801 | void OPPROTO op_fctiw (void) |
28b6751f | 1802 | { |
9a64fbe4 FB |
1803 | do_fctiw(); |
1804 | RETURN(); | |
28b6751f FB |
1805 | } |
1806 | ||
9a64fbe4 | 1807 | /* fctiwz - fctiwz. */ |
36081602 | 1808 | void OPPROTO op_fctiwz (void) |
28b6751f | 1809 | { |
9a64fbe4 FB |
1810 | do_fctiwz(); |
1811 | RETURN(); | |
28b6751f FB |
1812 | } |
1813 | ||
426613db JM |
1814 | #if defined(TARGET_PPC64) |
1815 | /* fcfid - fcfid. */ | |
36081602 | 1816 | void OPPROTO op_fcfid (void) |
426613db JM |
1817 | { |
1818 | do_fcfid(); | |
1819 | RETURN(); | |
1820 | } | |
1821 | ||
1822 | /* fctid - fctid. */ | |
36081602 | 1823 | void OPPROTO op_fctid (void) |
426613db JM |
1824 | { |
1825 | do_fctid(); | |
1826 | RETURN(); | |
1827 | } | |
1828 | ||
1829 | /* fctidz - fctidz. */ | |
36081602 | 1830 | void OPPROTO op_fctidz (void) |
426613db JM |
1831 | { |
1832 | do_fctidz(); | |
1833 | RETURN(); | |
1834 | } | |
1835 | #endif | |
1836 | ||
d7e4b87e JM |
1837 | void OPPROTO op_frin (void) |
1838 | { | |
1839 | do_frin(); | |
1840 | RETURN(); | |
1841 | } | |
1842 | ||
1843 | void OPPROTO op_friz (void) | |
1844 | { | |
1845 | do_friz(); | |
1846 | RETURN(); | |
1847 | } | |
1848 | ||
1849 | void OPPROTO op_frip (void) | |
1850 | { | |
1851 | do_frip(); | |
1852 | RETURN(); | |
1853 | } | |
1854 | ||
1855 | void OPPROTO op_frim (void) | |
1856 | { | |
1857 | do_frim(); | |
1858 | RETURN(); | |
1859 | } | |
1860 | ||
9a64fbe4 FB |
1861 | /*** Floating-Point compare ***/ |
1862 | /* fcmpu */ | |
36081602 | 1863 | void OPPROTO op_fcmpu (void) |
28b6751f | 1864 | { |
9a64fbe4 FB |
1865 | do_fcmpu(); |
1866 | RETURN(); | |
28b6751f FB |
1867 | } |
1868 | ||
9a64fbe4 | 1869 | /* fcmpo */ |
36081602 | 1870 | void OPPROTO op_fcmpo (void) |
fb0eaffc | 1871 | { |
9a64fbe4 FB |
1872 | do_fcmpo(); |
1873 | RETURN(); | |
fb0eaffc FB |
1874 | } |
1875 | ||
9a64fbe4 FB |
1876 | /*** Floating-point move ***/ |
1877 | /* fabs */ | |
36081602 | 1878 | void OPPROTO op_fabs (void) |
fb0eaffc | 1879 | { |
fdabc366 | 1880 | FT0 = float64_abs(FT0); |
fb0eaffc FB |
1881 | RETURN(); |
1882 | } | |
1883 | ||
9a64fbe4 | 1884 | /* fnabs */ |
36081602 | 1885 | void OPPROTO op_fnabs (void) |
fb0eaffc | 1886 | { |
fdabc366 FB |
1887 | FT0 = float64_abs(FT0); |
1888 | FT0 = float64_chs(FT0); | |
fb0eaffc FB |
1889 | RETURN(); |
1890 | } | |
1891 | ||
9a64fbe4 | 1892 | /* fneg */ |
36081602 | 1893 | void OPPROTO op_fneg (void) |
fb0eaffc | 1894 | { |
fdabc366 | 1895 | FT0 = float64_chs(FT0); |
fb0eaffc FB |
1896 | RETURN(); |
1897 | } | |
1898 | ||
9a64fbe4 | 1899 | /* Load and store */ |
9a64fbe4 | 1900 | #define MEMSUFFIX _raw |
76a66253 | 1901 | #include "op_helper.h" |
9a64fbe4 | 1902 | #include "op_mem.h" |
a541f297 | 1903 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1904 | #define MEMSUFFIX _user |
76a66253 | 1905 | #include "op_helper.h" |
9a64fbe4 | 1906 | #include "op_mem.h" |
9a64fbe4 | 1907 | #define MEMSUFFIX _kernel |
76a66253 | 1908 | #include "op_helper.h" |
9a64fbe4 FB |
1909 | #include "op_mem.h" |
1910 | #endif | |
1911 | ||
4b3686fa | 1912 | /* Special op to check and maybe clear reservation */ |
d9bce9d9 | 1913 | void OPPROTO op_check_reservation (void) |
4b3686fa | 1914 | { |
fdabc366 FB |
1915 | if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003)) |
1916 | env->reserve = -1; | |
4b3686fa FB |
1917 | RETURN(); |
1918 | } | |
1919 | ||
d9bce9d9 JM |
1920 | #if defined(TARGET_PPC64) |
1921 | void OPPROTO op_check_reservation_64 (void) | |
1922 | { | |
1923 | if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003)) | |
1924 | env->reserve = -1; | |
1925 | RETURN(); | |
1926 | } | |
1927 | #endif | |
1928 | ||
be147d08 JM |
1929 | void OPPROTO op_wait (void) |
1930 | { | |
1931 | env->halted = 1; | |
1932 | RETURN(); | |
1933 | } | |
1934 | ||
9a64fbe4 | 1935 | /* Return from interrupt */ |
76a66253 JM |
1936 | #if !defined(CONFIG_USER_ONLY) |
1937 | void OPPROTO op_rfi (void) | |
28b6751f | 1938 | { |
fdabc366 | 1939 | do_rfi(); |
fb0eaffc FB |
1940 | RETURN(); |
1941 | } | |
d9bce9d9 JM |
1942 | |
1943 | #if defined(TARGET_PPC64) | |
426613db JM |
1944 | void OPPROTO op_rfid (void) |
1945 | { | |
1946 | do_rfid(); | |
1947 | RETURN(); | |
1948 | } | |
d9bce9d9 | 1949 | #endif |
be147d08 JM |
1950 | |
1951 | #if defined(TARGET_PPC64H) | |
1952 | void OPPROTO op_hrfid (void) | |
1953 | { | |
1954 | do_hrfid(); | |
1955 | RETURN(); | |
1956 | } | |
1957 | #endif | |
6f5d427d JM |
1958 | |
1959 | /* Exception vectors */ | |
1960 | void OPPROTO op_store_excp_prefix (void) | |
1961 | { | |
1962 | T0 &= env->ivpr_mask; | |
1963 | env->excp_prefix = T0; | |
1964 | RETURN(); | |
1965 | } | |
1966 | ||
1967 | void OPPROTO op_store_excp_vector (void) | |
1968 | { | |
1969 | T0 &= env->ivor_mask; | |
1970 | env->excp_vectors[PARAM1] = T0; | |
1971 | RETURN(); | |
1972 | } | |
76a66253 | 1973 | #endif |
fb0eaffc | 1974 | |
9a64fbe4 | 1975 | /* Trap word */ |
76a66253 | 1976 | void OPPROTO op_tw (void) |
fb0eaffc | 1977 | { |
76a66253 | 1978 | do_tw(PARAM1); |
fb0eaffc FB |
1979 | RETURN(); |
1980 | } | |
1981 | ||
d9bce9d9 JM |
1982 | #if defined(TARGET_PPC64) |
1983 | void OPPROTO op_td (void) | |
1984 | { | |
1985 | do_td(PARAM1); | |
1986 | RETURN(); | |
1987 | } | |
1988 | #endif | |
1989 | ||
76a66253 | 1990 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1991 | /* tlbia */ |
36081602 | 1992 | void OPPROTO op_tlbia (void) |
fb0eaffc | 1993 | { |
daf4f96e | 1994 | ppc_tlb_invalidate_all(env); |
9a64fbe4 FB |
1995 | RETURN(); |
1996 | } | |
1997 | ||
1998 | /* tlbie */ | |
d9bce9d9 | 1999 | void OPPROTO op_tlbie (void) |
9a64fbe4 | 2000 | { |
daf4f96e | 2001 | ppc_tlb_invalidate_one(env, (uint32_t)T0); |
fb0eaffc | 2002 | RETURN(); |
28b6751f | 2003 | } |
d9bce9d9 JM |
2004 | |
2005 | #if defined(TARGET_PPC64) | |
2006 | void OPPROTO op_tlbie_64 (void) | |
2007 | { | |
daf4f96e | 2008 | ppc_tlb_invalidate_one(env, T0); |
d9bce9d9 JM |
2009 | RETURN(); |
2010 | } | |
2011 | #endif | |
2012 | ||
2013 | #if defined(TARGET_PPC64) | |
2014 | void OPPROTO op_slbia (void) | |
2015 | { | |
daf4f96e | 2016 | ppc_slb_invalidate_all(env); |
d9bce9d9 JM |
2017 | RETURN(); |
2018 | } | |
2019 | ||
2020 | void OPPROTO op_slbie (void) | |
2021 | { | |
daf4f96e JM |
2022 | ppc_slb_invalidate_one(env, (uint32_t)T0); |
2023 | RETURN(); | |
2024 | } | |
2025 | ||
2026 | void OPPROTO op_slbie_64 (void) | |
2027 | { | |
2028 | ppc_slb_invalidate_one(env, T0); | |
d9bce9d9 JM |
2029 | RETURN(); |
2030 | } | |
2031 | #endif | |
76a66253 | 2032 | #endif |
3fc6c082 | 2033 | |
76a66253 | 2034 | #if !defined(CONFIG_USER_ONLY) |
7dbe11ac | 2035 | /* PowerPC 602/603/755 software TLB load instructions */ |
76a66253 JM |
2036 | void OPPROTO op_6xx_tlbld (void) |
2037 | { | |
2038 | do_load_6xx_tlb(0); | |
2039 | RETURN(); | |
2040 | } | |
2041 | ||
2042 | void OPPROTO op_6xx_tlbli (void) | |
2043 | { | |
2044 | do_load_6xx_tlb(1); | |
2045 | RETURN(); | |
2046 | } | |
7dbe11ac JM |
2047 | |
2048 | /* PowerPC 74xx software TLB load instructions */ | |
2049 | void OPPROTO op_74xx_tlbld (void) | |
2050 | { | |
2051 | do_load_74xx_tlb(0); | |
2052 | RETURN(); | |
2053 | } | |
2054 | ||
2055 | void OPPROTO op_74xx_tlbli (void) | |
2056 | { | |
2057 | do_load_74xx_tlb(1); | |
2058 | RETURN(); | |
2059 | } | |
76a66253 JM |
2060 | #endif |
2061 | ||
2062 | /* 601 specific */ | |
76a66253 JM |
2063 | void OPPROTO op_load_601_rtcl (void) |
2064 | { | |
2065 | T0 = cpu_ppc601_load_rtcl(env); | |
2066 | RETURN(); | |
2067 | } | |
2068 | ||
76a66253 JM |
2069 | void OPPROTO op_load_601_rtcu (void) |
2070 | { | |
2071 | T0 = cpu_ppc601_load_rtcu(env); | |
2072 | RETURN(); | |
2073 | } | |
2074 | ||
2075 | #if !defined(CONFIG_USER_ONLY) | |
76a66253 JM |
2076 | void OPPROTO op_store_601_rtcl (void) |
2077 | { | |
2078 | cpu_ppc601_store_rtcl(env, T0); | |
2079 | RETURN(); | |
2080 | } | |
2081 | ||
76a66253 JM |
2082 | void OPPROTO op_store_601_rtcu (void) |
2083 | { | |
2084 | cpu_ppc601_store_rtcu(env, T0); | |
2085 | RETURN(); | |
2086 | } | |
2087 | ||
2088 | void OPPROTO op_load_601_bat (void) | |
2089 | { | |
2090 | T0 = env->IBAT[PARAM1][PARAM2]; | |
2091 | RETURN(); | |
2092 | } | |
2093 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2094 | ||
2095 | /* 601 unified BATs store. | |
2096 | * To avoid using specific MMU code for 601, we store BATs in | |
2097 | * IBAT and DBAT simultaneously, then emulate unified BATs. | |
2098 | */ | |
2099 | #if !defined(CONFIG_USER_ONLY) | |
2100 | void OPPROTO op_store_601_batl (void) | |
2101 | { | |
2102 | int nr = PARAM1; | |
2103 | ||
2104 | env->IBAT[1][nr] = T0; | |
2105 | env->DBAT[1][nr] = T0; | |
2106 | RETURN(); | |
2107 | } | |
2108 | ||
2109 | void OPPROTO op_store_601_batu (void) | |
2110 | { | |
2111 | do_store_601_batu(PARAM1); | |
2112 | RETURN(); | |
2113 | } | |
2114 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2115 | ||
2116 | /* PowerPC 601 specific instructions (POWER bridge) */ | |
2117 | /* XXX: those micro-ops need tests ! */ | |
2118 | void OPPROTO op_POWER_abs (void) | |
2119 | { | |
2120 | if (T0 == INT32_MIN) | |
2121 | T0 = INT32_MAX; | |
2122 | else if (T0 < 0) | |
2123 | T0 = -T0; | |
2124 | RETURN(); | |
2125 | } | |
2126 | ||
2127 | void OPPROTO op_POWER_abso (void) | |
2128 | { | |
2129 | do_POWER_abso(); | |
2130 | RETURN(); | |
2131 | } | |
2132 | ||
2133 | void OPPROTO op_POWER_clcs (void) | |
2134 | { | |
2135 | do_POWER_clcs(); | |
2136 | RETURN(); | |
2137 | } | |
2138 | ||
2139 | void OPPROTO op_POWER_div (void) | |
2140 | { | |
2141 | do_POWER_div(); | |
2142 | RETURN(); | |
2143 | } | |
2144 | ||
2145 | void OPPROTO op_POWER_divo (void) | |
2146 | { | |
2147 | do_POWER_divo(); | |
2148 | RETURN(); | |
2149 | } | |
2150 | ||
2151 | void OPPROTO op_POWER_divs (void) | |
2152 | { | |
2153 | do_POWER_divs(); | |
2154 | RETURN(); | |
2155 | } | |
2156 | ||
2157 | void OPPROTO op_POWER_divso (void) | |
2158 | { | |
2159 | do_POWER_divso(); | |
2160 | RETURN(); | |
2161 | } | |
2162 | ||
2163 | void OPPROTO op_POWER_doz (void) | |
2164 | { | |
d9bce9d9 | 2165 | if ((int32_t)T1 > (int32_t)T0) |
76a66253 JM |
2166 | T0 = T1 - T0; |
2167 | else | |
2168 | T0 = 0; | |
2169 | RETURN(); | |
2170 | } | |
2171 | ||
2172 | void OPPROTO op_POWER_dozo (void) | |
2173 | { | |
2174 | do_POWER_dozo(); | |
2175 | RETURN(); | |
2176 | } | |
2177 | ||
2178 | void OPPROTO op_load_xer_cmp (void) | |
2179 | { | |
2180 | T2 = xer_cmp; | |
2181 | RETURN(); | |
2182 | } | |
2183 | ||
2184 | void OPPROTO op_POWER_maskg (void) | |
2185 | { | |
2186 | do_POWER_maskg(); | |
2187 | RETURN(); | |
2188 | } | |
2189 | ||
2190 | void OPPROTO op_POWER_maskir (void) | |
2191 | { | |
2192 | T0 = (T0 & ~T2) | (T1 & T2); | |
2193 | RETURN(); | |
2194 | } | |
2195 | ||
2196 | void OPPROTO op_POWER_mul (void) | |
2197 | { | |
2198 | uint64_t tmp; | |
2199 | ||
2200 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
2201 | env->spr[SPR_MQ] = tmp >> 32; | |
2202 | T0 = tmp; | |
2203 | RETURN(); | |
2204 | } | |
2205 | ||
2206 | void OPPROTO op_POWER_mulo (void) | |
2207 | { | |
2208 | do_POWER_mulo(); | |
2209 | RETURN(); | |
2210 | } | |
2211 | ||
2212 | void OPPROTO op_POWER_nabs (void) | |
2213 | { | |
2214 | if (T0 > 0) | |
2215 | T0 = -T0; | |
2216 | RETURN(); | |
2217 | } | |
2218 | ||
2219 | void OPPROTO op_POWER_nabso (void) | |
2220 | { | |
2221 | /* nabs never overflows */ | |
2222 | if (T0 > 0) | |
2223 | T0 = -T0; | |
2224 | xer_ov = 0; | |
2225 | RETURN(); | |
2226 | } | |
2227 | ||
2228 | /* XXX: factorise POWER rotates... */ | |
2229 | void OPPROTO op_POWER_rlmi (void) | |
2230 | { | |
2231 | T0 = rotl32(T0, T2) & PARAM1; | |
2f401176 | 2232 | T0 |= T1 & (uint32_t)PARAM2; |
76a66253 JM |
2233 | RETURN(); |
2234 | } | |
2235 | ||
2236 | void OPPROTO op_POWER_rrib (void) | |
2237 | { | |
2238 | T2 &= 0x1FUL; | |
2239 | T0 = rotl32(T0 & INT32_MIN, T2); | |
2240 | T0 |= T1 & ~rotl32(INT32_MIN, T2); | |
2241 | RETURN(); | |
2242 | } | |
2243 | ||
2244 | void OPPROTO op_POWER_sle (void) | |
2245 | { | |
2246 | T1 &= 0x1FUL; | |
2247 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2248 | T0 = T0 << T1; | |
2249 | RETURN(); | |
2250 | } | |
2251 | ||
2252 | void OPPROTO op_POWER_sleq (void) | |
2253 | { | |
2254 | uint32_t tmp = env->spr[SPR_MQ]; | |
2255 | ||
2256 | T1 &= 0x1FUL; | |
2257 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2258 | T0 = T0 << T1; | |
2259 | T0 |= tmp >> (32 - T1); | |
2260 | RETURN(); | |
2261 | } | |
2262 | ||
2263 | void OPPROTO op_POWER_sllq (void) | |
2264 | { | |
2265 | uint32_t msk = -1; | |
2266 | ||
2267 | msk = msk << (T1 & 0x1FUL); | |
2268 | if (T1 & 0x20UL) | |
2269 | msk = ~msk; | |
2270 | T1 &= 0x1FUL; | |
2271 | T0 = (T0 << T1) & msk; | |
2272 | T0 |= env->spr[SPR_MQ] & ~msk; | |
2273 | RETURN(); | |
2274 | } | |
2275 | ||
2276 | void OPPROTO op_POWER_slq (void) | |
2277 | { | |
2278 | uint32_t msk = -1, tmp; | |
2279 | ||
2280 | msk = msk << (T1 & 0x1FUL); | |
2281 | if (T1 & 0x20UL) | |
2282 | msk = ~msk; | |
2283 | T1 &= 0x1FUL; | |
2284 | tmp = rotl32(T0, T1); | |
2285 | T0 = tmp & msk; | |
2286 | env->spr[SPR_MQ] = tmp; | |
2287 | RETURN(); | |
2288 | } | |
2289 | ||
2290 | void OPPROTO op_POWER_sraq (void) | |
2291 | { | |
2292 | env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL)); | |
2293 | if (T1 & 0x20UL) | |
2294 | T0 = -1L; | |
2295 | else | |
d9bce9d9 | 2296 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2297 | RETURN(); |
2298 | } | |
2299 | ||
2300 | void OPPROTO op_POWER_sre (void) | |
2301 | { | |
2302 | T1 &= 0x1FUL; | |
2303 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
d9bce9d9 | 2304 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2305 | RETURN(); |
2306 | } | |
2307 | ||
2308 | void OPPROTO op_POWER_srea (void) | |
2309 | { | |
2310 | T1 &= 0x1FUL; | |
2311 | env->spr[SPR_MQ] = T0 >> T1; | |
d9bce9d9 | 2312 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2313 | RETURN(); |
2314 | } | |
2315 | ||
2316 | void OPPROTO op_POWER_sreq (void) | |
2317 | { | |
2318 | uint32_t tmp; | |
2319 | int32_t msk; | |
2320 | ||
2321 | T1 &= 0x1FUL; | |
2322 | msk = INT32_MIN >> T1; | |
2323 | tmp = env->spr[SPR_MQ]; | |
2324 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2325 | T0 = T0 >> T1; | |
2326 | T0 |= tmp & msk; | |
2327 | RETURN(); | |
2328 | } | |
2329 | ||
2330 | void OPPROTO op_POWER_srlq (void) | |
2331 | { | |
2332 | uint32_t tmp; | |
2333 | int32_t msk; | |
2334 | ||
2335 | msk = INT32_MIN >> (T1 & 0x1FUL); | |
2336 | if (T1 & 0x20UL) | |
2337 | msk = ~msk; | |
2338 | T1 &= 0x1FUL; | |
2339 | tmp = env->spr[SPR_MQ]; | |
2340 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2341 | T0 = T0 >> T1; | |
2342 | T0 &= msk; | |
2343 | T0 |= tmp & ~msk; | |
2344 | RETURN(); | |
2345 | } | |
2346 | ||
2347 | void OPPROTO op_POWER_srq (void) | |
2348 | { | |
2349 | T1 &= 0x1FUL; | |
2350 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2351 | T0 = T0 >> T1; | |
2352 | RETURN(); | |
2353 | } | |
2354 | ||
2355 | /* POWER instructions not implemented in PowerPC 601 */ | |
2356 | #if !defined(CONFIG_USER_ONLY) | |
2357 | void OPPROTO op_POWER_mfsri (void) | |
2358 | { | |
2359 | T1 = T0 >> 28; | |
2360 | T0 = env->sr[T1]; | |
2361 | RETURN(); | |
2362 | } | |
2363 | ||
2364 | void OPPROTO op_POWER_rac (void) | |
2365 | { | |
2366 | do_POWER_rac(); | |
2367 | RETURN(); | |
2368 | } | |
2369 | ||
2370 | void OPPROTO op_POWER_rfsvc (void) | |
2371 | { | |
2372 | do_POWER_rfsvc(); | |
2373 | RETURN(); | |
2374 | } | |
2375 | #endif | |
2376 | ||
2377 | /* PowerPC 602 specific instruction */ | |
2378 | #if !defined(CONFIG_USER_ONLY) | |
2379 | void OPPROTO op_602_mfrom (void) | |
2380 | { | |
2381 | do_op_602_mfrom(); | |
2382 | RETURN(); | |
2383 | } | |
2384 | #endif | |
2385 | ||
2386 | /* PowerPC 4xx specific micro-ops */ | |
2387 | void OPPROTO op_405_add_T0_T2 (void) | |
2388 | { | |
2389 | T0 = (int32_t)T0 + (int32_t)T2; | |
2390 | RETURN(); | |
2391 | } | |
2392 | ||
2393 | void OPPROTO op_405_mulchw (void) | |
2394 | { | |
2395 | T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16)); | |
2396 | RETURN(); | |
2397 | } | |
2398 | ||
2399 | void OPPROTO op_405_mulchwu (void) | |
2400 | { | |
2401 | T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16)); | |
2402 | RETURN(); | |
2403 | } | |
2404 | ||
2405 | void OPPROTO op_405_mulhhw (void) | |
2406 | { | |
2407 | T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16)); | |
2408 | RETURN(); | |
2409 | } | |
2410 | ||
2411 | void OPPROTO op_405_mulhhwu (void) | |
2412 | { | |
2413 | T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16)); | |
2414 | RETURN(); | |
2415 | } | |
2416 | ||
2417 | void OPPROTO op_405_mullhw (void) | |
2418 | { | |
2419 | T0 = ((int16_t)T0) * ((int16_t)T1); | |
2420 | RETURN(); | |
2421 | } | |
2422 | ||
2423 | void OPPROTO op_405_mullhwu (void) | |
2424 | { | |
2425 | T0 = ((uint16_t)T0) * ((uint16_t)T1); | |
2426 | RETURN(); | |
2427 | } | |
2428 | ||
2429 | void OPPROTO op_405_check_ov (void) | |
2430 | { | |
2431 | do_405_check_ov(); | |
2432 | RETURN(); | |
2433 | } | |
2434 | ||
2435 | void OPPROTO op_405_check_sat (void) | |
2436 | { | |
2437 | do_405_check_sat(); | |
2438 | RETURN(); | |
2439 | } | |
2440 | ||
2441 | void OPPROTO op_405_check_ovu (void) | |
2442 | { | |
2443 | if (likely(T0 >= T2)) { | |
2444 | xer_ov = 0; | |
2445 | } else { | |
2446 | xer_ov = 1; | |
2447 | xer_so = 1; | |
2448 | } | |
2449 | RETURN(); | |
2450 | } | |
2451 | ||
2452 | void OPPROTO op_405_check_satu (void) | |
2453 | { | |
2454 | if (unlikely(T0 < T2)) { | |
2455 | /* Saturate result */ | |
2456 | T0 = -1; | |
2457 | } | |
2458 | RETURN(); | |
2459 | } | |
2460 | ||
a42bd6cc | 2461 | void OPPROTO op_load_dcr (void) |
76a66253 | 2462 | { |
a42bd6cc | 2463 | do_load_dcr(); |
76a66253 JM |
2464 | RETURN(); |
2465 | } | |
2466 | ||
a42bd6cc | 2467 | void OPPROTO op_store_dcr (void) |
76a66253 | 2468 | { |
a42bd6cc | 2469 | do_store_dcr(); |
76a66253 JM |
2470 | RETURN(); |
2471 | } | |
2472 | ||
a750fc0b | 2473 | #if !defined(CONFIG_USER_ONLY) |
76a66253 JM |
2474 | /* Return from critical interrupt : |
2475 | * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1 | |
2476 | */ | |
a42bd6cc JM |
2477 | void OPPROTO op_40x_rfci (void) |
2478 | { | |
2479 | do_40x_rfci(); | |
2480 | RETURN(); | |
2481 | } | |
2482 | ||
2483 | void OPPROTO op_rfci (void) | |
2484 | { | |
2485 | do_rfci(); | |
2486 | RETURN(); | |
2487 | } | |
2488 | ||
2489 | void OPPROTO op_rfdi (void) | |
2490 | { | |
2491 | do_rfdi(); | |
2492 | RETURN(); | |
2493 | } | |
2494 | ||
2495 | void OPPROTO op_rfmci (void) | |
76a66253 | 2496 | { |
a42bd6cc | 2497 | do_rfmci(); |
76a66253 JM |
2498 | RETURN(); |
2499 | } | |
2500 | ||
a42bd6cc | 2501 | void OPPROTO op_wrte (void) |
76a66253 JM |
2502 | { |
2503 | msr_ee = T0 >> 16; | |
2504 | RETURN(); | |
2505 | } | |
2506 | ||
a4bb6c3e | 2507 | void OPPROTO op_440_tlbre (void) |
5eb7995e | 2508 | { |
a4bb6c3e | 2509 | do_440_tlbre(PARAM1); |
5eb7995e JM |
2510 | RETURN(); |
2511 | } | |
2512 | ||
a4bb6c3e | 2513 | void OPPROTO op_440_tlbsx (void) |
5eb7995e | 2514 | { |
daf4f96e | 2515 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF); |
5eb7995e JM |
2516 | RETURN(); |
2517 | } | |
2518 | ||
daf4f96e | 2519 | void OPPROTO op_4xx_tlbsx_check (void) |
5eb7995e | 2520 | { |
daf4f96e JM |
2521 | int tmp; |
2522 | ||
2523 | tmp = xer_so; | |
2524 | if (T0 != -1) | |
2525 | tmp |= 0x02; | |
2526 | env->crf[0] = tmp; | |
5eb7995e JM |
2527 | RETURN(); |
2528 | } | |
2529 | ||
a4bb6c3e | 2530 | void OPPROTO op_440_tlbwe (void) |
5eb7995e | 2531 | { |
a4bb6c3e | 2532 | do_440_tlbwe(PARAM1); |
5eb7995e JM |
2533 | RETURN(); |
2534 | } | |
2535 | ||
76a66253 JM |
2536 | void OPPROTO op_4xx_tlbre_lo (void) |
2537 | { | |
2538 | do_4xx_tlbre_lo(); | |
2539 | RETURN(); | |
2540 | } | |
2541 | ||
2542 | void OPPROTO op_4xx_tlbre_hi (void) | |
2543 | { | |
2544 | do_4xx_tlbre_hi(); | |
2545 | RETURN(); | |
2546 | } | |
2547 | ||
2548 | void OPPROTO op_4xx_tlbsx (void) | |
2549 | { | |
daf4f96e | 2550 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2551 | RETURN(); |
2552 | } | |
2553 | ||
2554 | void OPPROTO op_4xx_tlbwe_lo (void) | |
2555 | { | |
2556 | do_4xx_tlbwe_lo(); | |
2557 | RETURN(); | |
2558 | } | |
2559 | ||
2560 | void OPPROTO op_4xx_tlbwe_hi (void) | |
2561 | { | |
2562 | do_4xx_tlbwe_hi(); | |
2563 | RETURN(); | |
2564 | } | |
2565 | #endif | |
2566 | ||
2567 | /* SPR micro-ops */ | |
2568 | /* 440 specific */ | |
2569 | void OPPROTO op_440_dlmzb (void) | |
2570 | { | |
2571 | do_440_dlmzb(); | |
2572 | RETURN(); | |
2573 | } | |
2574 | ||
2575 | void OPPROTO op_440_dlmzb_update_Rc (void) | |
2576 | { | |
2577 | if (T0 == 8) | |
2578 | T0 = 0x2; | |
2579 | else if (T0 < 4) | |
2580 | T0 = 0x4; | |
2581 | else | |
2582 | T0 = 0x8; | |
2583 | RETURN(); | |
2584 | } | |
2585 | ||
2586 | #if !defined(CONFIG_USER_ONLY) | |
2587 | void OPPROTO op_store_pir (void) | |
3fc6c082 FB |
2588 | { |
2589 | env->spr[SPR_PIR] = T0 & 0x0000000FUL; | |
2590 | RETURN(); | |
2591 | } | |
76a66253 JM |
2592 | |
2593 | void OPPROTO op_load_403_pb (void) | |
2594 | { | |
2595 | do_load_403_pb(PARAM1); | |
2596 | RETURN(); | |
2597 | } | |
2598 | ||
2599 | void OPPROTO op_store_403_pb (void) | |
2600 | { | |
2601 | do_store_403_pb(PARAM1); | |
2602 | RETURN(); | |
2603 | } | |
2604 | ||
76a66253 JM |
2605 | void OPPROTO op_load_40x_pit (void) |
2606 | { | |
2607 | T0 = load_40x_pit(env); | |
2608 | RETURN(); | |
2609 | } | |
2610 | ||
76a66253 JM |
2611 | void OPPROTO op_store_40x_pit (void) |
2612 | { | |
2613 | store_40x_pit(env, T0); | |
2614 | RETURN(); | |
2615 | } | |
2616 | ||
8ecc7913 JM |
2617 | void OPPROTO op_store_40x_dbcr0 (void) |
2618 | { | |
2619 | store_40x_dbcr0(env, T0); | |
be147d08 | 2620 | RETURN(); |
8ecc7913 JM |
2621 | } |
2622 | ||
c294fc58 JM |
2623 | void OPPROTO op_store_40x_sler (void) |
2624 | { | |
2625 | store_40x_sler(env, T0); | |
2626 | RETURN(); | |
2627 | } | |
2628 | ||
76a66253 JM |
2629 | void OPPROTO op_store_booke_tcr (void) |
2630 | { | |
2631 | store_booke_tcr(env, T0); | |
2632 | RETURN(); | |
2633 | } | |
2634 | ||
76a66253 JM |
2635 | void OPPROTO op_store_booke_tsr (void) |
2636 | { | |
2637 | store_booke_tsr(env, T0); | |
2638 | RETURN(); | |
2639 | } | |
2640 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
0487d6a8 | 2641 | |
35cdaad6 | 2642 | #if defined(TARGET_PPCEMB) |
0487d6a8 JM |
2643 | /* SPE extension */ |
2644 | void OPPROTO op_splatw_T1_64 (void) | |
2645 | { | |
2646 | T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
e864cabd | 2647 | RETURN(); |
0487d6a8 JM |
2648 | } |
2649 | ||
2650 | void OPPROTO op_splatwi_T0_64 (void) | |
2651 | { | |
2652 | uint64_t tmp = PARAM1; | |
2653 | ||
2654 | T0_64 = (tmp << 32) | tmp; | |
e864cabd | 2655 | RETURN(); |
0487d6a8 JM |
2656 | } |
2657 | ||
2658 | void OPPROTO op_splatwi_T1_64 (void) | |
2659 | { | |
2660 | uint64_t tmp = PARAM1; | |
2661 | ||
2662 | T1_64 = (tmp << 32) | tmp; | |
e864cabd | 2663 | RETURN(); |
0487d6a8 JM |
2664 | } |
2665 | ||
2666 | void OPPROTO op_extsh_T1_64 (void) | |
2667 | { | |
2668 | T1_64 = (int32_t)((int16_t)T1_64); | |
2669 | RETURN(); | |
2670 | } | |
2671 | ||
2672 | void OPPROTO op_sli16_T1_64 (void) | |
2673 | { | |
2674 | T1_64 = T1_64 << 16; | |
2675 | RETURN(); | |
2676 | } | |
2677 | ||
2678 | void OPPROTO op_sli32_T1_64 (void) | |
2679 | { | |
2680 | T1_64 = T1_64 << 32; | |
2681 | RETURN(); | |
2682 | } | |
2683 | ||
2684 | void OPPROTO op_srli32_T1_64 (void) | |
2685 | { | |
2686 | T1_64 = T1_64 >> 32; | |
2687 | RETURN(); | |
2688 | } | |
2689 | ||
2690 | void OPPROTO op_evsel (void) | |
2691 | { | |
2692 | do_evsel(); | |
2693 | RETURN(); | |
2694 | } | |
2695 | ||
2696 | void OPPROTO op_evaddw (void) | |
2697 | { | |
2698 | do_evaddw(); | |
2699 | RETURN(); | |
2700 | } | |
2701 | ||
2702 | void OPPROTO op_evsubfw (void) | |
2703 | { | |
2704 | do_evsubfw(); | |
2705 | RETURN(); | |
2706 | } | |
2707 | ||
2708 | void OPPROTO op_evneg (void) | |
2709 | { | |
2710 | do_evneg(); | |
2711 | RETURN(); | |
2712 | } | |
2713 | ||
2714 | void OPPROTO op_evabs (void) | |
2715 | { | |
2716 | do_evabs(); | |
2717 | RETURN(); | |
2718 | } | |
2719 | ||
2720 | void OPPROTO op_evextsh (void) | |
2721 | { | |
2722 | T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) | | |
2723 | (uint64_t)((int32_t)(int16_t)T0_64); | |
2724 | RETURN(); | |
2725 | } | |
2726 | ||
2727 | void OPPROTO op_evextsb (void) | |
2728 | { | |
2729 | T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) | | |
2730 | (uint64_t)((int32_t)(int8_t)T0_64); | |
2731 | RETURN(); | |
2732 | } | |
2733 | ||
2734 | void OPPROTO op_evcntlzw (void) | |
2735 | { | |
2736 | do_evcntlzw(); | |
2737 | RETURN(); | |
2738 | } | |
2739 | ||
2740 | void OPPROTO op_evrndw (void) | |
2741 | { | |
2742 | do_evrndw(); | |
2743 | RETURN(); | |
2744 | } | |
2745 | ||
2746 | void OPPROTO op_brinc (void) | |
2747 | { | |
2748 | do_brinc(); | |
2749 | RETURN(); | |
2750 | } | |
2751 | ||
2752 | void OPPROTO op_evcntlsw (void) | |
2753 | { | |
2754 | do_evcntlsw(); | |
2755 | RETURN(); | |
2756 | } | |
2757 | ||
2758 | void OPPROTO op_evand (void) | |
2759 | { | |
2760 | T0_64 &= T1_64; | |
2761 | RETURN(); | |
2762 | } | |
2763 | ||
2764 | void OPPROTO op_evandc (void) | |
2765 | { | |
2766 | T0_64 &= ~T1_64; | |
2767 | RETURN(); | |
2768 | } | |
2769 | ||
2770 | void OPPROTO op_evor (void) | |
2771 | { | |
2772 | T0_64 |= T1_64; | |
2773 | RETURN(); | |
2774 | } | |
2775 | ||
2776 | void OPPROTO op_evxor (void) | |
2777 | { | |
2778 | T0_64 ^= T1_64; | |
2779 | RETURN(); | |
2780 | } | |
2781 | ||
2782 | void OPPROTO op_eveqv (void) | |
2783 | { | |
2784 | T0_64 = ~(T0_64 ^ T1_64); | |
2785 | RETURN(); | |
2786 | } | |
2787 | ||
2788 | void OPPROTO op_evnor (void) | |
2789 | { | |
2790 | T0_64 = ~(T0_64 | T1_64); | |
2791 | RETURN(); | |
2792 | } | |
2793 | ||
2794 | void OPPROTO op_evorc (void) | |
2795 | { | |
2796 | T0_64 |= ~T1_64; | |
2797 | RETURN(); | |
2798 | } | |
2799 | ||
2800 | void OPPROTO op_evnand (void) | |
2801 | { | |
2802 | T0_64 = ~(T0_64 & T1_64); | |
2803 | RETURN(); | |
2804 | } | |
2805 | ||
2806 | void OPPROTO op_evsrws (void) | |
2807 | { | |
2808 | do_evsrws(); | |
2809 | RETURN(); | |
2810 | } | |
2811 | ||
2812 | void OPPROTO op_evsrwu (void) | |
2813 | { | |
2814 | do_evsrwu(); | |
2815 | RETURN(); | |
2816 | } | |
2817 | ||
2818 | void OPPROTO op_evslw (void) | |
2819 | { | |
2820 | do_evslw(); | |
2821 | RETURN(); | |
2822 | } | |
2823 | ||
2824 | void OPPROTO op_evrlw (void) | |
2825 | { | |
2826 | do_evrlw(); | |
2827 | RETURN(); | |
2828 | } | |
2829 | ||
2830 | void OPPROTO op_evmergelo (void) | |
2831 | { | |
2832 | T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2833 | RETURN(); | |
2834 | } | |
2835 | ||
2836 | void OPPROTO op_evmergehi (void) | |
2837 | { | |
2838 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32); | |
2839 | RETURN(); | |
2840 | } | |
2841 | ||
2842 | void OPPROTO op_evmergelohi (void) | |
2843 | { | |
2844 | T0_64 = (T0_64 << 32) | (T1_64 >> 32); | |
2845 | RETURN(); | |
2846 | } | |
2847 | ||
2848 | void OPPROTO op_evmergehilo (void) | |
2849 | { | |
2850 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2851 | RETURN(); | |
2852 | } | |
2853 | ||
2854 | void OPPROTO op_evcmpgts (void) | |
2855 | { | |
2856 | do_evcmpgts(); | |
2857 | RETURN(); | |
2858 | } | |
2859 | ||
2860 | void OPPROTO op_evcmpgtu (void) | |
2861 | { | |
2862 | do_evcmpgtu(); | |
2863 | RETURN(); | |
2864 | } | |
2865 | ||
2866 | void OPPROTO op_evcmplts (void) | |
2867 | { | |
2868 | do_evcmplts(); | |
2869 | RETURN(); | |
2870 | } | |
2871 | ||
2872 | void OPPROTO op_evcmpltu (void) | |
2873 | { | |
2874 | do_evcmpltu(); | |
2875 | RETURN(); | |
2876 | } | |
2877 | ||
2878 | void OPPROTO op_evcmpeq (void) | |
2879 | { | |
2880 | do_evcmpeq(); | |
2881 | RETURN(); | |
2882 | } | |
2883 | ||
2884 | void OPPROTO op_evfssub (void) | |
2885 | { | |
2886 | do_evfssub(); | |
2887 | RETURN(); | |
2888 | } | |
2889 | ||
2890 | void OPPROTO op_evfsadd (void) | |
2891 | { | |
2892 | do_evfsadd(); | |
2893 | RETURN(); | |
2894 | } | |
2895 | ||
2896 | void OPPROTO op_evfsnabs (void) | |
2897 | { | |
2898 | do_evfsnabs(); | |
2899 | RETURN(); | |
2900 | } | |
2901 | ||
2902 | void OPPROTO op_evfsabs (void) | |
2903 | { | |
2904 | do_evfsabs(); | |
2905 | RETURN(); | |
2906 | } | |
2907 | ||
2908 | void OPPROTO op_evfsneg (void) | |
2909 | { | |
2910 | do_evfsneg(); | |
2911 | RETURN(); | |
2912 | } | |
2913 | ||
2914 | void OPPROTO op_evfsdiv (void) | |
2915 | { | |
2916 | do_evfsdiv(); | |
2917 | RETURN(); | |
2918 | } | |
2919 | ||
2920 | void OPPROTO op_evfsmul (void) | |
2921 | { | |
2922 | do_evfsmul(); | |
2923 | RETURN(); | |
2924 | } | |
2925 | ||
2926 | void OPPROTO op_evfscmplt (void) | |
2927 | { | |
2928 | do_evfscmplt(); | |
2929 | RETURN(); | |
2930 | } | |
2931 | ||
2932 | void OPPROTO op_evfscmpgt (void) | |
2933 | { | |
2934 | do_evfscmpgt(); | |
2935 | RETURN(); | |
2936 | } | |
2937 | ||
2938 | void OPPROTO op_evfscmpeq (void) | |
2939 | { | |
2940 | do_evfscmpeq(); | |
2941 | RETURN(); | |
2942 | } | |
2943 | ||
2944 | void OPPROTO op_evfscfsi (void) | |
2945 | { | |
2946 | do_evfscfsi(); | |
2947 | RETURN(); | |
2948 | } | |
2949 | ||
2950 | void OPPROTO op_evfscfui (void) | |
2951 | { | |
2952 | do_evfscfui(); | |
2953 | RETURN(); | |
2954 | } | |
2955 | ||
2956 | void OPPROTO op_evfscfsf (void) | |
2957 | { | |
2958 | do_evfscfsf(); | |
2959 | RETURN(); | |
2960 | } | |
2961 | ||
2962 | void OPPROTO op_evfscfuf (void) | |
2963 | { | |
2964 | do_evfscfuf(); | |
2965 | RETURN(); | |
2966 | } | |
2967 | ||
2968 | void OPPROTO op_evfsctsi (void) | |
2969 | { | |
2970 | do_evfsctsi(); | |
2971 | RETURN(); | |
2972 | } | |
2973 | ||
2974 | void OPPROTO op_evfsctui (void) | |
2975 | { | |
2976 | do_evfsctui(); | |
2977 | RETURN(); | |
2978 | } | |
2979 | ||
2980 | void OPPROTO op_evfsctsf (void) | |
2981 | { | |
2982 | do_evfsctsf(); | |
2983 | RETURN(); | |
2984 | } | |
2985 | ||
2986 | void OPPROTO op_evfsctuf (void) | |
2987 | { | |
2988 | do_evfsctuf(); | |
2989 | RETURN(); | |
2990 | } | |
2991 | ||
2992 | void OPPROTO op_evfsctuiz (void) | |
2993 | { | |
2994 | do_evfsctuiz(); | |
2995 | RETURN(); | |
2996 | } | |
2997 | ||
2998 | void OPPROTO op_evfsctsiz (void) | |
2999 | { | |
3000 | do_evfsctsiz(); | |
3001 | RETURN(); | |
3002 | } | |
3003 | ||
3004 | void OPPROTO op_evfststlt (void) | |
3005 | { | |
3006 | do_evfststlt(); | |
3007 | RETURN(); | |
3008 | } | |
3009 | ||
3010 | void OPPROTO op_evfststgt (void) | |
3011 | { | |
3012 | do_evfststgt(); | |
3013 | RETURN(); | |
3014 | } | |
3015 | ||
3016 | void OPPROTO op_evfststeq (void) | |
3017 | { | |
3018 | do_evfststeq(); | |
3019 | RETURN(); | |
3020 | } | |
3021 | ||
3022 | void OPPROTO op_efssub (void) | |
3023 | { | |
3024 | T0_64 = _do_efssub(T0_64, T1_64); | |
3025 | RETURN(); | |
3026 | } | |
3027 | ||
3028 | void OPPROTO op_efsadd (void) | |
3029 | { | |
3030 | T0_64 = _do_efsadd(T0_64, T1_64); | |
3031 | RETURN(); | |
3032 | } | |
3033 | ||
3034 | void OPPROTO op_efsnabs (void) | |
3035 | { | |
3036 | T0_64 = _do_efsnabs(T0_64); | |
3037 | RETURN(); | |
3038 | } | |
3039 | ||
3040 | void OPPROTO op_efsabs (void) | |
3041 | { | |
3042 | T0_64 = _do_efsabs(T0_64); | |
3043 | RETURN(); | |
3044 | } | |
3045 | ||
3046 | void OPPROTO op_efsneg (void) | |
3047 | { | |
3048 | T0_64 = _do_efsneg(T0_64); | |
3049 | RETURN(); | |
3050 | } | |
3051 | ||
3052 | void OPPROTO op_efsdiv (void) | |
3053 | { | |
3054 | T0_64 = _do_efsdiv(T0_64, T1_64); | |
3055 | RETURN(); | |
3056 | } | |
3057 | ||
3058 | void OPPROTO op_efsmul (void) | |
3059 | { | |
3060 | T0_64 = _do_efsmul(T0_64, T1_64); | |
3061 | RETURN(); | |
3062 | } | |
3063 | ||
3064 | void OPPROTO op_efscmplt (void) | |
3065 | { | |
3066 | do_efscmplt(); | |
3067 | RETURN(); | |
3068 | } | |
3069 | ||
3070 | void OPPROTO op_efscmpgt (void) | |
3071 | { | |
3072 | do_efscmpgt(); | |
3073 | RETURN(); | |
3074 | } | |
3075 | ||
3076 | void OPPROTO op_efscfd (void) | |
3077 | { | |
3078 | do_efscfd(); | |
3079 | RETURN(); | |
3080 | } | |
3081 | ||
3082 | void OPPROTO op_efscmpeq (void) | |
3083 | { | |
3084 | do_efscmpeq(); | |
3085 | RETURN(); | |
3086 | } | |
3087 | ||
3088 | void OPPROTO op_efscfsi (void) | |
3089 | { | |
3090 | do_efscfsi(); | |
3091 | RETURN(); | |
3092 | } | |
3093 | ||
3094 | void OPPROTO op_efscfui (void) | |
3095 | { | |
3096 | do_efscfui(); | |
3097 | RETURN(); | |
3098 | } | |
3099 | ||
3100 | void OPPROTO op_efscfsf (void) | |
3101 | { | |
3102 | do_efscfsf(); | |
3103 | RETURN(); | |
3104 | } | |
3105 | ||
3106 | void OPPROTO op_efscfuf (void) | |
3107 | { | |
3108 | do_efscfuf(); | |
3109 | RETURN(); | |
3110 | } | |
3111 | ||
3112 | void OPPROTO op_efsctsi (void) | |
3113 | { | |
3114 | do_efsctsi(); | |
3115 | RETURN(); | |
3116 | } | |
3117 | ||
3118 | void OPPROTO op_efsctui (void) | |
3119 | { | |
3120 | do_efsctui(); | |
3121 | RETURN(); | |
3122 | } | |
3123 | ||
3124 | void OPPROTO op_efsctsf (void) | |
3125 | { | |
3126 | do_efsctsf(); | |
3127 | RETURN(); | |
3128 | } | |
3129 | ||
3130 | void OPPROTO op_efsctuf (void) | |
3131 | { | |
3132 | do_efsctuf(); | |
3133 | RETURN(); | |
3134 | } | |
3135 | ||
3136 | void OPPROTO op_efsctsiz (void) | |
3137 | { | |
3138 | do_efsctsiz(); | |
3139 | RETURN(); | |
3140 | } | |
3141 | ||
3142 | void OPPROTO op_efsctuiz (void) | |
3143 | { | |
3144 | do_efsctuiz(); | |
3145 | RETURN(); | |
3146 | } | |
3147 | ||
3148 | void OPPROTO op_efststlt (void) | |
3149 | { | |
3150 | T0 = _do_efststlt(T0_64, T1_64); | |
3151 | RETURN(); | |
3152 | } | |
3153 | ||
3154 | void OPPROTO op_efststgt (void) | |
3155 | { | |
3156 | T0 = _do_efststgt(T0_64, T1_64); | |
3157 | RETURN(); | |
3158 | } | |
3159 | ||
3160 | void OPPROTO op_efststeq (void) | |
3161 | { | |
3162 | T0 = _do_efststeq(T0_64, T1_64); | |
3163 | RETURN(); | |
3164 | } | |
3165 | ||
3166 | void OPPROTO op_efdsub (void) | |
3167 | { | |
3168 | union { | |
3169 | uint64_t u; | |
3170 | float64 f; | |
3171 | } u1, u2; | |
3172 | u1.u = T0_64; | |
3173 | u2.u = T1_64; | |
3174 | u1.f = float64_sub(u1.f, u2.f, &env->spe_status); | |
3175 | T0_64 = u1.u; | |
3176 | RETURN(); | |
3177 | } | |
3178 | ||
3179 | void OPPROTO op_efdadd (void) | |
3180 | { | |
3181 | union { | |
3182 | uint64_t u; | |
3183 | float64 f; | |
3184 | } u1, u2; | |
3185 | u1.u = T0_64; | |
3186 | u2.u = T1_64; | |
3187 | u1.f = float64_add(u1.f, u2.f, &env->spe_status); | |
3188 | T0_64 = u1.u; | |
3189 | RETURN(); | |
3190 | } | |
3191 | ||
3192 | void OPPROTO op_efdcfsid (void) | |
3193 | { | |
3194 | do_efdcfsi(); | |
3195 | RETURN(); | |
3196 | } | |
3197 | ||
3198 | void OPPROTO op_efdcfuid (void) | |
3199 | { | |
3200 | do_efdcfui(); | |
3201 | RETURN(); | |
3202 | } | |
3203 | ||
3204 | void OPPROTO op_efdnabs (void) | |
3205 | { | |
3206 | T0_64 |= 0x8000000000000000ULL; | |
3207 | RETURN(); | |
3208 | } | |
3209 | ||
3210 | void OPPROTO op_efdabs (void) | |
3211 | { | |
3212 | T0_64 &= ~0x8000000000000000ULL; | |
3213 | RETURN(); | |
3214 | } | |
3215 | ||
3216 | void OPPROTO op_efdneg (void) | |
3217 | { | |
3218 | T0_64 ^= 0x8000000000000000ULL; | |
3219 | RETURN(); | |
3220 | } | |
3221 | ||
3222 | void OPPROTO op_efddiv (void) | |
3223 | { | |
3224 | union { | |
3225 | uint64_t u; | |
3226 | float64 f; | |
3227 | } u1, u2; | |
3228 | u1.u = T0_64; | |
3229 | u2.u = T1_64; | |
3230 | u1.f = float64_div(u1.f, u2.f, &env->spe_status); | |
3231 | T0_64 = u1.u; | |
3232 | RETURN(); | |
3233 | } | |
3234 | ||
3235 | void OPPROTO op_efdmul (void) | |
3236 | { | |
3237 | union { | |
3238 | uint64_t u; | |
3239 | float64 f; | |
3240 | } u1, u2; | |
3241 | u1.u = T0_64; | |
3242 | u2.u = T1_64; | |
3243 | u1.f = float64_mul(u1.f, u2.f, &env->spe_status); | |
3244 | T0_64 = u1.u; | |
3245 | RETURN(); | |
3246 | } | |
3247 | ||
3248 | void OPPROTO op_efdctsidz (void) | |
3249 | { | |
3250 | do_efdctsiz(); | |
3251 | RETURN(); | |
3252 | } | |
3253 | ||
3254 | void OPPROTO op_efdctuidz (void) | |
3255 | { | |
3256 | do_efdctuiz(); | |
3257 | RETURN(); | |
3258 | } | |
3259 | ||
3260 | void OPPROTO op_efdcmplt (void) | |
3261 | { | |
3262 | do_efdcmplt(); | |
3263 | RETURN(); | |
3264 | } | |
3265 | ||
3266 | void OPPROTO op_efdcmpgt (void) | |
3267 | { | |
3268 | do_efdcmpgt(); | |
3269 | RETURN(); | |
3270 | } | |
3271 | ||
3272 | void OPPROTO op_efdcfs (void) | |
3273 | { | |
3274 | do_efdcfs(); | |
3275 | RETURN(); | |
3276 | } | |
3277 | ||
3278 | void OPPROTO op_efdcmpeq (void) | |
3279 | { | |
3280 | do_efdcmpeq(); | |
3281 | RETURN(); | |
3282 | } | |
3283 | ||
3284 | void OPPROTO op_efdcfsi (void) | |
3285 | { | |
3286 | do_efdcfsi(); | |
3287 | RETURN(); | |
3288 | } | |
3289 | ||
3290 | void OPPROTO op_efdcfui (void) | |
3291 | { | |
3292 | do_efdcfui(); | |
3293 | RETURN(); | |
3294 | } | |
3295 | ||
3296 | void OPPROTO op_efdcfsf (void) | |
3297 | { | |
3298 | do_efdcfsf(); | |
3299 | RETURN(); | |
3300 | } | |
3301 | ||
3302 | void OPPROTO op_efdcfuf (void) | |
3303 | { | |
3304 | do_efdcfuf(); | |
3305 | RETURN(); | |
3306 | } | |
3307 | ||
3308 | void OPPROTO op_efdctsi (void) | |
3309 | { | |
3310 | do_efdctsi(); | |
3311 | RETURN(); | |
3312 | } | |
3313 | ||
3314 | void OPPROTO op_efdctui (void) | |
3315 | { | |
3316 | do_efdctui(); | |
3317 | RETURN(); | |
3318 | } | |
3319 | ||
3320 | void OPPROTO op_efdctsf (void) | |
3321 | { | |
3322 | do_efdctsf(); | |
3323 | RETURN(); | |
3324 | } | |
3325 | ||
3326 | void OPPROTO op_efdctuf (void) | |
3327 | { | |
3328 | do_efdctuf(); | |
3329 | RETURN(); | |
3330 | } | |
3331 | ||
3332 | void OPPROTO op_efdctuiz (void) | |
3333 | { | |
3334 | do_efdctuiz(); | |
3335 | RETURN(); | |
3336 | } | |
3337 | ||
3338 | void OPPROTO op_efdctsiz (void) | |
3339 | { | |
3340 | do_efdctsiz(); | |
3341 | RETURN(); | |
3342 | } | |
3343 | ||
3344 | void OPPROTO op_efdtstlt (void) | |
3345 | { | |
3346 | T0 = _do_efdtstlt(T0_64, T1_64); | |
3347 | RETURN(); | |
3348 | } | |
3349 | ||
3350 | void OPPROTO op_efdtstgt (void) | |
3351 | { | |
3352 | T0 = _do_efdtstgt(T0_64, T1_64); | |
3353 | RETURN(); | |
3354 | } | |
3355 | ||
3356 | void OPPROTO op_efdtsteq (void) | |
3357 | { | |
3358 | T0 = _do_efdtsteq(T0_64, T1_64); | |
3359 | RETURN(); | |
3360 | } | |
35cdaad6 | 3361 | #endif /* defined(TARGET_PPCEMB) */ |