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a5082316 FB |
1 | /* |
2 | * QEMU Cirrus CLGD 54xx VGA Emulator. | |
5fafdf24 | 3 | * |
a5082316 | 4 | * Copyright (c) 2004 Fabrice Bellard |
5fafdf24 | 5 | * |
a5082316 FB |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
8c78881f BS |
25 | static inline void glue(rop_8_,ROP_NAME)(uint8_t *dst, uint8_t src) |
26 | { | |
27 | *dst = ROP_FN(*dst, src); | |
28 | } | |
29 | ||
30 | static inline void glue(rop_16_,ROP_NAME)(uint16_t *dst, uint16_t src) | |
31 | { | |
32 | *dst = ROP_FN(*dst, src); | |
33 | } | |
34 | ||
35 | static inline void glue(rop_32_,ROP_NAME)(uint32_t *dst, uint32_t src) | |
36 | { | |
37 | *dst = ROP_FN(*dst, src); | |
38 | } | |
39 | ||
40 | #define ROP_OP(d, s) glue(rop_8_,ROP_NAME)(d, s) | |
41 | #define ROP_OP_16(d, s) glue(rop_16_,ROP_NAME)(d, s) | |
42 | #define ROP_OP_32(d, s) glue(rop_32_,ROP_NAME)(d, s) | |
43 | #undef ROP_FN | |
44 | ||
a5082316 FB |
45 | static void |
46 | glue(cirrus_bitblt_rop_fwd_, ROP_NAME)(CirrusVGAState *s, | |
47 | uint8_t *dst,const uint8_t *src, | |
48 | int dstpitch,int srcpitch, | |
49 | int bltwidth,int bltheight) | |
50 | { | |
51 | int x,y; | |
52 | dstpitch -= bltwidth; | |
53 | srcpitch -= bltwidth; | |
b2eb849d | 54 | |
d16136d2 | 55 | if (bltheight > 1 && (dstpitch < 0 || srcpitch < 0)) { |
b2eb849d AJ |
56 | return; |
57 | } | |
58 | ||
a5082316 FB |
59 | for (y = 0; y < bltheight; y++) { |
60 | for (x = 0; x < bltwidth; x++) { | |
8c78881f | 61 | ROP_OP(dst, *src); |
a5082316 FB |
62 | dst++; |
63 | src++; | |
64 | } | |
65 | dst += dstpitch; | |
66 | src += srcpitch; | |
67 | } | |
68 | } | |
69 | ||
70 | static void | |
71 | glue(cirrus_bitblt_rop_bkwd_, ROP_NAME)(CirrusVGAState *s, | |
72 | uint8_t *dst,const uint8_t *src, | |
73 | int dstpitch,int srcpitch, | |
74 | int bltwidth,int bltheight) | |
75 | { | |
76 | int x,y; | |
77 | dstpitch += bltwidth; | |
78 | srcpitch += bltwidth; | |
79 | for (y = 0; y < bltheight; y++) { | |
80 | for (x = 0; x < bltwidth; x++) { | |
8c78881f | 81 | ROP_OP(dst, *src); |
a5082316 FB |
82 | dst--; |
83 | src--; | |
84 | } | |
85 | dst += dstpitch; | |
86 | src += srcpitch; | |
87 | } | |
88 | } | |
89 | ||
96cf2df8 TS |
90 | static void |
91 | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, | |
92 | uint8_t *dst,const uint8_t *src, | |
93 | int dstpitch,int srcpitch, | |
94 | int bltwidth,int bltheight) | |
95 | { | |
96 | int x,y; | |
97 | uint8_t p; | |
98 | dstpitch -= bltwidth; | |
99 | srcpitch -= bltwidth; | |
100 | for (y = 0; y < bltheight; y++) { | |
101 | for (x = 0; x < bltwidth; x++) { | |
102 | p = *dst; | |
8c78881f | 103 | ROP_OP(&p, *src); |
4e12cd94 | 104 | if (p != s->vga.gr[0x34]) *dst = p; |
96cf2df8 TS |
105 | dst++; |
106 | src++; | |
107 | } | |
108 | dst += dstpitch; | |
109 | src += srcpitch; | |
110 | } | |
111 | } | |
112 | ||
113 | static void | |
114 | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, | |
115 | uint8_t *dst,const uint8_t *src, | |
116 | int dstpitch,int srcpitch, | |
117 | int bltwidth,int bltheight) | |
118 | { | |
119 | int x,y; | |
120 | uint8_t p; | |
121 | dstpitch += bltwidth; | |
122 | srcpitch += bltwidth; | |
123 | for (y = 0; y < bltheight; y++) { | |
124 | for (x = 0; x < bltwidth; x++) { | |
125 | p = *dst; | |
8c78881f | 126 | ROP_OP(&p, *src); |
4e12cd94 | 127 | if (p != s->vga.gr[0x34]) *dst = p; |
96cf2df8 TS |
128 | dst--; |
129 | src--; | |
130 | } | |
131 | dst += dstpitch; | |
132 | src += srcpitch; | |
133 | } | |
134 | } | |
135 | ||
136 | static void | |
137 | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, | |
138 | uint8_t *dst,const uint8_t *src, | |
139 | int dstpitch,int srcpitch, | |
140 | int bltwidth,int bltheight) | |
141 | { | |
142 | int x,y; | |
143 | uint8_t p1, p2; | |
144 | dstpitch -= bltwidth; | |
145 | srcpitch -= bltwidth; | |
146 | for (y = 0; y < bltheight; y++) { | |
147 | for (x = 0; x < bltwidth; x+=2) { | |
148 | p1 = *dst; | |
149 | p2 = *(dst+1); | |
8c78881f BS |
150 | ROP_OP(&p1, *src); |
151 | ROP_OP(&p2, *(src + 1)); | |
4e12cd94 | 152 | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
96cf2df8 TS |
153 | *dst = p1; |
154 | *(dst+1) = p2; | |
155 | } | |
156 | dst+=2; | |
157 | src+=2; | |
158 | } | |
159 | dst += dstpitch; | |
160 | src += srcpitch; | |
161 | } | |
162 | } | |
163 | ||
164 | static void | |
165 | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, | |
166 | uint8_t *dst,const uint8_t *src, | |
167 | int dstpitch,int srcpitch, | |
168 | int bltwidth,int bltheight) | |
169 | { | |
170 | int x,y; | |
171 | uint8_t p1, p2; | |
172 | dstpitch += bltwidth; | |
173 | srcpitch += bltwidth; | |
174 | for (y = 0; y < bltheight; y++) { | |
175 | for (x = 0; x < bltwidth; x+=2) { | |
176 | p1 = *(dst-1); | |
177 | p2 = *dst; | |
8c78881f BS |
178 | ROP_OP(&p1, *(src - 1)); |
179 | ROP_OP(&p2, *src); | |
4e12cd94 | 180 | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
96cf2df8 TS |
181 | *(dst-1) = p1; |
182 | *dst = p2; | |
183 | } | |
184 | dst-=2; | |
185 | src-=2; | |
186 | } | |
187 | dst += dstpitch; | |
188 | src += srcpitch; | |
189 | } | |
190 | } | |
191 | ||
a5082316 | 192 | #define DEPTH 8 |
47b43a1f | 193 | #include "cirrus_vga_rop2.h" |
a5082316 FB |
194 | |
195 | #define DEPTH 16 | |
47b43a1f | 196 | #include "cirrus_vga_rop2.h" |
a5082316 FB |
197 | |
198 | #define DEPTH 24 | |
47b43a1f | 199 | #include "cirrus_vga_rop2.h" |
a5082316 FB |
200 | |
201 | #define DEPTH 32 | |
47b43a1f | 202 | #include "cirrus_vga_rop2.h" |
a5082316 FB |
203 | |
204 | #undef ROP_NAME | |
205 | #undef ROP_OP | |
8c78881f BS |
206 | #undef ROP_OP_16 |
207 | #undef ROP_OP_32 |