[qemu.git] / hw / pl110.c

/*
 * Arm PrimeCell PL110 Color LCD Controller
 *
 * Copyright (c) 2005-2009 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licenced under the GNU LGPL
 */

#include "sysbus.h"
#include "console.h"
#include "framebuffer.h"

#define PL110_CR_EN   0x001
#define PL110_CR_BGR  0x100
#define PL110_CR_BEBO 0x200
#define PL110_CR_BEPO 0x400
#define PL110_CR_PWR  0x800

enum pl110_bppmode
{
    BPP_1,
    BPP_2,
    BPP_4,
    BPP_8,
    BPP_16,
    BPP_32
};

typedef struct {
    SysBusDevice busdev;
    DisplayState *ds;

    /* The Versatile/PB uses a slightly modified PL110 controller.  */
    int versatile;
    uint32_t timing[4];
    uint32_t cr;
    uint32_t upbase;
    uint32_t lpbase;
    uint32_t int_status;
    uint32_t int_mask;
    int cols;
    int rows;
    enum pl110_bppmode bpp;
    int invalidate;
    uint32_t pallette[256];
    uint32_t raw_pallette[128];
    qemu_irq irq;
} pl110_state;

static const VMStateDescription vmstate_pl110 = {
    .name = "pl110",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_INT32(versatile, pl110_state),
        VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
        VMSTATE_UINT32(cr, pl110_state),
        VMSTATE_UINT32(upbase, pl110_state),
        VMSTATE_UINT32(lpbase, pl110_state),
        VMSTATE_UINT32(int_status, pl110_state),
        VMSTATE_UINT32(int_mask, pl110_state),
        VMSTATE_INT32(cols, pl110_state),
        VMSTATE_INT32(rows, pl110_state),
        VMSTATE_UINT32(bpp, pl110_state),
        VMSTATE_INT32(invalidate, pl110_state),
        VMSTATE_UINT32_ARRAY(pallette, pl110_state, 256),
        VMSTATE_UINT32_ARRAY(raw_pallette, pl110_state, 128),
        VMSTATE_END_OF_LIST()
    }
};

static const unsigned char pl110_id[] =
{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };

/* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
   has a different ID.  However Linux only looks for the normal ID.  */
#if 0
static const unsigned char pl110_versatile_id[] =
{ 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
#else
#define pl110_versatile_id pl110_id
#endif

#include "pixel_ops.h"

#define BITS 8
#include "pl110_template.h"
#define BITS 15
#include "pl110_template.h"
#define BITS 16
#include "pl110_template.h"
#define BITS 24
#include "pl110_template.h"
#define BITS 32
#include "pl110_template.h"

static int pl110_enabled(pl110_state *s)
{
  return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
}

static void pl110_update_display(void *opaque)
{
    pl110_state *s = (pl110_state *)opaque;
    drawfn* fntable;
    drawfn fn;
    int dest_width;
    int src_width;
    int bpp_offset;
    int first;
    int last;

    if (!pl110_enabled(s))
        return;

    switch (ds_get_bits_per_pixel(s->ds)) {
    case 0:
        return;
    case 8:
        fntable = pl110_draw_fn_8;
        dest_width = 1;
        break;
    case 15:
        fntable = pl110_draw_fn_15;
        dest_width = 2;
        break;
    case 16:
        fntable = pl110_draw_fn_16;
        dest_width = 2;
        break;
    case 24:
        fntable = pl110_draw_fn_24;
        dest_width = 3;
        break;
    case 32:
        fntable = pl110_draw_fn_32;
        dest_width = 4;
        break;
    default:
        fprintf(stderr, "pl110: Bad color depth\n");
        exit(1);
    }
    if (s->cr & PL110_CR_BGR)
        bpp_offset = 0;
    else
        bpp_offset = 18;

    if (s->cr & PL110_CR_BEBO)
        fn = fntable[s->bpp + 6 + bpp_offset];
    else if (s->cr & PL110_CR_BEPO)
        fn = fntable[s->bpp + 12 + bpp_offset];
    else
        fn = fntable[s->bpp + bpp_offset];

    src_width = s->cols;
    switch (s->bpp) {
    case BPP_1:
        src_width >>= 3;
        break;
    case BPP_2:
        src_width >>= 2;
        break;
    case BPP_4:
        src_width >>= 1;
        break;
    case BPP_8:
        break;
    case BPP_16:
        src_width <<= 1;
        break;
    case BPP_32:
        src_width <<= 2;
        break;
    }
    dest_width *= s->cols;
    first = 0;
    framebuffer_update_display(s->ds,
                               s->upbase, s->cols, s->rows,
                               src_width, dest_width, 0,
                               s->invalidate,
                               fn, s->pallette,
                               &first, &last);
    if (first >= 0) {
        dpy_update(s->ds, 0, first, s->cols, last - first + 1);
    }
    s->invalidate = 0;
}

static void pl110_invalidate_display(void * opaque)
{
    pl110_state *s = (pl110_state *)opaque;
    s->invalidate = 1;
    if (pl110_enabled(s)) {
        qemu_console_resize(s->ds, s->cols, s->rows);
    }
}

static void pl110_update_pallette(pl110_state *s, int n)
{
    int i;
    uint32_t raw;
    unsigned int r, g, b;

    raw = s->raw_pallette[n];
    n <<= 1;
    for (i = 0; i < 2; i++) {
        r = (raw & 0x1f) << 3;
        raw >>= 5;
        g = (raw & 0x1f) << 3;
        raw >>= 5;
        b = (raw & 0x1f) << 3;
        /* The I bit is ignored.  */
        raw >>= 6;
        switch (ds_get_bits_per_pixel(s->ds)) {
        case 8:
            s->pallette[n] = rgb_to_pixel8(r, g, b);
            break;
        case 15:
            s->pallette[n] = rgb_to_pixel15(r, g, b);
            break;
        case 16:
            s->pallette[n] = rgb_to_pixel16(r, g, b);
            break;
        case 24:
        case 32:
            s->pallette[n] = rgb_to_pixel32(r, g, b);
            break;
        }
        n++;
    }
}

static void pl110_resize(pl110_state *s, int width, int height)
{
    if (width != s->cols || height != s->rows) {
        if (pl110_enabled(s)) {
            qemu_console_resize(s->ds, width, height);
        }
    }
    s->cols = width;
    s->rows = height;
}

/* Update interrupts.  */
static void pl110_update(pl110_state *s)
{
  /* TODO: Implement interrupts.  */
}

static uint32_t pl110_read(void *opaque, target_phys_addr_t offset)
{
    pl110_state *s = (pl110_state *)opaque;

    if (offset >= 0xfe0 && offset < 0x1000) {
        if (s->versatile)
            return pl110_versatile_id[(offset - 0xfe0) >> 2];
        else
            return pl110_id[(offset - 0xfe0) >> 2];
    }
    if (offset >= 0x200 && offset < 0x400) {
        return s->raw_pallette[(offset - 0x200) >> 2];
    }
    switch (offset >> 2) {
    case 0: /* LCDTiming0 */
        return s->timing[0];
    case 1: /* LCDTiming1 */
        return s->timing[1];
    case 2: /* LCDTiming2 */
        return s->timing[2];
    case 3: /* LCDTiming3 */
        return s->timing[3];
    case 4: /* LCDUPBASE */
        return s->upbase;
    case 5: /* LCDLPBASE */
        return s->lpbase;
    case 6: /* LCDIMSC */
	if (s->versatile)
	  return s->cr;
        return s->int_mask;
    case 7: /* LCDControl */
	if (s->versatile)
	  return s->int_mask;
        return s->cr;
    case 8: /* LCDRIS */
        return s->int_status;
    case 9: /* LCDMIS */
        return s->int_status & s->int_mask;
    case 11: /* LCDUPCURR */
        /* TODO: Implement vertical refresh.  */
        return s->upbase;
    case 12: /* LCDLPCURR */
        return s->lpbase;
    default:
        hw_error("pl110_read: Bad offset %x\n", (int)offset);
        return 0;
    }
}

static void pl110_write(void *opaque, target_phys_addr_t offset,
                        uint32_t val)
{
    pl110_state *s = (pl110_state *)opaque;
    int n;

    /* For simplicity invalidate the display whenever a control register
       is writen to.  */
    s->invalidate = 1;
    if (offset >= 0x200 && offset < 0x400) {
        /* Pallette.  */
        n = (offset - 0x200) >> 2;
        s->raw_pallette[(offset - 0x200) >> 2] = val;
        pl110_update_pallette(s, n);
        return;
    }
    switch (offset >> 2) {
    case 0: /* LCDTiming0 */
        s->timing[0] = val;
        n = ((val & 0xfc) + 4) * 4;
        pl110_resize(s, n, s->rows);
        break;
    case 1: /* LCDTiming1 */
        s->timing[1] = val;
        n = (val & 0x3ff) + 1;
        pl110_resize(s, s->cols, n);
        break;
    case 2: /* LCDTiming2 */
        s->timing[2] = val;
        break;
    case 3: /* LCDTiming3 */
        s->timing[3] = val;
        break;
    case 4: /* LCDUPBASE */
        s->upbase = val;
        break;
    case 5: /* LCDLPBASE */
        s->lpbase = val;
        break;
    case 6: /* LCDIMSC */
        if (s->versatile)
            goto control;
    imsc:
        s->int_mask = val;
        pl110_update(s);
        break;
    case 7: /* LCDControl */
        if (s->versatile)
            goto imsc;
    control:
        s->cr = val;
        s->bpp = (val >> 1) & 7;
        if (pl110_enabled(s)) {
            qemu_console_resize(s->ds, s->cols, s->rows);
        }
        break;
    case 10: /* LCDICR */
        s->int_status &= ~val;
        pl110_update(s);
        break;
    default:
        hw_error("pl110_write: Bad offset %x\n", (int)offset);
    }
}

static CPUReadMemoryFunc * const pl110_readfn[] = {
   pl110_read,
   pl110_read,
   pl110_read
};

static CPUWriteMemoryFunc * const pl110_writefn[] = {
   pl110_write,
   pl110_write,
   pl110_write
};

static int pl110_init(SysBusDevice *dev)
{
    pl110_state *s = FROM_SYSBUS(pl110_state, dev);
    int iomemtype;

    iomemtype = cpu_register_io_memory(pl110_readfn,
                                       pl110_writefn, s,
                                       DEVICE_NATIVE_ENDIAN);
    sysbus_init_mmio(dev, 0x1000, iomemtype);
    sysbus_init_irq(dev, &s->irq);
    s->ds = graphic_console_init(pl110_update_display,
                                 pl110_invalidate_display,
                                 NULL, NULL, s);
    return 0;
}

static int pl110_versatile_init(SysBusDevice *dev)
{
    pl110_state *s = FROM_SYSBUS(pl110_state, dev);
    s->versatile = 1;
    return pl110_init(dev);
}

static SysBusDeviceInfo pl110_info = {
    .init = pl110_init,
    .qdev.name = "pl110",
    .qdev.size = sizeof(pl110_state),
    .qdev.vmsd = &vmstate_pl110,
    .qdev.no_user = 1,
};

static SysBusDeviceInfo pl110_versatile_info = {
    .init = pl110_versatile_init,
    .qdev.name = "pl110_versatile",
    .qdev.size = sizeof(pl110_state),
    .qdev.vmsd = &vmstate_pl110,
    .qdev.no_user = 1,
};

static void pl110_register_devices(void)
{
    sysbus_register_withprop(&pl110_info);
    sysbus_register_withprop(&pl110_versatile_info);
}

device_init(pl110_register_devices)
Commit	Line	Data
5fafdf24	1	/*
bdd5003a PB	2	* Arm PrimeCell PL110 Color LCD Controller
bdd5003a PB	3	*
2e9bdce5	4	* Copyright (c) 2005-2009 CodeSourcery.
bdd5003a PB	5	* Written by Paul Brook
	6	*
	7	* This code is licenced under the GNU LGPL
	8	*/
	9
2e9bdce5	10	#include "sysbus.h"
87ecb68b	11	#include "console.h"
714fa308	12	#include "framebuffer.h"
bdd5003a PB	13
bdd5003a PB	14	#define PL110_CR_EN 0x001
e9c05b42	15	#define PL110_CR_BGR 0x100
bdd5003a PB	16	#define PL110_CR_BEBO 0x200
	17	#define PL110_CR_BEPO 0x400
	18	#define PL110_CR_PWR 0x800
	19
	20	enum pl110_bppmode
	21	{
	22	BPP_1,
	23	BPP_2,
	24	BPP_4,
	25	BPP_8,
	26	BPP_16,
	27	BPP_32
	28	};
	29
	30	typedef struct {
2e9bdce5	31	SysBusDevice busdev;
bdd5003a	32	DisplayState *ds;
c60e08d9	33
cdbdb648 PB	34	/* The Versatile/PB uses a slightly modified PL110 controller. */
cdbdb648 PB	35	int versatile;
bdd5003a PB	36	uint32_t timing[4];
	37	uint32_t cr;
	38	uint32_t upbase;
	39	uint32_t lpbase;
	40	uint32_t int_status;
	41	uint32_t int_mask;
	42	int cols;
	43	int rows;
	44	enum pl110_bppmode bpp;
	45	int invalidate;
	46	uint32_t pallette[256];
	47	uint32_t raw_pallette[128];
d537cf6c	48	qemu_irq irq;
bdd5003a PB	49	} pl110_state;
bdd5003a PB	50
8c60d065 PM	51	static const VMStateDescription vmstate_pl110 = {
	52	.name = "pl110",
	53	.version_id = 1,
	54	.minimum_version_id = 1,
	55	.fields = (VMStateField[]) {
	56	VMSTATE_INT32(versatile, pl110_state),
	57	VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
	58	VMSTATE_UINT32(cr, pl110_state),
	59	VMSTATE_UINT32(upbase, pl110_state),
	60	VMSTATE_UINT32(lpbase, pl110_state),
	61	VMSTATE_UINT32(int_status, pl110_state),
	62	VMSTATE_UINT32(int_mask, pl110_state),
	63	VMSTATE_INT32(cols, pl110_state),
	64	VMSTATE_INT32(rows, pl110_state),
	65	VMSTATE_UINT32(bpp, pl110_state),
	66	VMSTATE_INT32(invalidate, pl110_state),
	67	VMSTATE_UINT32_ARRAY(pallette, pl110_state, 256),
	68	VMSTATE_UINT32_ARRAY(raw_pallette, pl110_state, 128),
	69	VMSTATE_END_OF_LIST()
	70	}
	71	};
	72
bdd5003a PB	73	static const unsigned char pl110_id[] =
	74	{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
	75
cdbdb648 PB	76	/* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
	77	has a different ID. However Linux only looks for the normal ID. */
	78	#if 0
	79	static const unsigned char pl110_versatile_id[] =
	80	{ 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
	81	#else
	82	#define pl110_versatile_id pl110_id
	83	#endif
	84
602dafcf	85	#include "pixel_ops.h"
bdd5003a	86
bdd5003a PB	87	#define BITS 8
	88	#include "pl110_template.h"
	89	#define BITS 15
	90	#include "pl110_template.h"
	91	#define BITS 16
	92	#include "pl110_template.h"
	93	#define BITS 24
	94	#include "pl110_template.h"
	95	#define BITS 32
	96	#include "pl110_template.h"
	97
	98	static int pl110_enabled(pl110_state *s)
	99	{
	100	return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
	101	}
	102
95219897	103	static void pl110_update_display(void *opaque)
bdd5003a PB	104	{
	105	pl110_state s = (pl110_state )opaque;
	106	drawfn* fntable;
	107	drawfn fn;
bdd5003a PB	108	int dest_width;
bdd5003a PB	109	int src_width;
e9c05b42	110	int bpp_offset;
714fa308 PB	111	int first;
714fa308 PB	112	int last;
bdd5003a PB	113
	114	if (!pl110_enabled(s))
	115	return;
3b46e624	116
0e1f5a0c	117	switch (ds_get_bits_per_pixel(s->ds)) {
af2f6733 PB	118	case 0:
af2f6733 PB	119	return;
bdd5003a PB	120	case 8:
	121	fntable = pl110_draw_fn_8;
	122	dest_width = 1;
	123	break;
	124	case 15:
	125	fntable = pl110_draw_fn_15;
	126	dest_width = 2;
	127	break;
	128	case 16:
	129	fntable = pl110_draw_fn_16;
	130	dest_width = 2;
	131	break;
	132	case 24:
	133	fntable = pl110_draw_fn_24;
	134	dest_width = 3;
	135	break;
	136	case 32:
	137	fntable = pl110_draw_fn_32;
	138	dest_width = 4;
	139	break;
	140	default:
af2f6733	141	fprintf(stderr, "pl110: Bad color depth\n");
bdd5003a PB	142	exit(1);
bdd5003a PB	143	}
e9c05b42 AZ	144	if (s->cr & PL110_CR_BGR)
	145	bpp_offset = 0;
	146	else
	147	bpp_offset = 18;
	148
bdd5003a	149	if (s->cr & PL110_CR_BEBO)
e9c05b42	150	fn = fntable[s->bpp + 6 + bpp_offset];
bdd5003a	151	else if (s->cr & PL110_CR_BEPO)
e9c05b42	152	fn = fntable[s->bpp + 12 + bpp_offset];
bdd5003a	153	else
e9c05b42	154	fn = fntable[s->bpp + bpp_offset];
3b46e624	155
bdd5003a PB	156	src_width = s->cols;
	157	switch (s->bpp) {
	158	case BPP_1:
	159	src_width >>= 3;
	160	break;
	161	case BPP_2:
	162	src_width >>= 2;
	163	break;
	164	case BPP_4:
	165	src_width >>= 1;
	166	break;
	167	case BPP_8:
	168	break;
	169	case BPP_16:
	170	src_width <<= 1;
	171	break;
	172	case BPP_32:
	173	src_width <<= 2;
	174	break;
	175	}
	176	dest_width *= s->cols;
714fa308 PB	177	first = 0;
	178	framebuffer_update_display(s->ds,
	179	s->upbase, s->cols, s->rows,
	180	src_width, dest_width, 0,
	181	s->invalidate,
	182	fn, s->pallette,
	183	&first, &last);
	184	if (first >= 0) {
	185	dpy_update(s->ds, 0, first, s->cols, last - first + 1);
bdd5003a	186	}
bdd5003a	187	s->invalidate = 0;
bdd5003a PB	188	}
bdd5003a PB	189
95219897	190	static void pl110_invalidate_display(void * opaque)
bdd5003a PB	191	{
	192	pl110_state s = (pl110_state )opaque;
	193	s->invalidate = 1;
bfdb3629 BS	194	if (pl110_enabled(s)) {
	195	qemu_console_resize(s->ds, s->cols, s->rows);
	196	}
bdd5003a PB	197	}
	198
	199	static void pl110_update_pallette(pl110_state *s, int n)
	200	{
	201	int i;
	202	uint32_t raw;
	203	unsigned int r, g, b;
	204
	205	raw = s->raw_pallette[n];
	206	n <<= 1;
	207	for (i = 0; i < 2; i++) {
	208	r = (raw & 0x1f) << 3;
	209	raw >>= 5;
	210	g = (raw & 0x1f) << 3;
	211	raw >>= 5;
	212	b = (raw & 0x1f) << 3;
	213	/* The I bit is ignored. */
	214	raw >>= 6;
0e1f5a0c	215	switch (ds_get_bits_per_pixel(s->ds)) {
bdd5003a PB	216	case 8:
	217	s->pallette[n] = rgb_to_pixel8(r, g, b);
	218	break;
	219	case 15:
	220	s->pallette[n] = rgb_to_pixel15(r, g, b);
	221	break;
	222	case 16:
	223	s->pallette[n] = rgb_to_pixel16(r, g, b);
	224	break;
	225	case 24:
	226	case 32:
	227	s->pallette[n] = rgb_to_pixel32(r, g, b);
	228	break;
	229	}
	230	n++;
	231	}
	232	}
	233
	234	static void pl110_resize(pl110_state *s, int width, int height)
	235	{
	236	if (width != s->cols \|\| height != s->rows) {
	237	if (pl110_enabled(s)) {
3023f332	238	qemu_console_resize(s->ds, width, height);
bdd5003a PB	239	}
	240	}
	241	s->cols = width;
	242	s->rows = height;
	243	}
	244
	245	/* Update interrupts. */
	246	static void pl110_update(pl110_state *s)
	247	{
	248	/* TODO: Implement interrupts. */
	249	}
	250
c227f099	251	static uint32_t pl110_read(void *opaque, target_phys_addr_t offset)
bdd5003a PB	252	{
	253	pl110_state s = (pl110_state )opaque;
	254
bdd5003a	255	if (offset >= 0xfe0 && offset < 0x1000) {
cdbdb648 PB	256	if (s->versatile)
	257	return pl110_versatile_id[(offset - 0xfe0) >> 2];
	258	else
	259	return pl110_id[(offset - 0xfe0) >> 2];
bdd5003a PB	260	}
	261	if (offset >= 0x200 && offset < 0x400) {
	262	return s->raw_pallette[(offset - 0x200) >> 2];
	263	}
	264	switch (offset >> 2) {
	265	case 0: /* LCDTiming0 */
	266	return s->timing[0];
	267	case 1: /* LCDTiming1 */
	268	return s->timing[1];
	269	case 2: /* LCDTiming2 */
	270	return s->timing[2];
	271	case 3: /* LCDTiming3 */
	272	return s->timing[3];
	273	case 4: /* LCDUPBASE */
	274	return s->upbase;
	275	case 5: /* LCDLPBASE */
	276	return s->lpbase;
	277	case 6: /* LCDIMSC */
64075cd7 PB	278	if (s->versatile)
64075cd7 PB	279	return s->cr;
bdd5003a PB	280	return s->int_mask;
bdd5003a PB	281	case 7: /* LCDControl */
64075cd7 PB	282	if (s->versatile)
64075cd7 PB	283	return s->int_mask;
bdd5003a PB	284	return s->cr;
	285	case 8: /* LCDRIS */
	286	return s->int_status;
	287	case 9: /* LCDMIS */
	288	return s->int_status & s->int_mask;
	289	case 11: /* LCDUPCURR */
	290	/* TODO: Implement vertical refresh. */
	291	return s->upbase;
	292	case 12: /* LCDLPCURR */
	293	return s->lpbase;
	294	default:
2ac71179	295	hw_error("pl110_read: Bad offset %x\n", (int)offset);
bdd5003a PB	296	return 0;
	297	}
	298	}
	299
c227f099	300	static void pl110_write(void *opaque, target_phys_addr_t offset,
bdd5003a PB	301	uint32_t val)
	302	{
	303	pl110_state s = (pl110_state )opaque;
	304	int n;
	305
	306	/* For simplicity invalidate the display whenever a control register
	307	is writen to. */
	308	s->invalidate = 1;
bdd5003a PB	309	if (offset >= 0x200 && offset < 0x400) {
	310	/* Pallette. */
	311	n = (offset - 0x200) >> 2;
	312	s->raw_pallette[(offset - 0x200) >> 2] = val;
	313	pl110_update_pallette(s, n);
e10c2bfb	314	return;
bdd5003a PB	315	}
	316	switch (offset >> 2) {
	317	case 0: /* LCDTiming0 */
	318	s->timing[0] = val;
	319	n = ((val & 0xfc) + 4) * 4;
	320	pl110_resize(s, n, s->rows);
	321	break;
	322	case 1: /* LCDTiming1 */
	323	s->timing[1] = val;
	324	n = (val & 0x3ff) + 1;
	325	pl110_resize(s, s->cols, n);
	326	break;
	327	case 2: /* LCDTiming2 */
	328	s->timing[2] = val;
	329	break;
	330	case 3: /* LCDTiming3 */
	331	s->timing[3] = val;
	332	break;
	333	case 4: /* LCDUPBASE */
	334	s->upbase = val;
	335	break;
	336	case 5: /* LCDLPBASE */
	337	s->lpbase = val;
	338	break;
	339	case 6: /* LCDIMSC */
cdbdb648 PB	340	if (s->versatile)
	341	goto control;
	342	imsc:
bdd5003a PB	343	s->int_mask = val;
	344	pl110_update(s);
	345	break;
	346	case 7: /* LCDControl */
cdbdb648 PB	347	if (s->versatile)
	348	goto imsc;
	349	control:
bdd5003a PB	350	s->cr = val;
	351	s->bpp = (val >> 1) & 7;
	352	if (pl110_enabled(s)) {
3023f332	353	qemu_console_resize(s->ds, s->cols, s->rows);
bdd5003a PB	354	}
	355	break;
	356	case 10: /* LCDICR */
	357	s->int_status &= ~val;
	358	pl110_update(s);
	359	break;
	360	default:
2ac71179	361	hw_error("pl110_write: Bad offset %x\n", (int)offset);
bdd5003a PB	362	}
	363	}
	364
d60efc6b	365	static CPUReadMemoryFunc * const pl110_readfn[] = {
bdd5003a PB	366	pl110_read,
	367	pl110_read,
	368	pl110_read
	369	};
	370
d60efc6b	371	static CPUWriteMemoryFunc * const pl110_writefn[] = {
bdd5003a PB	372	pl110_write,
	373	pl110_write,
	374	pl110_write
	375	};
	376
81a322d4	377	static int pl110_init(SysBusDevice *dev)
bdd5003a	378	{
2e9bdce5	379	pl110_state *s = FROM_SYSBUS(pl110_state, dev);
bdd5003a PB	380	int iomemtype;
bdd5003a PB	381
1eed09cb	382	iomemtype = cpu_register_io_memory(pl110_readfn,
2507c12a AG	383	pl110_writefn, s,
2507c12a AG	384	DEVICE_NATIVE_ENDIAN);
2e9bdce5 PB	385	sysbus_init_mmio(dev, 0x1000, iomemtype);
2e9bdce5 PB	386	sysbus_init_irq(dev, &s->irq);
3023f332 AL	387	s->ds = graphic_console_init(pl110_update_display,
	388	pl110_invalidate_display,
	389	NULL, NULL, s);
81a322d4	390	return 0;
bdd5003a	391	}
2e9bdce5	392
81a322d4	393	static int pl110_versatile_init(SysBusDevice *dev)
2e9bdce5 PB	394	{
	395	pl110_state *s = FROM_SYSBUS(pl110_state, dev);
	396	s->versatile = 1;
81a322d4	397	return pl110_init(dev);
2e9bdce5 PB	398	}
2e9bdce5 PB	399
8c60d065 PM	400	static SysBusDeviceInfo pl110_info = {
	401	.init = pl110_init,
	402	.qdev.name = "pl110",
	403	.qdev.size = sizeof(pl110_state),
	404	.qdev.vmsd = &vmstate_pl110,
	405	.qdev.no_user = 1,
	406	};
	407
	408	static SysBusDeviceInfo pl110_versatile_info = {
	409	.init = pl110_versatile_init,
	410	.qdev.name = "pl110_versatile",
	411	.qdev.size = sizeof(pl110_state),
	412	.qdev.vmsd = &vmstate_pl110,
	413	.qdev.no_user = 1,
	414	};
	415
2e9bdce5 PB	416	static void pl110_register_devices(void)
2e9bdce5 PB	417	{
8c60d065 PM	418	sysbus_register_withprop(&pl110_info);
8c60d065 PM	419	sysbus_register_withprop(&pl110_versatile_info);
2e9bdce5 PB	420	}
	421
	422	device_init(pl110_register_devices)