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no error code if hardware interrupt
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7d13299d
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1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
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6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
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11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
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16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 */
20#include "exec-i386.h"
7bfdb6d1 21
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22/* n must be a constant to be efficient */
23static inline int lshift(int x, int n)
7bfdb6d1 24{
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25 if (n >= 0)
26 return x << n;
27 else
28 return x >> (-n);
7bfdb6d1 29}
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30
31/* we define the various pieces of code used by the JIT */
32
33#define REG EAX
34#define REGNAME _EAX
35#include "opreg_template.h"
36#undef REG
37#undef REGNAME
38
39#define REG ECX
40#define REGNAME _ECX
41#include "opreg_template.h"
42#undef REG
43#undef REGNAME
44
45#define REG EDX
46#define REGNAME _EDX
47#include "opreg_template.h"
48#undef REG
49#undef REGNAME
50
51#define REG EBX
52#define REGNAME _EBX
53#include "opreg_template.h"
54#undef REG
55#undef REGNAME
56
57#define REG ESP
58#define REGNAME _ESP
59#include "opreg_template.h"
60#undef REG
61#undef REGNAME
62
63#define REG EBP
64#define REGNAME _EBP
65#include "opreg_template.h"
66#undef REG
67#undef REGNAME
68
69#define REG ESI
70#define REGNAME _ESI
71#include "opreg_template.h"
72#undef REG
73#undef REGNAME
74
75#define REG EDI
76#define REGNAME _EDI
77#include "opreg_template.h"
78#undef REG
79#undef REGNAME
80
dc99065b 81/* operations with flags */
7bfdb6d1 82
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83/* update flags with T0 and T1 (add/sub case) */
84void OPPROTO op_update2_cc(void)
7bfdb6d1 85{
5797fa5d 86 CC_SRC = T1;
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87 CC_DST = T0;
88}
89
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90/* update flags with T0 (logic operation case) */
91void OPPROTO op_update1_cc(void)
7bfdb6d1 92{
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93 CC_DST = T0;
94}
95
5797fa5d 96void OPPROTO op_update_neg_cc(void)
7bfdb6d1 97{
5797fa5d 98 CC_SRC = -T0;
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99 CC_DST = T0;
100}
101
102void OPPROTO op_cmpl_T0_T1_cc(void)
103{
5797fa5d 104 CC_SRC = T1;
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105 CC_DST = T0 - T1;
106}
107
5797fa5d 108void OPPROTO op_update_inc_cc(void)
7bfdb6d1 109{
4b74fe1f 110 CC_SRC = cc_table[CC_OP].compute_c();
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111 CC_DST = T0;
112}
113
114void OPPROTO op_testl_T0_T1_cc(void)
115{
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116 CC_DST = T0 & T1;
117}
118
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119/* operations without flags */
120
121void OPPROTO op_addl_T0_T1(void)
122{
123 T0 += T1;
124}
125
126void OPPROTO op_orl_T0_T1(void)
127{
128 T0 |= T1;
129}
130
131void OPPROTO op_andl_T0_T1(void)
132{
133 T0 &= T1;
134}
135
136void OPPROTO op_subl_T0_T1(void)
137{
138 T0 -= T1;
139}
140
141void OPPROTO op_xorl_T0_T1(void)
142{
143 T0 ^= T1;
144}
145
146void OPPROTO op_negl_T0(void)
147{
148 T0 = -T0;
149}
150
151void OPPROTO op_incl_T0(void)
152{
153 T0++;
154}
155
156void OPPROTO op_decl_T0(void)
157{
158 T0--;
159}
160
161void OPPROTO op_notl_T0(void)
162{
163 T0 = ~T0;
164}
165
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166void OPPROTO op_bswapl_T0(void)
167{
168 T0 = bswap32(T0);
169}
170
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171/* multiply/divide */
172void OPPROTO op_mulb_AL_T0(void)
173{
174 unsigned int res;
175 res = (uint8_t)EAX * (uint8_t)T0;
176 EAX = (EAX & 0xffff0000) | res;
177 CC_SRC = (res & 0xff00);
178}
179
180void OPPROTO op_imulb_AL_T0(void)
181{
182 int res;
183 res = (int8_t)EAX * (int8_t)T0;
184 EAX = (EAX & 0xffff0000) | (res & 0xffff);
185 CC_SRC = (res != (int8_t)res);
186}
187
188void OPPROTO op_mulw_AX_T0(void)
189{
190 unsigned int res;
191 res = (uint16_t)EAX * (uint16_t)T0;
192 EAX = (EAX & 0xffff0000) | (res & 0xffff);
193 EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
194 CC_SRC = res >> 16;
195}
196
197void OPPROTO op_imulw_AX_T0(void)
198{
199 int res;
200 res = (int16_t)EAX * (int16_t)T0;
201 EAX = (EAX & 0xffff0000) | (res & 0xffff);
202 EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
203 CC_SRC = (res != (int16_t)res);
204}
205
206void OPPROTO op_mull_EAX_T0(void)
207{
208 uint64_t res;
209 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
210 EAX = res;
211 EDX = res >> 32;
212 CC_SRC = res >> 32;
213}
214
215void OPPROTO op_imull_EAX_T0(void)
216{
217 int64_t res;
218 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
219 EAX = res;
220 EDX = res >> 32;
221 CC_SRC = (res != (int32_t)res);
222}
223
224void OPPROTO op_imulw_T0_T1(void)
225{
226 int res;
227 res = (int16_t)T0 * (int16_t)T1;
228 T0 = res;
229 CC_SRC = (res != (int16_t)res);
230}
231
232void OPPROTO op_imull_T0_T1(void)
233{
234 int64_t res;
4b74fe1f 235 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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236 T0 = res;
237 CC_SRC = (res != (int32_t)res);
238}
239
240/* division, flags are undefined */
9de5e440 241/* XXX: add exceptions for overflow */
87f4827e 242
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243void OPPROTO op_divb_AL_T0(void)
244{
245 unsigned int num, den, q, r;
246
247 num = (EAX & 0xffff);
248 den = (T0 & 0xff);
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249 if (den == 0) {
250 EIP = PARAM1;
9de5e440 251 raise_exception(EXCP00_DIVZ);
f4beb510 252 }
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253 q = (num / den) & 0xff;
254 r = (num % den) & 0xff;
255 EAX = (EAX & 0xffff0000) | (r << 8) | q;
256}
257
258void OPPROTO op_idivb_AL_T0(void)
259{
260 int num, den, q, r;
261
262 num = (int16_t)EAX;
263 den = (int8_t)T0;
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264 if (den == 0) {
265 EIP = PARAM1;
9de5e440 266 raise_exception(EXCP00_DIVZ);
f4beb510 267 }
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268 q = (num / den) & 0xff;
269 r = (num % den) & 0xff;
270 EAX = (EAX & 0xffff0000) | (r << 8) | q;
271}
272
273void OPPROTO op_divw_AX_T0(void)
274{
275 unsigned int num, den, q, r;
276
277 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
278 den = (T0 & 0xffff);
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279 if (den == 0) {
280 EIP = PARAM1;
9de5e440 281 raise_exception(EXCP00_DIVZ);
f4beb510 282 }
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283 q = (num / den) & 0xffff;
284 r = (num % den) & 0xffff;
285 EAX = (EAX & 0xffff0000) | q;
286 EDX = (EDX & 0xffff0000) | r;
287}
288
289void OPPROTO op_idivw_AX_T0(void)
290{
291 int num, den, q, r;
292
293 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
294 den = (int16_t)T0;
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295 if (den == 0) {
296 EIP = PARAM1;
9de5e440 297 raise_exception(EXCP00_DIVZ);
f4beb510 298 }
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299 q = (num / den) & 0xffff;
300 r = (num % den) & 0xffff;
301 EAX = (EAX & 0xffff0000) | q;
302 EDX = (EDX & 0xffff0000) | r;
303}
304
305void OPPROTO op_divl_EAX_T0(void)
306{
87f4827e 307 helper_divl_EAX_T0(PARAM1);
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308}
309
310void OPPROTO op_idivl_EAX_T0(void)
311{
87f4827e 312 helper_idivl_EAX_T0(PARAM1);
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313}
314
dab2ed99 315/* constant load & misc op */
7bfdb6d1 316
ba1c6e37 317void OPPROTO op_movl_T0_im(void)
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318{
319 T0 = PARAM1;
320}
321
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322void OPPROTO op_addl_T0_im(void)
323{
324 T0 += PARAM1;
325}
326
327void OPPROTO op_andl_T0_ffff(void)
328{
329 T0 = T0 & 0xffff;
330}
331
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332void OPPROTO op_andl_T0_im(void)
333{
334 T0 = T0 & PARAM1;
335}
336
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337void OPPROTO op_movl_T0_T1(void)
338{
339 T0 = T1;
340}
341
ba1c6e37 342void OPPROTO op_movl_T1_im(void)
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343{
344 T1 = PARAM1;
345}
346
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347void OPPROTO op_addl_T1_im(void)
348{
349 T1 += PARAM1;
350}
351
352void OPPROTO op_movl_T1_A0(void)
353{
354 T1 = A0;
355}
356
ba1c6e37 357void OPPROTO op_movl_A0_im(void)
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358{
359 A0 = PARAM1;
360}
361
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362void OPPROTO op_addl_A0_im(void)
363{
364 A0 += PARAM1;
365}
366
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367void OPPROTO op_addl_A0_AL(void)
368{
369 A0 += (EAX & 0xff);
370}
371
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372void OPPROTO op_andl_A0_ffff(void)
373{
374 A0 = A0 & 0xffff;
375}
376
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377/* memory access */
378
33417e70
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379#define MEMSUFFIX
380#include "ops_mem.h"
7bfdb6d1 381
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382#define MEMSUFFIX _user
383#include "ops_mem.h"
7bfdb6d1 384
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385#define MEMSUFFIX _kernel
386#include "ops_mem.h"
7bfdb6d1 387
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388/* used for bit operations */
389
390void OPPROTO op_add_bitw_A0_T1(void)
391{
392 A0 += ((int32_t)T1 >> 4) << 1;
393}
394
395void OPPROTO op_add_bitl_A0_T1(void)
396{
397 A0 += ((int32_t)T1 >> 5) << 2;
398}
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399
400/* indirect jump */
0ecfa993 401
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402void OPPROTO op_jmp_T0(void)
403{
dab2ed99 404 EIP = T0;
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405}
406
407void OPPROTO op_jmp_im(void)
408{
dab2ed99 409 EIP = PARAM1;
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410}
411
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412void OPPROTO op_hlt(void)
413{
414 env->exception_index = EXCP_HLT;
415 cpu_loop_exit();
416}
417
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418void OPPROTO op_debug(void)
419{
420 env->exception_index = EXCP_DEBUG;
421 cpu_loop_exit();
422}
423
f4beb510 424void OPPROTO op_raise_interrupt(void)
0ecfa993 425{
504e56eb 426 int intno;
f4beb510 427 unsigned int next_eip;
504e56eb 428 intno = PARAM1;
f4beb510
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429 next_eip = PARAM2;
430 raise_interrupt(intno, 1, 0, next_eip);
0ecfa993
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431}
432
564c8f99 433void OPPROTO op_raise_exception(void)
0ecfa993 434{
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435 int exception_index;
436 exception_index = PARAM1;
437 raise_exception(exception_index);
0ecfa993
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438}
439
440void OPPROTO op_into(void)
441{
442 int eflags;
443 eflags = cc_table[CC_OP].compute_all();
444 if (eflags & CC_O) {
f4beb510 445 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
a4a0ffdb 446 }
504e56eb 447 FORCE_RET();
a4a0ffdb
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448}
449
504e56eb
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450void OPPROTO op_cli(void)
451{
452 env->eflags &= ~IF_MASK;
453}
454
f631ef9b
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455void OPPROTO op_sti(void)
456{
504e56eb 457 env->eflags |= IF_MASK;
f631ef9b
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458}
459
3acace13 460#if 0
f631ef9b 461/* vm86plus instructions */
f631ef9b
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462void OPPROTO op_cli_vm(void)
463{
464 env->eflags &= ~VIF_MASK;
465}
466
467void OPPROTO op_sti_vm(void)
468{
469 env->eflags |= VIF_MASK;
470 if (env->eflags & VIP_MASK) {
471 EIP = PARAM1;
472 raise_exception(EXCP0D_GPF);
473 }
474 FORCE_RET();
475}
3acace13 476#endif
f631ef9b 477
a4a0ffdb
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478void OPPROTO op_boundw(void)
479{
480 int low, high, v;
481 low = ldsw((uint8_t *)A0);
482 high = ldsw((uint8_t *)A0 + 2);
483 v = (int16_t)T0;
f4beb510
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484 if (v < low || v > high) {
485 EIP = PARAM1;
a4a0ffdb 486 raise_exception(EXCP05_BOUND);
f4beb510 487 }
a4a0ffdb
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488 FORCE_RET();
489}
490
491void OPPROTO op_boundl(void)
492{
493 int low, high, v;
494 low = ldl((uint8_t *)A0);
495 high = ldl((uint8_t *)A0 + 4);
496 v = T0;
f4beb510
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497 if (v < low || v > high) {
498 EIP = PARAM1;
a4a0ffdb 499 raise_exception(EXCP05_BOUND);
f4beb510 500 }
a4a0ffdb
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501 FORCE_RET();
502}
503
504void OPPROTO op_cmpxchg8b(void)
505{
87f4827e 506 helper_cmpxchg8b();
0ecfa993
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507}
508
d4e8164f
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509void OPPROTO op_jmp_tb_next(void)
510{
25731098 511 JUMP_TB(op_jmp_tb_next, PARAM1, 0, PARAM2);
d4e8164f
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512}
513
514void OPPROTO op_movl_T0_0(void)
515{
516 T0 = 0;
517}
518
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519void OPPROTO op_exit_tb(void)
520{
521 EXIT_TB();
522}
523
d4e8164f 524/* multiple size ops */
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525
526#define ldul ldl
527
7bfdb6d1 528#define SHIFT 0
367e86e8 529#include "ops_template.h"
7bfdb6d1
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530#undef SHIFT
531
7bfdb6d1 532#define SHIFT 1
367e86e8 533#include "ops_template.h"
7bfdb6d1
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534#undef SHIFT
535
7bfdb6d1 536#define SHIFT 2
367e86e8 537#include "ops_template.h"
7bfdb6d1
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538#undef SHIFT
539
540/* sign extend */
541
542void OPPROTO op_movsbl_T0_T0(void)
543{
544 T0 = (int8_t)T0;
545}
546
547void OPPROTO op_movzbl_T0_T0(void)
548{
549 T0 = (uint8_t)T0;
550}
551
552void OPPROTO op_movswl_T0_T0(void)
553{
554 T0 = (int16_t)T0;
555}
556
557void OPPROTO op_movzwl_T0_T0(void)
558{
559 T0 = (uint16_t)T0;
560}
561
562void OPPROTO op_movswl_EAX_AX(void)
563{
564 EAX = (int16_t)EAX;
565}
566
567void OPPROTO op_movsbw_AX_AL(void)
568{
569 EAX = (EAX & 0xffff0000) | ((int8_t)EAX & 0xffff);
570}
571
572void OPPROTO op_movslq_EDX_EAX(void)
573{
574 EDX = (int32_t)EAX >> 31;
575}
576
577void OPPROTO op_movswl_DX_AX(void)
578{
579 EDX = (EDX & 0xffff0000) | (((int16_t)EAX >> 15) & 0xffff);
580}
581
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582/* string ops helpers */
583
584void OPPROTO op_addl_ESI_T0(void)
585{
586 ESI += T0;
587}
588
589void OPPROTO op_addw_ESI_T0(void)
590{
591 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
592}
593
594void OPPROTO op_addl_EDI_T0(void)
595{
596 EDI += T0;
597}
598
599void OPPROTO op_addw_EDI_T0(void)
600{
601 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
602}
603
604void OPPROTO op_decl_ECX(void)
605{
606 ECX--;
607}
608
609void OPPROTO op_decw_ECX(void)
610{
611 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
612}
613
7bfdb6d1 614/* push/pop */
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615
616void op_pushl_T0(void)
617{
618 uint32_t offset;
619 offset = ESP - 4;
620 stl((void *)offset, T0);
621 /* modify ESP after to handle exceptions correctly */
622 ESP = offset;
623}
624
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625void op_pushw_T0(void)
626{
627 uint32_t offset;
628 offset = ESP - 2;
629 stw((void *)offset, T0);
630 /* modify ESP after to handle exceptions correctly */
631 ESP = offset;
632}
633
634void op_pushl_ss32_T0(void)
7bfdb6d1
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635{
636 uint32_t offset;
637 offset = ESP - 4;
d8bc1fd0 638 stl(env->segs[R_SS].base + offset, T0);
dab2ed99
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639 /* modify ESP after to handle exceptions correctly */
640 ESP = offset;
641}
642
643void op_pushw_ss32_T0(void)
644{
645 uint32_t offset;
646 offset = ESP - 2;
d8bc1fd0 647 stw(env->segs[R_SS].base + offset, T0);
7bfdb6d1
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648 /* modify ESP after to handle exceptions correctly */
649 ESP = offset;
650}
651
dab2ed99
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652void op_pushl_ss16_T0(void)
653{
654 uint32_t offset;
655 offset = (ESP - 4) & 0xffff;
d8bc1fd0 656 stl(env->segs[R_SS].base + offset, T0);
dab2ed99
FB
657 /* modify ESP after to handle exceptions correctly */
658 ESP = (ESP & ~0xffff) | offset;
659}
660
661void op_pushw_ss16_T0(void)
662{
663 uint32_t offset;
664 offset = (ESP - 2) & 0xffff;
d8bc1fd0 665 stw(env->segs[R_SS].base + offset, T0);
dab2ed99
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666 /* modify ESP after to handle exceptions correctly */
667 ESP = (ESP & ~0xffff) | offset;
668}
669
670/* NOTE: ESP update is done after */
7bfdb6d1
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671void op_popl_T0(void)
672{
673 T0 = ldl((void *)ESP);
dab2ed99
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674}
675
676void op_popw_T0(void)
677{
678 T0 = lduw((void *)ESP);
679}
680
681void op_popl_ss32_T0(void)
682{
d8bc1fd0 683 T0 = ldl(env->segs[R_SS].base + ESP);
dab2ed99
FB
684}
685
686void op_popw_ss32_T0(void)
687{
d8bc1fd0 688 T0 = lduw(env->segs[R_SS].base + ESP);
dab2ed99
FB
689}
690
691void op_popl_ss16_T0(void)
692{
d8bc1fd0 693 T0 = ldl(env->segs[R_SS].base + (ESP & 0xffff));
dab2ed99
FB
694}
695
696void op_popw_ss16_T0(void)
697{
d8bc1fd0 698 T0 = lduw(env->segs[R_SS].base + (ESP & 0xffff));
dab2ed99
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699}
700
701void op_addl_ESP_4(void)
702{
7bfdb6d1
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703 ESP += 4;
704}
705
dab2ed99
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706void op_addl_ESP_2(void)
707{
708 ESP += 2;
709}
710
711void op_addw_ESP_4(void)
712{
713 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
714}
715
716void op_addw_ESP_2(void)
717{
718 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
719}
720
7bfdb6d1
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721void op_addl_ESP_im(void)
722{
723 ESP += PARAM1;
724}
367e86e8 725
dab2ed99
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726void op_addw_ESP_im(void)
727{
728 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
27362c82
FB
729}
730
a4a0ffdb 731void OPPROTO op_rdtsc(void)
27362c82 732{
87f4827e 733 helper_rdtsc();
27362c82
FB
734}
735
a4a0ffdb
FB
736void OPPROTO op_cpuid(void)
737{
738 helper_cpuid();
739}
740
3c1cf9fa
FB
741void OPPROTO op_rdmsr(void)
742{
743 helper_rdmsr();
744}
745
746void OPPROTO op_wrmsr(void)
747{
748 helper_wrmsr();
749}
750
27362c82
FB
751/* bcd */
752
753/* XXX: exception */
754void OPPROTO op_aam(void)
755{
756 int base = PARAM1;
757 int al, ah;
758 al = EAX & 0xff;
759 ah = al / base;
760 al = al % base;
761 EAX = (EAX & ~0xffff) | al | (ah << 8);
762 CC_DST = al;
763}
764
765void OPPROTO op_aad(void)
766{
767 int base = PARAM1;
768 int al, ah;
769 al = EAX & 0xff;
770 ah = (EAX >> 8) & 0xff;
771 al = ((ah * base) + al) & 0xff;
772 EAX = (EAX & ~0xffff) | al;
773 CC_DST = al;
774}
775
776void OPPROTO op_aaa(void)
777{
778 int icarry;
779 int al, ah, af;
780 int eflags;
781
782 eflags = cc_table[CC_OP].compute_all();
783 af = eflags & CC_A;
784 al = EAX & 0xff;
785 ah = (EAX >> 8) & 0xff;
786
787 icarry = (al > 0xf9);
788 if (((al & 0x0f) > 9 ) || af) {
789 al = (al + 6) & 0x0f;
790 ah = (ah + 1 + icarry) & 0xff;
791 eflags |= CC_C | CC_A;
792 } else {
793 eflags &= ~(CC_C | CC_A);
794 al &= 0x0f;
795 }
796 EAX = (EAX & ~0xffff) | al | (ah << 8);
797 CC_SRC = eflags;
798}
799
800void OPPROTO op_aas(void)
801{
802 int icarry;
803 int al, ah, af;
804 int eflags;
805
806 eflags = cc_table[CC_OP].compute_all();
807 af = eflags & CC_A;
808 al = EAX & 0xff;
809 ah = (EAX >> 8) & 0xff;
810
811 icarry = (al < 6);
812 if (((al & 0x0f) > 9 ) || af) {
813 al = (al - 6) & 0x0f;
814 ah = (ah - 1 - icarry) & 0xff;
815 eflags |= CC_C | CC_A;
816 } else {
817 eflags &= ~(CC_C | CC_A);
818 al &= 0x0f;
819 }
820 EAX = (EAX & ~0xffff) | al | (ah << 8);
821 CC_SRC = eflags;
822}
823
824void OPPROTO op_daa(void)
825{
826 int al, af, cf;
827 int eflags;
828
829 eflags = cc_table[CC_OP].compute_all();
830 cf = eflags & CC_C;
831 af = eflags & CC_A;
832 al = EAX & 0xff;
833
834 eflags = 0;
835 if (((al & 0x0f) > 9 ) || af) {
836 al = (al + 6) & 0xff;
837 eflags |= CC_A;
838 }
839 if ((al > 0x9f) || cf) {
840 al = (al + 0x60) & 0xff;
841 eflags |= CC_C;
842 }
843 EAX = (EAX & ~0xff) | al;
844 /* well, speed is not an issue here, so we compute the flags by hand */
845 eflags |= (al == 0) << 6; /* zf */
846 eflags |= parity_table[al]; /* pf */
847 eflags |= (al & 0x80); /* sf */
848 CC_SRC = eflags;
849}
850
851void OPPROTO op_das(void)
852{
853 int al, al1, af, cf;
854 int eflags;
855
856 eflags = cc_table[CC_OP].compute_all();
857 cf = eflags & CC_C;
858 af = eflags & CC_A;
859 al = EAX & 0xff;
860
861 eflags = 0;
862 al1 = al;
863 if (((al & 0x0f) > 9 ) || af) {
864 eflags |= CC_A;
865 if (al < 6 || cf)
866 eflags |= CC_C;
867 al = (al - 6) & 0xff;
868 }
869 if ((al1 > 0x99) || cf) {
870 al = (al - 0x60) & 0xff;
871 eflags |= CC_C;
872 }
873 EAX = (EAX & ~0xff) | al;
874 /* well, speed is not an issue here, so we compute the flags by hand */
875 eflags |= (al == 0) << 6; /* zf */
876 eflags |= parity_table[al]; /* pf */
877 eflags |= (al & 0x80); /* sf */
878 CC_SRC = eflags;
879}
880
6dbad63e
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881/* segment handling */
882
6dbad63e
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883void OPPROTO op_movl_seg_T0(void)
884{
f4beb510
FB
885 load_seg(PARAM1, T0 & 0xffff, PARAM2);
886}
887
888/* faster VM86 version */
889void OPPROTO op_movl_seg_T0_vm(void)
890{
891 int selector;
d8bc1fd0 892 SegmentCache *sc;
f4beb510
FB
893
894 selector = T0 & 0xffff;
895 /* env->segs[] access */
d8bc1fd0
FB
896 sc = (SegmentCache *)((char *)env + PARAM1);
897 sc->selector = selector;
898 sc->base = (void *)(selector << 4);
6dbad63e
FB
899}
900
901void OPPROTO op_movl_T0_seg(void)
902{
d8bc1fd0 903 T0 = env->segs[PARAM1].selector;
6dbad63e
FB
904}
905
a4a0ffdb
FB
906void OPPROTO op_movl_A0_seg(void)
907{
908 A0 = *(unsigned long *)((char *)env + PARAM1);
909}
910
6dbad63e
FB
911void OPPROTO op_addl_A0_seg(void)
912{
913 A0 += *(unsigned long *)((char *)env + PARAM1);
914}
915
2792c4f2
FB
916void OPPROTO op_lsl(void)
917{
918 helper_lsl();
919}
920
2792c4f2
FB
921void OPPROTO op_lar(void)
922{
923 helper_lar();
924}
925
d8bc1fd0 926/* T0: segment, T1:eip */
2c1794c4 927void OPPROTO op_ljmp_protected_T0_T1(void)
d8bc1fd0 928{
2c1794c4
FB
929 helper_ljmp_protected_T0_T1();
930}
931
932void OPPROTO op_lcall_real_T0_T1(void)
933{
934 helper_lcall_real_T0_T1(PARAM1, PARAM2);
935}
936
937void OPPROTO op_lcall_protected_T0_T1(void)
938{
939 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
d8bc1fd0
FB
940}
941
8f186479
FB
942void OPPROTO op_iret_real(void)
943{
944 helper_iret_real(PARAM1);
945}
946
90a9fdae
FB
947void OPPROTO op_iret_protected(void)
948{
949 helper_iret_protected(PARAM1);
950}
951
2c1794c4
FB
952void OPPROTO op_lret_protected(void)
953{
954 helper_lret_protected(PARAM1, PARAM2);
955}
956
d8bc1fd0
FB
957void OPPROTO op_lldt_T0(void)
958{
959 helper_lldt_T0();
960}
961
962void OPPROTO op_ltr_T0(void)
963{
964 helper_ltr_T0();
965}
966
967/* CR registers access */
968void OPPROTO op_movl_crN_T0(void)
969{
970 helper_movl_crN_T0(PARAM1);
971}
972
973/* DR registers access */
974void OPPROTO op_movl_drN_T0(void)
975{
976 helper_movl_drN_T0(PARAM1);
977}
978
979void OPPROTO op_lmsw_T0(void)
980{
981 /* only 4 lower bits of CR0 are modified */
982 T0 = (env->cr[0] & ~0xf) | (T0 & 0xf);
983 helper_movl_crN_T0(0);
984}
985
90a9fdae
FB
986void OPPROTO op_invlpg_A0(void)
987{
988 helper_invlpg(A0);
989}
990
d8bc1fd0
FB
991void OPPROTO op_movl_T0_env(void)
992{
993 T0 = *(uint32_t *)((char *)env + PARAM1);
994}
995
996void OPPROTO op_movl_env_T0(void)
997{
998 *(uint32_t *)((char *)env + PARAM1) = T0;
999}
1000
1001void OPPROTO op_movl_env_T1(void)
1002{
1003 *(uint32_t *)((char *)env + PARAM1) = T1;
1004}
1005
1006void OPPROTO op_clts(void)
1007{
1008 env->cr[0] &= ~CR0_TS_MASK;
1009}
1010
367e86e8
FB
1011/* flags handling */
1012
d4e8164f
FB
1013/* slow jumps cases : in order to avoid calling a function with a
1014 pointer (which can generate a stack frame on PowerPC), we use
1015 op_setcc to set T0 and then call op_jcc. */
1016void OPPROTO op_jcc(void)
367e86e8 1017{
d4e8164f 1018 if (T0)
25731098 1019 JUMP_TB(op_jcc, PARAM1, 0, PARAM2);
367e86e8 1020 else
25731098 1021 JUMP_TB(op_jcc, PARAM1, 1, PARAM3);
0ecfa993 1022 FORCE_RET();
367e86e8
FB
1023}
1024
1025/* slow set cases (compute x86 flags) */
1026void OPPROTO op_seto_T0_cc(void)
1027{
1028 int eflags;
1029 eflags = cc_table[CC_OP].compute_all();
1030 T0 = (eflags >> 11) & 1;
1031}
1032
1033void OPPROTO op_setb_T0_cc(void)
1034{
1035 T0 = cc_table[CC_OP].compute_c();
1036}
1037
1038void OPPROTO op_setz_T0_cc(void)
1039{
1040 int eflags;
1041 eflags = cc_table[CC_OP].compute_all();
1042 T0 = (eflags >> 6) & 1;
1043}
1044
1045void OPPROTO op_setbe_T0_cc(void)
1046{
1047 int eflags;
1048 eflags = cc_table[CC_OP].compute_all();
1049 T0 = (eflags & (CC_Z | CC_C)) != 0;
1050}
1051
1052void OPPROTO op_sets_T0_cc(void)
1053{
1054 int eflags;
1055 eflags = cc_table[CC_OP].compute_all();
1056 T0 = (eflags >> 7) & 1;
1057}
1058
1059void OPPROTO op_setp_T0_cc(void)
1060{
1061 int eflags;
1062 eflags = cc_table[CC_OP].compute_all();
1063 T0 = (eflags >> 2) & 1;
1064}
1065
1066void OPPROTO op_setl_T0_cc(void)
1067{
1068 int eflags;
1069 eflags = cc_table[CC_OP].compute_all();
1070 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1071}
1072
1073void OPPROTO op_setle_T0_cc(void)
1074{
1075 int eflags;
1076 eflags = cc_table[CC_OP].compute_all();
1077 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1078}
1079
1080void OPPROTO op_xor_T0_1(void)
1081{
1082 T0 ^= 1;
1083}
1084
1085void OPPROTO op_set_cc_op(void)
1086{
1087 CC_OP = PARAM1;
1088}
1089
90a9fdae 1090#define FL_UPDATE_MASK16 (FL_UPDATE_MASK32 & 0xffff)
a4a0ffdb 1091
367e86e8
FB
1092void OPPROTO op_movl_eflags_T0(void)
1093{
a4a0ffdb
FB
1094 int eflags;
1095 eflags = T0;
1096 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1097 DF = 1 - (2 * ((eflags >> 10) & 1));
1098 /* we also update some system flags as in user mode */
90a9fdae
FB
1099 env->eflags = (env->eflags & ~FL_UPDATE_MASK32) |
1100 (eflags & FL_UPDATE_MASK32);
f631ef9b
FB
1101}
1102
1103void OPPROTO op_movw_eflags_T0(void)
1104{
1105 int eflags;
1106 eflags = T0;
1107 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1108 DF = 1 - (2 * ((eflags >> 10) & 1));
1109 /* we also update some system flags as in user mode */
90a9fdae
FB
1110 env->eflags = (env->eflags & ~FL_UPDATE_MASK16) |
1111 (eflags & FL_UPDATE_MASK16);
1112}
1113
1114void OPPROTO op_movl_eflags_T0_cpl0(void)
1115{
1116 load_eflags(T0, FL_UPDATE_CPL0_MASK);
1117}
1118
1119void OPPROTO op_movw_eflags_T0_cpl0(void)
1120{
1121 load_eflags(T0, FL_UPDATE_CPL0_MASK & 0xffff);
f631ef9b
FB
1122}
1123
3acace13
FB
1124#if 0
1125/* vm86plus version */
f631ef9b
FB
1126void OPPROTO op_movw_eflags_T0_vm(void)
1127{
1128 int eflags;
1129 eflags = T0;
1130 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1131 DF = 1 - (2 * ((eflags >> 10) & 1));
1132 /* we also update some system flags as in user mode */
1133 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1134 (eflags & FL_UPDATE_MASK16);
1135 if (eflags & IF_MASK) {
1136 env->eflags |= VIF_MASK;
1137 if (env->eflags & VIP_MASK) {
1138 EIP = PARAM1;
1139 raise_exception(EXCP0D_GPF);
1140 }
1141 }
1142 FORCE_RET();
1143}
1144
1145void OPPROTO op_movl_eflags_T0_vm(void)
1146{
1147 int eflags;
1148 eflags = T0;
1149 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1150 DF = 1 - (2 * ((eflags >> 10) & 1));
1151 /* we also update some system flags as in user mode */
1152 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1153 (eflags & FL_UPDATE_MASK32);
1154 if (eflags & IF_MASK) {
1155 env->eflags |= VIF_MASK;
1156 if (env->eflags & VIP_MASK) {
1157 EIP = PARAM1;
1158 raise_exception(EXCP0D_GPF);
1159 }
1160 }
1161 FORCE_RET();
367e86e8 1162}
3acace13 1163#endif
367e86e8
FB
1164
1165/* XXX: compute only O flag */
1166void OPPROTO op_movb_eflags_T0(void)
1167{
1168 int of;
1169 of = cc_table[CC_OP].compute_all() & CC_O;
a4a0ffdb 1170 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
367e86e8
FB
1171}
1172
1173void OPPROTO op_movl_T0_eflags(void)
1174{
a4a0ffdb
FB
1175 int eflags;
1176 eflags = cc_table[CC_OP].compute_all();
1177 eflags |= (DF & DF_MASK);
1178 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1179 T0 = eflags;
367e86e8
FB
1180}
1181
3acace13
FB
1182/* vm86plus version */
1183#if 0
f631ef9b
FB
1184void OPPROTO op_movl_T0_eflags_vm(void)
1185{
1186 int eflags;
1187 eflags = cc_table[CC_OP].compute_all();
1188 eflags |= (DF & DF_MASK);
1189 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1190 if (env->eflags & VIF_MASK)
1191 eflags |= IF_MASK;
1192 T0 = eflags;
1193}
3acace13 1194#endif
f631ef9b 1195
367e86e8
FB
1196void OPPROTO op_cld(void)
1197{
1198 DF = 1;
1199}
1200
1201void OPPROTO op_std(void)
1202{
1203 DF = -1;
1204}
1205
1206void OPPROTO op_clc(void)
1207{
1208 int eflags;
1209 eflags = cc_table[CC_OP].compute_all();
1210 eflags &= ~CC_C;
1211 CC_SRC = eflags;
1212}
1213
1214void OPPROTO op_stc(void)
1215{
1216 int eflags;
1217 eflags = cc_table[CC_OP].compute_all();
1218 eflags |= CC_C;
1219 CC_SRC = eflags;
1220}
1221
1222void OPPROTO op_cmc(void)
1223{
1224 int eflags;
1225 eflags = cc_table[CC_OP].compute_all();
1226 eflags ^= CC_C;
1227 CC_SRC = eflags;
1228}
1229
27362c82
FB
1230void OPPROTO op_salc(void)
1231{
1232 int cf;
1233 cf = cc_table[CC_OP].compute_c();
1234 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1235}
1236
367e86e8
FB
1237static int compute_all_eflags(void)
1238{
1239 return CC_SRC;
1240}
1241
1242static int compute_c_eflags(void)
1243{
1244 return CC_SRC & CC_C;
1245}
1246
1247static int compute_c_mul(void)
1248{
1249 int cf;
1250 cf = (CC_SRC != 0);
1251 return cf;
1252}
1253
1254static int compute_all_mul(void)
1255{
1256 int cf, pf, af, zf, sf, of;
1257 cf = (CC_SRC != 0);
1258 pf = 0; /* undefined */
1259 af = 0; /* undefined */
1260 zf = 0; /* undefined */
1261 sf = 0; /* undefined */
1262 of = cf << 11;
1263 return cf | pf | af | zf | sf | of;
1264}
1265
1266CCTable cc_table[CC_OP_NB] = {
1267 [CC_OP_DYNAMIC] = { /* should never happen */ },
1268
1269 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1270
1271 [CC_OP_MUL] = { compute_all_mul, compute_c_mul },
1272
1273 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1274 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1275 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1276
4b74fe1f
FB
1277 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1278 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1279 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1280
367e86e8
FB
1281 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1282 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1283 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1284
4b74fe1f
FB
1285 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1286 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1287 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1288
367e86e8
FB
1289 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1290 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1291 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1292
4b74fe1f
FB
1293 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1294 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
367e86e8
FB
1295 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1296
4b74fe1f
FB
1297 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1298 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
367e86e8
FB
1299 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1300
2792c4f2
FB
1301 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1302 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
367e86e8 1303 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
4b74fe1f 1304
2792c4f2
FB
1305 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1306 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1307 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
367e86e8 1308};
927f621e 1309
f631ef9b
FB
1310/* floating point support. Some of the code for complicated x87
1311 functions comes from the LGPL'ed x86 emulator found in the Willows
1312 TWIN windows emulator. */
927f621e 1313
51fe6890
FB
1314#if defined(__powerpc__)
1315extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
1316
1317/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
1318double qemu_rint(double x)
1319{
1320 double y = 4503599627370496.0;
1321 if (fabs(x) >= y)
1322 return x;
1323 if (x < 0)
1324 y = -y;
1325 y = (x + y) - y;
1326 if (y == 0.0)
1327 y = copysign(y, x);
1328 return y;
1329}
1330
1331#define rint qemu_rint
1332#endif
1333
927f621e
FB
1334/* fp load FT0 */
1335
1336void OPPROTO op_flds_FT0_A0(void)
1337{
d014c98c
FB
1338#ifdef USE_FP_CONVERT
1339 FP_CONVERT.i32 = ldl((void *)A0);
1340 FT0 = FP_CONVERT.f;
1341#else
927f621e 1342 FT0 = ldfl((void *)A0);
d014c98c 1343#endif
927f621e
FB
1344}
1345
1346void OPPROTO op_fldl_FT0_A0(void)
1347{
d014c98c
FB
1348#ifdef USE_FP_CONVERT
1349 FP_CONVERT.i64 = ldq((void *)A0);
1350 FT0 = FP_CONVERT.d;
1351#else
927f621e 1352 FT0 = ldfq((void *)A0);
d014c98c 1353#endif
927f621e
FB
1354}
1355
04369ff2
FB
1356/* helpers are needed to avoid static constant reference. XXX: find a better way */
1357#ifdef USE_INT_TO_FLOAT_HELPERS
1358
1359void helper_fild_FT0_A0(void)
1360{
1361 FT0 = (CPU86_LDouble)ldsw((void *)A0);
1362}
1363
1364void helper_fildl_FT0_A0(void)
1365{
1366 FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1367}
1368
1369void helper_fildll_FT0_A0(void)
1370{
1371 FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1372}
1373
1374void OPPROTO op_fild_FT0_A0(void)
1375{
1376 helper_fild_FT0_A0();
1377}
1378
1379void OPPROTO op_fildl_FT0_A0(void)
1380{
1381 helper_fildl_FT0_A0();
1382}
1383
1384void OPPROTO op_fildll_FT0_A0(void)
1385{
1386 helper_fildll_FT0_A0();
1387}
1388
1389#else
1390
927f621e
FB
1391void OPPROTO op_fild_FT0_A0(void)
1392{
d014c98c
FB
1393#ifdef USE_FP_CONVERT
1394 FP_CONVERT.i32 = ldsw((void *)A0);
1395 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1396#else
927f621e 1397 FT0 = (CPU86_LDouble)ldsw((void *)A0);
d014c98c 1398#endif
927f621e
FB
1399}
1400
1401void OPPROTO op_fildl_FT0_A0(void)
1402{
d014c98c
FB
1403#ifdef USE_FP_CONVERT
1404 FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
1405 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1406#else
927f621e 1407 FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
d014c98c 1408#endif
927f621e
FB
1409}
1410
1411void OPPROTO op_fildll_FT0_A0(void)
1412{
d014c98c
FB
1413#ifdef USE_FP_CONVERT
1414 FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
1415 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1416#else
927f621e 1417 FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
d014c98c 1418#endif
927f621e 1419}
04369ff2 1420#endif
927f621e
FB
1421
1422/* fp load ST0 */
1423
1424void OPPROTO op_flds_ST0_A0(void)
1425{
c39d5b78
FB
1426 int new_fpstt;
1427 new_fpstt = (env->fpstt - 1) & 7;
d014c98c
FB
1428#ifdef USE_FP_CONVERT
1429 FP_CONVERT.i32 = ldl((void *)A0);
c39d5b78 1430 env->fpregs[new_fpstt] = FP_CONVERT.f;
d014c98c 1431#else
c39d5b78 1432 env->fpregs[new_fpstt] = ldfl((void *)A0);
d014c98c 1433#endif
c39d5b78
FB
1434 env->fpstt = new_fpstt;
1435 env->fptags[new_fpstt] = 0; /* validate stack entry */
927f621e
FB
1436}
1437
1438void OPPROTO op_fldl_ST0_A0(void)
1439{
c39d5b78
FB
1440 int new_fpstt;
1441 new_fpstt = (env->fpstt - 1) & 7;
d014c98c
FB
1442#ifdef USE_FP_CONVERT
1443 FP_CONVERT.i64 = ldq((void *)A0);
c39d5b78 1444 env->fpregs[new_fpstt] = FP_CONVERT.d;
d014c98c 1445#else
c39d5b78 1446 env->fpregs[new_fpstt] = ldfq((void *)A0);
d014c98c 1447#endif
c39d5b78
FB
1448 env->fpstt = new_fpstt;
1449 env->fptags[new_fpstt] = 0; /* validate stack entry */
927f621e
FB
1450}
1451
77f8dd5a
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1452#ifdef USE_X86LDOUBLE
1453void OPPROTO op_fldt_ST0_A0(void)
1454{
c39d5b78
FB
1455 int new_fpstt;
1456 new_fpstt = (env->fpstt - 1) & 7;
1457 env->fpregs[new_fpstt] = *(long double *)A0;
1458 env->fpstt = new_fpstt;
1459 env->fptags[new_fpstt] = 0; /* validate stack entry */
77f8dd5a
FB
1460}
1461#else
77f8dd5a
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1462void OPPROTO op_fldt_ST0_A0(void)
1463{
1464 helper_fldt_ST0_A0();
1465}
1466#endif
1467
04369ff2
FB
1468/* helpers are needed to avoid static constant reference. XXX: find a better way */
1469#ifdef USE_INT_TO_FLOAT_HELPERS
1470
1471void helper_fild_ST0_A0(void)
1472{
c39d5b78
FB
1473 int new_fpstt;
1474 new_fpstt = (env->fpstt - 1) & 7;
1475 env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
1476 env->fpstt = new_fpstt;
1477 env->fptags[new_fpstt] = 0; /* validate stack entry */
04369ff2
FB
1478}
1479
1480void helper_fildl_ST0_A0(void)
1481{
c39d5b78
FB
1482 int new_fpstt;
1483 new_fpstt = (env->fpstt - 1) & 7;
1484 env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1485 env->fpstt = new_fpstt;
1486 env->fptags[new_fpstt] = 0; /* validate stack entry */
04369ff2
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1487}
1488
1489void helper_fildll_ST0_A0(void)
1490{
c39d5b78
FB
1491 int new_fpstt;
1492 new_fpstt = (env->fpstt - 1) & 7;
1493 env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1494 env->fpstt = new_fpstt;
1495 env->fptags[new_fpstt] = 0; /* validate stack entry */
04369ff2
FB
1496}
1497
1498void OPPROTO op_fild_ST0_A0(void)
1499{
1500 helper_fild_ST0_A0();
1501}
1502
1503void OPPROTO op_fildl_ST0_A0(void)
1504{
1505 helper_fildl_ST0_A0();
1506}
1507
1508void OPPROTO op_fildll_ST0_A0(void)
1509{
1510 helper_fildll_ST0_A0();
1511}
1512
1513#else
1514
927f621e
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1515void OPPROTO op_fild_ST0_A0(void)
1516{
c39d5b78
FB
1517 int new_fpstt;
1518 new_fpstt = (env->fpstt - 1) & 7;
d014c98c
FB
1519#ifdef USE_FP_CONVERT
1520 FP_CONVERT.i32 = ldsw((void *)A0);
c39d5b78 1521 env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
d014c98c 1522#else
c39d5b78 1523 env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
d014c98c 1524#endif
c39d5b78
FB
1525 env->fpstt = new_fpstt;
1526 env->fptags[new_fpstt] = 0; /* validate stack entry */
927f621e
FB
1527}
1528
1529void OPPROTO op_fildl_ST0_A0(void)
1530{
c39d5b78
FB
1531 int new_fpstt;
1532 new_fpstt = (env->fpstt - 1) & 7;
d014c98c
FB
1533#ifdef USE_FP_CONVERT
1534 FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
c39d5b78 1535 env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
d014c98c 1536#else
c39d5b78 1537 env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
d014c98c 1538#endif
c39d5b78
FB
1539 env->fpstt = new_fpstt;
1540 env->fptags[new_fpstt] = 0; /* validate stack entry */
927f621e
FB
1541}
1542
1543void OPPROTO op_fildll_ST0_A0(void)
1544{
c39d5b78
FB
1545 int new_fpstt;
1546 new_fpstt = (env->fpstt - 1) & 7;
d014c98c
FB
1547#ifdef USE_FP_CONVERT
1548 FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
c39d5b78 1549 env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i64;
d014c98c 1550#else
c39d5b78 1551 env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
d014c98c 1552#endif
c39d5b78
FB
1553 env->fpstt = new_fpstt;
1554 env->fptags[new_fpstt] = 0; /* validate stack entry */
927f621e
FB
1555}
1556
04369ff2
FB
1557#endif
1558
927f621e
FB
1559/* fp store */
1560
1561void OPPROTO op_fsts_ST0_A0(void)
1562{
d014c98c 1563#ifdef USE_FP_CONVERT
87f4827e 1564 FP_CONVERT.f = (float)ST0;
d014c98c
FB
1565 stfl((void *)A0, FP_CONVERT.f);
1566#else
927f621e 1567 stfl((void *)A0, (float)ST0);
d014c98c 1568#endif
927f621e
FB
1569}
1570
1571void OPPROTO op_fstl_ST0_A0(void)
1572{
77f8dd5a 1573 stfq((void *)A0, (double)ST0);
927f621e
FB
1574}
1575
77f8dd5a
FB
1576#ifdef USE_X86LDOUBLE
1577void OPPROTO op_fstt_ST0_A0(void)
1578{
1579 *(long double *)A0 = ST0;
1580}
1581#else
77f8dd5a
FB
1582void OPPROTO op_fstt_ST0_A0(void)
1583{
1584 helper_fstt_ST0_A0();
1585}
1586#endif
1587
927f621e
FB
1588void OPPROTO op_fist_ST0_A0(void)
1589{
d014c98c
FB
1590#if defined(__sparc__) && !defined(__sparc_v9__)
1591 register CPU86_LDouble d asm("o0");
1592#else
1593 CPU86_LDouble d;
1594#endif
927f621e 1595 int val;
d014c98c
FB
1596
1597 d = ST0;
1598 val = lrint(d);
1e5ffbed
FB
1599 if (val != (int16_t)val)
1600 val = -32768;
927f621e
FB
1601 stw((void *)A0, val);
1602}
1603
1604void OPPROTO op_fistl_ST0_A0(void)
1605{
d014c98c
FB
1606#if defined(__sparc__) && !defined(__sparc_v9__)
1607 register CPU86_LDouble d asm("o0");
1608#else
1609 CPU86_LDouble d;
1610#endif
927f621e 1611 int val;
d014c98c
FB
1612
1613 d = ST0;
1614 val = lrint(d);
927f621e
FB
1615 stl((void *)A0, val);
1616}
1617
1618void OPPROTO op_fistll_ST0_A0(void)
1619{
d014c98c
FB
1620#if defined(__sparc__) && !defined(__sparc_v9__)
1621 register CPU86_LDouble d asm("o0");
1622#else
1623 CPU86_LDouble d;
1624#endif
927f621e 1625 int64_t val;
d014c98c
FB
1626
1627 d = ST0;
1628 val = llrint(d);
927f621e
FB
1629 stq((void *)A0, val);
1630}
1631
77f8dd5a
FB
1632void OPPROTO op_fbld_ST0_A0(void)
1633{
1634 helper_fbld_ST0_A0();
1635}
1636
77f8dd5a
FB
1637void OPPROTO op_fbst_ST0_A0(void)
1638{
1639 helper_fbst_ST0_A0();
1640}
1641
927f621e
FB
1642/* FPU move */
1643
927f621e
FB
1644void OPPROTO op_fpush(void)
1645{
1646 fpush();
1647}
1648
1649void OPPROTO op_fpop(void)
1650{
1651 fpop();
1652}
1653
1654void OPPROTO op_fdecstp(void)
1655{
1656 env->fpstt = (env->fpstt - 1) & 7;
1657 env->fpus &= (~0x4700);
1658}
1659
1660void OPPROTO op_fincstp(void)
1661{
1662 env->fpstt = (env->fpstt + 1) & 7;
1663 env->fpus &= (~0x4700);
1664}
1665
1666void OPPROTO op_fmov_ST0_FT0(void)
1667{
1668 ST0 = FT0;
1669}
1670
1671void OPPROTO op_fmov_FT0_STN(void)
1672{
1673 FT0 = ST(PARAM1);
1674}
1675
1676void OPPROTO op_fmov_ST0_STN(void)
1677{
1678 ST0 = ST(PARAM1);
1679}
1680
1681void OPPROTO op_fmov_STN_ST0(void)
1682{
1683 ST(PARAM1) = ST0;
1684}
1685
1686void OPPROTO op_fxchg_ST0_STN(void)
1687{
1688 CPU86_LDouble tmp;
1689 tmp = ST(PARAM1);
1690 ST(PARAM1) = ST0;
1691 ST0 = tmp;
1692}
1693
1694/* FPU operations */
1695
1696/* XXX: handle nans */
1697void OPPROTO op_fcom_ST0_FT0(void)
1698{
1699 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1700 if (ST0 < FT0)
1701 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1702 else if (ST0 == FT0)
1703 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1704 FORCE_RET();
1705}
1706
77f8dd5a
FB
1707/* XXX: handle nans */
1708void OPPROTO op_fucom_ST0_FT0(void)
1709{
1710 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1711 if (ST0 < FT0)
1712 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1713 else if (ST0 == FT0)
1714 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1715 FORCE_RET();
1716}
1717
d0a1ffc9
FB
1718/* XXX: handle nans */
1719void OPPROTO op_fcomi_ST0_FT0(void)
1720{
1721 int eflags;
1722 eflags = cc_table[CC_OP].compute_all();
1723 eflags &= ~(CC_Z | CC_P | CC_C);
1724 if (ST0 < FT0)
1725 eflags |= CC_C;
1726 else if (ST0 == FT0)
1727 eflags |= CC_Z;
1728 CC_SRC = eflags;
1729 FORCE_RET();
1730}
1731
1732/* XXX: handle nans */
1733void OPPROTO op_fucomi_ST0_FT0(void)
1734{
1735 int eflags;
1736 eflags = cc_table[CC_OP].compute_all();
1737 eflags &= ~(CC_Z | CC_P | CC_C);
1738 if (ST0 < FT0)
1739 eflags |= CC_C;
1740 else if (ST0 == FT0)
1741 eflags |= CC_Z;
1742 CC_SRC = eflags;
1743 FORCE_RET();
1744}
1745
927f621e
FB
1746void OPPROTO op_fadd_ST0_FT0(void)
1747{
1748 ST0 += FT0;
1749}
1750
1751void OPPROTO op_fmul_ST0_FT0(void)
1752{
1753 ST0 *= FT0;
1754}
1755
1756void OPPROTO op_fsub_ST0_FT0(void)
1757{
1758 ST0 -= FT0;
1759}
1760
1761void OPPROTO op_fsubr_ST0_FT0(void)
1762{
1763 ST0 = FT0 - ST0;
1764}
1765
1766void OPPROTO op_fdiv_ST0_FT0(void)
1767{
1768 ST0 /= FT0;
1769}
1770
1771void OPPROTO op_fdivr_ST0_FT0(void)
1772{
1773 ST0 = FT0 / ST0;
1774}
1775
1776/* fp operations between STN and ST0 */
1777
1778void OPPROTO op_fadd_STN_ST0(void)
1779{
1780 ST(PARAM1) += ST0;
1781}
1782
1783void OPPROTO op_fmul_STN_ST0(void)
1784{
1785 ST(PARAM1) *= ST0;
1786}
1787
1788void OPPROTO op_fsub_STN_ST0(void)
1789{
1790 ST(PARAM1) -= ST0;
1791}
1792
1793void OPPROTO op_fsubr_STN_ST0(void)
1794{
1795 CPU86_LDouble *p;
1796 p = &ST(PARAM1);
1797 *p = ST0 - *p;
1798}
1799
1800void OPPROTO op_fdiv_STN_ST0(void)
1801{
1802 ST(PARAM1) /= ST0;
1803}
1804
1805void OPPROTO op_fdivr_STN_ST0(void)
1806{
1807 CPU86_LDouble *p;
1808 p = &ST(PARAM1);
1809 *p = ST0 / *p;
1810}
1811
1812/* misc FPU operations */
1813void OPPROTO op_fchs_ST0(void)
1814{
1815 ST0 = -ST0;
1816}
1817
1818void OPPROTO op_fabs_ST0(void)
1819{
1820 ST0 = fabs(ST0);
1821}
1822
77f8dd5a
FB
1823void OPPROTO op_fxam_ST0(void)
1824{
1825 helper_fxam_ST0();
927f621e
FB
1826}
1827
1828void OPPROTO op_fld1_ST0(void)
1829{
87f4827e 1830 ST0 = f15rk[1];
927f621e
FB
1831}
1832
77f8dd5a 1833void OPPROTO op_fldl2t_ST0(void)
927f621e 1834{
87f4827e 1835 ST0 = f15rk[6];
927f621e
FB
1836}
1837
77f8dd5a 1838void OPPROTO op_fldl2e_ST0(void)
927f621e 1839{
87f4827e 1840 ST0 = f15rk[5];
927f621e
FB
1841}
1842
1843void OPPROTO op_fldpi_ST0(void)
1844{
87f4827e 1845 ST0 = f15rk[2];
927f621e
FB
1846}
1847
1848void OPPROTO op_fldlg2_ST0(void)
1849{
87f4827e 1850 ST0 = f15rk[3];
927f621e
FB
1851}
1852
1853void OPPROTO op_fldln2_ST0(void)
1854{
87f4827e 1855 ST0 = f15rk[4];
927f621e
FB
1856}
1857
1858void OPPROTO op_fldz_ST0(void)
1859{
87f4827e 1860 ST0 = f15rk[0];
927f621e
FB
1861}
1862
1863void OPPROTO op_fldz_FT0(void)
1864{
87f4827e 1865 ST0 = f15rk[0];
927f621e
FB
1866}
1867
927f621e
FB
1868/* associated heplers to reduce generated code length and to simplify
1869 relocation (FP constants are usually stored in .rodata section) */
1870
1871void OPPROTO op_f2xm1(void)
1872{
1873 helper_f2xm1();
1874}
1875
1876void OPPROTO op_fyl2x(void)
1877{
1878 helper_fyl2x();
1879}
1880
1881void OPPROTO op_fptan(void)
1882{
1883 helper_fptan();
1884}
1885
1886void OPPROTO op_fpatan(void)
1887{
1888 helper_fpatan();
1889}
1890
1891void OPPROTO op_fxtract(void)
1892{
1893 helper_fxtract();
1894}
1895
1896void OPPROTO op_fprem1(void)
1897{
1898 helper_fprem1();
1899}
1900
1901
1902void OPPROTO op_fprem(void)
1903{
1904 helper_fprem();
1905}
1906
1907void OPPROTO op_fyl2xp1(void)
1908{
1909 helper_fyl2xp1();
1910}
1911
1912void OPPROTO op_fsqrt(void)
1913{
1914 helper_fsqrt();
1915}
1916
1917void OPPROTO op_fsincos(void)
1918{
1919 helper_fsincos();
1920}
1921
1922void OPPROTO op_frndint(void)
1923{
1924 helper_frndint();
1925}
1926
1927void OPPROTO op_fscale(void)
1928{
1929 helper_fscale();
1930}
1931
1932void OPPROTO op_fsin(void)
1933{
1934 helper_fsin();
1935}
1936
1937void OPPROTO op_fcos(void)
1938{
1939 helper_fcos();
1940}
1941
4b74fe1f
FB
1942void OPPROTO op_fnstsw_A0(void)
1943{
1944 int fpus;
1945 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1946 stw((void *)A0, fpus);
1947}
1948
77f8dd5a
FB
1949void OPPROTO op_fnstsw_EAX(void)
1950{
1951 int fpus;
1952 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1953 EAX = (EAX & 0xffff0000) | fpus;
1954}
1955
4b74fe1f
FB
1956void OPPROTO op_fnstcw_A0(void)
1957{
1958 stw((void *)A0, env->fpuc);
1959}
1960
1961void OPPROTO op_fldcw_A0(void)
1962{
1963 int rnd_type;
1964 env->fpuc = lduw((void *)A0);
1965 /* set rounding mode */
1966 switch(env->fpuc & RC_MASK) {
1967 default:
1968 case RC_NEAR:
1969 rnd_type = FE_TONEAREST;
1970 break;
1971 case RC_DOWN:
1972 rnd_type = FE_DOWNWARD;
1973 break;
1974 case RC_UP:
1975 rnd_type = FE_UPWARD;
1976 break;
1977 case RC_CHOP:
1978 rnd_type = FE_TOWARDZERO;
1979 break;
1980 }
1981 fesetround(rnd_type);
1982}
1983
1a9353d2
FB
1984void OPPROTO op_fclex(void)
1985{
1986 env->fpus &= 0x7f00;
1987}
1988
1989void OPPROTO op_fninit(void)
1990{
1991 env->fpus = 0;
1992 env->fpstt = 0;
1993 env->fpuc = 0x37f;
1994 env->fptags[0] = 1;
1995 env->fptags[1] = 1;
1996 env->fptags[2] = 1;
1997 env->fptags[3] = 1;
1998 env->fptags[4] = 1;
1999 env->fptags[5] = 1;
2000 env->fptags[6] = 1;
2001 env->fptags[7] = 1;
2002}
1b6b029e 2003
d0a1ffc9
FB
2004void OPPROTO op_fnstenv_A0(void)
2005{
2006 helper_fstenv((uint8_t *)A0, PARAM1);
2007}
2008
2009void OPPROTO op_fldenv_A0(void)
2010{
2011 helper_fldenv((uint8_t *)A0, PARAM1);
2012}
2013
2014void OPPROTO op_fnsave_A0(void)
2015{
2016 helper_fsave((uint8_t *)A0, PARAM1);
2017}
2018
2019void OPPROTO op_frstor_A0(void)
2020{
2021 helper_frstor((uint8_t *)A0, PARAM1);
2022}
2023
1b6b029e
FB
2024/* threading support */
2025void OPPROTO op_lock(void)
2026{
2027 cpu_lock();
2028}
2029
2030void OPPROTO op_unlock(void)
2031{
2032 cpu_unlock();
2033}
3ec9c4fc 2034
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