projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| cea06682 LV |
1 | /* |
| 2 | * QEMU monitor for m68k | |
| 3 | * | |
| 4 | * This work is licensed under the terms of the GNU GPL, version 2 or | |
| 5 | * later. See the COPYING file in the top-level directory. | |
| 6 | */ | |
| 7 | ||
| 8 | #include "qemu/osdep.h" | |
| 9 | #include "cpu.h" | |
| 10 | #include "monitor/hmp-target.h" | |
| 2097dca6 LV |
11 | #include "monitor/monitor.h" |
| 12 | ||
| 13 | void hmp_info_tlb(Monitor *mon, const QDict *qdict) | |
| 14 | { | |
| 15 | CPUArchState *env1 = mon_get_cpu_env(); | |
| 16 | ||
| 17 | if (!env1) { | |
| 18 | monitor_printf(mon, "No CPU available\n"); | |
| 19 | return; | |
| 20 | } | |
| 21 | ||
| 22 | dump_mmu((FILE *)mon, (fprintf_function)monitor_printf, env1); | |
| 23 | } | |
| cea06682 LV |
24 | |
| 25 | static const MonitorDef monitor_defs[] = { | |
| 26 | { "d0", offsetof(CPUM68KState, dregs[0]) }, | |
| 27 | { "d1", offsetof(CPUM68KState, dregs[1]) }, | |
| 28 | { "d2", offsetof(CPUM68KState, dregs[2]) }, | |
| 29 | { "d3", offsetof(CPUM68KState, dregs[3]) }, | |
| 30 | { "d4", offsetof(CPUM68KState, dregs[4]) }, | |
| 31 | { "d5", offsetof(CPUM68KState, dregs[5]) }, | |
| 32 | { "d6", offsetof(CPUM68KState, dregs[6]) }, | |
| 33 | { "d7", offsetof(CPUM68KState, dregs[7]) }, | |
| 34 | { "a0", offsetof(CPUM68KState, aregs[0]) }, | |
| 35 | { "a1", offsetof(CPUM68KState, aregs[1]) }, | |
| 36 | { "a2", offsetof(CPUM68KState, aregs[2]) }, | |
| 37 | { "a3", offsetof(CPUM68KState, aregs[3]) }, | |
| 38 | { "a4", offsetof(CPUM68KState, aregs[4]) }, | |
| 39 | { "a5", offsetof(CPUM68KState, aregs[5]) }, | |
| 40 | { "a6", offsetof(CPUM68KState, aregs[6]) }, | |
| 41 | { "a7", offsetof(CPUM68KState, aregs[7]) }, | |
| 42 | { "pc", offsetof(CPUM68KState, pc) }, | |
| 43 | { "sr", offsetof(CPUM68KState, sr) }, | |
| 44 | { "ssp", offsetof(CPUM68KState, sp[0]) }, | |
| 45 | { "usp", offsetof(CPUM68KState, sp[1]) }, | |
| 6e22b28e | 46 | { "isp", offsetof(CPUM68KState, sp[2]) }, |
| 5fa9f1f2 LV |
47 | { "sfc", offsetof(CPUM68KState, sfc) }, |
| 48 | { "dfc", offsetof(CPUM68KState, dfc) }, | |
| 88b2fef6 LV |
49 | { "urp", offsetof(CPUM68KState, mmu.urp) }, |
| 50 | { "srp", offsetof(CPUM68KState, mmu.srp) }, | |
| c05c73b0 LV |
51 | { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]) }, |
| 52 | { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]) }, | |
| 53 | { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]) }, | |
| 54 | { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]) }, | |
| e55886c3 | 55 | { "mmusr", offsetof(CPUM68KState, mmu.mmusr) }, |
| cea06682 LV |
56 | { NULL }, |
| 57 | }; | |
| 58 | ||
| 59 | const MonitorDef *target_monitor_defs(void) | |
| 60 | { | |
| 61 | return monitor_defs; | |
| 62 | } |