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Commit | Line | Data |
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3285cf4f AP |
1 | /* |
2 | * Copyright (C) 2010 Citrix Ltd. | |
3 | * | |
4 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
5 | * the COPYING file in the top-level directory. | |
6 | * | |
6b620ca3 PB |
7 | * Contributions after 2012-01-13 are licensed under the terms of the |
8 | * GNU GPL, version 2 or (at your option) any later version. | |
3285cf4f AP |
9 | */ |
10 | ||
21cbfe5f | 11 | #include "qemu/osdep.h" |
9ce94e7c AS |
12 | #include <sys/mman.h> |
13 | ||
a2cb15b0 | 14 | #include "hw/pci/pci.h" |
0d09e41a PB |
15 | #include "hw/i386/pc.h" |
16 | #include "hw/xen/xen_common.h" | |
17 | #include "hw/xen/xen_backend.h" | |
39f42439 | 18 | #include "qmp-commands.h" |
3285cf4f | 19 | |
dccfcd0e | 20 | #include "sysemu/char.h" |
dced4d2f | 21 | #include "qemu/error-report.h" |
1de7afc9 | 22 | #include "qemu/range.h" |
9c17d615 | 23 | #include "sysemu/xen-mapcache.h" |
432d268c | 24 | #include "trace.h" |
022c62cb | 25 | #include "exec/address-spaces.h" |
432d268c | 26 | |
9ce94e7c AS |
27 | #include <xen/hvm/ioreq.h> |
28 | #include <xen/hvm/params.h> | |
8a369e20 | 29 | #include <xen/hvm/e820.h> |
9ce94e7c | 30 | |
04b0de0e | 31 | //#define DEBUG_XEN_HVM |
9ce94e7c | 32 | |
04b0de0e | 33 | #ifdef DEBUG_XEN_HVM |
9ce94e7c AS |
34 | #define DPRINTF(fmt, ...) \ |
35 | do { fprintf(stderr, "xen: " fmt, ## __VA_ARGS__); } while (0) | |
36 | #else | |
37 | #define DPRINTF(fmt, ...) \ | |
38 | do { } while (0) | |
39 | #endif | |
40 | ||
ce76b8a8 | 41 | static MemoryRegion ram_memory, ram_640k, ram_lo, ram_hi; |
c65adf9b | 42 | static MemoryRegion *framebuffer; |
39f42439 | 43 | static bool xen_in_migration; |
ce76b8a8 | 44 | |
9ce94e7c | 45 | /* Compatibility with older version */ |
37f9e258 DS |
46 | |
47 | /* This allows QEMU to build on a system that has Xen 4.5 or earlier | |
48 | * installed. This here (not in hw/xen/xen_common.h) because xen/hvm/ioreq.h | |
49 | * needs to be included before this block and hw/xen/xen_common.h needs to | |
50 | * be included before xen/hvm/ioreq.h | |
51 | */ | |
52 | #ifndef IOREQ_TYPE_VMWARE_PORT | |
53 | #define IOREQ_TYPE_VMWARE_PORT 3 | |
54 | struct vmware_regs { | |
55 | uint32_t esi; | |
56 | uint32_t edi; | |
57 | uint32_t ebx; | |
58 | uint32_t ecx; | |
59 | uint32_t edx; | |
60 | }; | |
61 | typedef struct vmware_regs vmware_regs_t; | |
62 | ||
63 | struct shared_vmport_iopage { | |
64 | struct vmware_regs vcpu_vmport_regs[1]; | |
65 | }; | |
66 | typedef struct shared_vmport_iopage shared_vmport_iopage_t; | |
67 | #endif | |
68 | ||
9ce94e7c AS |
69 | #if __XEN_LATEST_INTERFACE_VERSION__ < 0x0003020a |
70 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
71 | { | |
72 | return shared_page->vcpu_iodata[i].vp_eport; | |
73 | } | |
74 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
75 | { | |
76 | return &shared_page->vcpu_iodata[vcpu].vp_ioreq; | |
77 | } | |
78 | # define FMT_ioreq_size PRIx64 | |
79 | #else | |
80 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
81 | { | |
82 | return shared_page->vcpu_ioreq[i].vp_eport; | |
83 | } | |
84 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
85 | { | |
86 | return &shared_page->vcpu_ioreq[vcpu]; | |
87 | } | |
88 | # define FMT_ioreq_size "u" | |
89 | #endif | |
90 | ||
91 | #define BUFFER_IO_MAX_DELAY 100 | |
92 | ||
b4dd7802 | 93 | typedef struct XenPhysmap { |
a8170e5e | 94 | hwaddr start_addr; |
b4dd7802 | 95 | ram_addr_t size; |
dc6c4fe8 | 96 | const char *name; |
a8170e5e | 97 | hwaddr phys_offset; |
b4dd7802 AP |
98 | |
99 | QLIST_ENTRY(XenPhysmap) list; | |
100 | } XenPhysmap; | |
101 | ||
9ce94e7c | 102 | typedef struct XenIOState { |
3996e85c | 103 | ioservid_t ioservid; |
9ce94e7c | 104 | shared_iopage_t *shared_page; |
37f9e258 | 105 | shared_vmport_iopage_t *shared_vmport_page; |
9ce94e7c AS |
106 | buffered_iopage_t *buffered_io_page; |
107 | QEMUTimer *buffered_io_timer; | |
37f9e258 | 108 | CPUState **cpu_by_vcpu_id; |
9ce94e7c AS |
109 | /* the evtchn port for polling the notification, */ |
110 | evtchn_port_t *ioreq_local_port; | |
fda1f768 SS |
111 | /* evtchn local port for buffered io */ |
112 | evtchn_port_t bufioreq_local_port; | |
9ce94e7c | 113 | /* the evtchn fd for polling */ |
a2db2a1e | 114 | xenevtchn_handle *xce_handle; |
9ce94e7c AS |
115 | /* which vcpu we are serving */ |
116 | int send_vcpu; | |
117 | ||
29321335 | 118 | struct xs_handle *xenstore; |
20581d20 | 119 | MemoryListener memory_listener; |
3996e85c PD |
120 | MemoryListener io_listener; |
121 | DeviceListener device_listener; | |
b4dd7802 | 122 | QLIST_HEAD(, XenPhysmap) physmap; |
a8170e5e | 123 | hwaddr free_phys_offset; |
b4dd7802 | 124 | const XenPhysmap *log_for_dirtybit; |
29321335 | 125 | |
9ce94e7c | 126 | Notifier exit; |
da98c8eb | 127 | Notifier suspend; |
11addd0a | 128 | Notifier wakeup; |
9ce94e7c AS |
129 | } XenIOState; |
130 | ||
41445300 AP |
131 | /* Xen specific function for piix pci */ |
132 | ||
133 | int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) | |
134 | { | |
135 | return irq_num + ((pci_dev->devfn >> 3) << 2); | |
136 | } | |
137 | ||
138 | void xen_piix3_set_irq(void *opaque, int irq_num, int level) | |
139 | { | |
140 | xc_hvm_set_pci_intx_level(xen_xc, xen_domid, 0, 0, irq_num >> 2, | |
141 | irq_num & 3, level); | |
142 | } | |
143 | ||
144 | void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len) | |
145 | { | |
146 | int i; | |
147 | ||
148 | /* Scan for updates to PCI link routes (0x60-0x63). */ | |
149 | for (i = 0; i < len; i++) { | |
150 | uint8_t v = (val >> (8 * i)) & 0xff; | |
151 | if (v & 0x80) { | |
152 | v = 0; | |
153 | } | |
154 | v &= 0xf; | |
155 | if (((address + i) >= 0x60) && ((address + i) <= 0x63)) { | |
156 | xc_hvm_set_pci_link_route(xen_xc, xen_domid, address + i - 0x60, v); | |
157 | } | |
158 | } | |
159 | } | |
160 | ||
f1dbf015 WL |
161 | void xen_hvm_inject_msi(uint64_t addr, uint32_t data) |
162 | { | |
4c9f8d1b | 163 | xen_xc_hvm_inject_msi(xen_xc, xen_domid, addr, data); |
f1dbf015 WL |
164 | } |
165 | ||
da98c8eb | 166 | static void xen_suspend_notifier(Notifier *notifier, void *data) |
c9622478 | 167 | { |
da98c8eb | 168 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 3); |
c9622478 AP |
169 | } |
170 | ||
9c11a8ac AP |
171 | /* Xen Interrupt Controller */ |
172 | ||
173 | static void xen_set_irq(void *opaque, int irq, int level) | |
174 | { | |
175 | xc_hvm_set_isa_irq_level(xen_xc, xen_domid, irq, level); | |
176 | } | |
177 | ||
178 | qemu_irq *xen_interrupt_controller_init(void) | |
179 | { | |
180 | return qemu_allocate_irqs(xen_set_irq, NULL, 16); | |
181 | } | |
182 | ||
432d268c JN |
183 | /* Memory Ops */ |
184 | ||
91176e31 | 185 | static void xen_ram_init(PCMachineState *pcms, |
3c2a9669 | 186 | ram_addr_t ram_size, MemoryRegion **ram_memory_p) |
432d268c | 187 | { |
ce76b8a8 | 188 | MemoryRegion *sysmem = get_system_memory(); |
ce76b8a8 | 189 | ram_addr_t block_len; |
c4f5cdc5 DS |
190 | uint64_t user_lowmem = object_property_get_int(qdev_get_machine(), |
191 | PC_MACHINE_MAX_RAM_BELOW_4G, | |
192 | &error_abort); | |
432d268c | 193 | |
a9dd38db | 194 | /* Handle the machine opt max-ram-below-4g. It is basically doing |
c4f5cdc5 DS |
195 | * min(xen limit, user limit). |
196 | */ | |
197 | if (HVM_BELOW_4G_RAM_END <= user_lowmem) { | |
198 | user_lowmem = HVM_BELOW_4G_RAM_END; | |
8a369e20 | 199 | } |
432d268c | 200 | |
c4f5cdc5 | 201 | if (ram_size >= user_lowmem) { |
91176e31 EH |
202 | pcms->above_4g_mem_size = ram_size - user_lowmem; |
203 | pcms->below_4g_mem_size = user_lowmem; | |
432d268c | 204 | } else { |
91176e31 EH |
205 | pcms->above_4g_mem_size = 0; |
206 | pcms->below_4g_mem_size = ram_size; | |
432d268c | 207 | } |
91176e31 | 208 | if (!pcms->above_4g_mem_size) { |
c4f5cdc5 DS |
209 | block_len = ram_size; |
210 | } else { | |
211 | /* | |
212 | * Xen does not allocate the memory continuously, it keeps a | |
213 | * hole of the size computed above or passed in. | |
214 | */ | |
91176e31 | 215 | block_len = (1ULL << 32) + pcms->above_4g_mem_size; |
c4f5cdc5 | 216 | } |
49946538 | 217 | memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len, |
f8ed85ac | 218 | &error_fatal); |
c4f5cdc5 DS |
219 | *ram_memory_p = &ram_memory; |
220 | vmstate_register_ram_global(&ram_memory); | |
432d268c | 221 | |
2c9b15ca | 222 | memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k", |
ce76b8a8 AK |
223 | &ram_memory, 0, 0xa0000); |
224 | memory_region_add_subregion(sysmem, 0, &ram_640k); | |
8a369e20 AP |
225 | /* Skip of the VGA IO memory space, it will be registered later by the VGA |
226 | * emulated device. | |
227 | * | |
228 | * The area between 0xc0000 and 0x100000 will be used by SeaBIOS to load | |
229 | * the Options ROM, so it is registered here as RAM. | |
230 | */ | |
2c9b15ca | 231 | memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo", |
3c2a9669 | 232 | &ram_memory, 0xc0000, |
91176e31 | 233 | pcms->below_4g_mem_size - 0xc0000); |
ce76b8a8 | 234 | memory_region_add_subregion(sysmem, 0xc0000, &ram_lo); |
91176e31 | 235 | if (pcms->above_4g_mem_size > 0) { |
2c9b15ca | 236 | memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi", |
ce76b8a8 | 237 | &ram_memory, 0x100000000ULL, |
91176e31 | 238 | pcms->above_4g_mem_size); |
ce76b8a8 | 239 | memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi); |
432d268c | 240 | } |
432d268c JN |
241 | } |
242 | ||
37aa7a0e MA |
243 | void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, MemoryRegion *mr, |
244 | Error **errp) | |
432d268c JN |
245 | { |
246 | unsigned long nr_pfn; | |
247 | xen_pfn_t *pfn_list; | |
248 | int i; | |
249 | ||
c234572d AP |
250 | if (runstate_check(RUN_STATE_INMIGRATE)) { |
251 | /* RAM already populated in Xen */ | |
252 | fprintf(stderr, "%s: do not alloc "RAM_ADDR_FMT | |
253 | " bytes of ram at "RAM_ADDR_FMT" when runstate is INMIGRATE\n", | |
254 | __func__, size, ram_addr); | |
255 | return; | |
256 | } | |
257 | ||
ce76b8a8 AK |
258 | if (mr == &ram_memory) { |
259 | return; | |
260 | } | |
261 | ||
432d268c JN |
262 | trace_xen_ram_alloc(ram_addr, size); |
263 | ||
264 | nr_pfn = size >> TARGET_PAGE_BITS; | |
7267c094 | 265 | pfn_list = g_malloc(sizeof (*pfn_list) * nr_pfn); |
432d268c JN |
266 | |
267 | for (i = 0; i < nr_pfn; i++) { | |
268 | pfn_list[i] = (ram_addr >> TARGET_PAGE_BITS) + i; | |
269 | } | |
270 | ||
271 | if (xc_domain_populate_physmap_exact(xen_xc, xen_domid, nr_pfn, 0, 0, pfn_list)) { | |
37aa7a0e MA |
272 | error_setg(errp, "xen: failed to populate ram at " RAM_ADDR_FMT, |
273 | ram_addr); | |
432d268c JN |
274 | } |
275 | ||
7267c094 | 276 | g_free(pfn_list); |
432d268c JN |
277 | } |
278 | ||
b4dd7802 | 279 | static XenPhysmap *get_physmapping(XenIOState *state, |
a8170e5e | 280 | hwaddr start_addr, ram_addr_t size) |
b4dd7802 AP |
281 | { |
282 | XenPhysmap *physmap = NULL; | |
283 | ||
284 | start_addr &= TARGET_PAGE_MASK; | |
285 | ||
286 | QLIST_FOREACH(physmap, &state->physmap, list) { | |
287 | if (range_covers_byte(physmap->start_addr, physmap->size, start_addr)) { | |
288 | return physmap; | |
289 | } | |
290 | } | |
291 | return NULL; | |
292 | } | |
293 | ||
a8170e5e | 294 | static hwaddr xen_phys_offset_to_gaddr(hwaddr start_addr, |
cd1ba7de AP |
295 | ram_addr_t size, void *opaque) |
296 | { | |
a8170e5e | 297 | hwaddr addr = start_addr & TARGET_PAGE_MASK; |
cd1ba7de AP |
298 | XenIOState *xen_io_state = opaque; |
299 | XenPhysmap *physmap = NULL; | |
300 | ||
301 | QLIST_FOREACH(physmap, &xen_io_state->physmap, list) { | |
302 | if (range_covers_byte(physmap->phys_offset, physmap->size, addr)) { | |
303 | return physmap->start_addr; | |
304 | } | |
305 | } | |
306 | ||
307 | return start_addr; | |
308 | } | |
309 | ||
b4dd7802 AP |
310 | #if CONFIG_XEN_CTRL_INTERFACE_VERSION >= 340 |
311 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 312 | hwaddr start_addr, |
b4dd7802 | 313 | ram_addr_t size, |
20581d20 | 314 | MemoryRegion *mr, |
a8170e5e | 315 | hwaddr offset_within_region) |
b4dd7802 AP |
316 | { |
317 | unsigned long i = 0; | |
318 | int rc = 0; | |
319 | XenPhysmap *physmap = NULL; | |
a8170e5e AK |
320 | hwaddr pfn, start_gpfn; |
321 | hwaddr phys_offset = memory_region_get_ram_addr(mr); | |
d1814e08 | 322 | char path[80], value[17]; |
3e1f5086 | 323 | const char *mr_name; |
b4dd7802 AP |
324 | |
325 | if (get_physmapping(state, start_addr, size)) { | |
326 | return 0; | |
327 | } | |
328 | if (size <= 0) { | |
329 | return -1; | |
330 | } | |
331 | ||
ebed8505 SS |
332 | /* Xen can only handle a single dirty log region for now and we want |
333 | * the linear framebuffer to be that region. | |
334 | * Avoid tracking any regions that is not videoram and avoid tracking | |
335 | * the legacy vga region. */ | |
20581d20 AK |
336 | if (mr == framebuffer && start_addr > 0xbffff) { |
337 | goto go_physmap; | |
ebed8505 SS |
338 | } |
339 | return -1; | |
340 | ||
341 | go_physmap: | |
f1b8caf1 SE |
342 | DPRINTF("mapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx"\n", |
343 | start_addr, start_addr + size); | |
b4dd7802 AP |
344 | |
345 | pfn = phys_offset >> TARGET_PAGE_BITS; | |
346 | start_gpfn = start_addr >> TARGET_PAGE_BITS; | |
347 | for (i = 0; i < size >> TARGET_PAGE_BITS; i++) { | |
348 | unsigned long idx = pfn + i; | |
349 | xen_pfn_t gpfn = start_gpfn + i; | |
350 | ||
20a544c7 | 351 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
352 | if (rc) { |
353 | DPRINTF("add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 354 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
355 | return -rc; |
356 | } | |
357 | } | |
358 | ||
3e1f5086 PC |
359 | mr_name = memory_region_name(mr); |
360 | ||
7267c094 | 361 | physmap = g_malloc(sizeof (XenPhysmap)); |
b4dd7802 AP |
362 | |
363 | physmap->start_addr = start_addr; | |
364 | physmap->size = size; | |
3e1f5086 | 365 | physmap->name = mr_name; |
b4dd7802 AP |
366 | physmap->phys_offset = phys_offset; |
367 | ||
368 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
369 | ||
370 | xc_domain_pin_memory_cacheattr(xen_xc, xen_domid, | |
371 | start_addr >> TARGET_PAGE_BITS, | |
8b6bb0ad | 372 | (start_addr + size - 1) >> TARGET_PAGE_BITS, |
b4dd7802 | 373 | XEN_DOMCTL_MEM_CACHEATTR_WB); |
d1814e08 SS |
374 | |
375 | snprintf(path, sizeof(path), | |
376 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/start_addr", | |
377 | xen_domid, (uint64_t)phys_offset); | |
378 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)start_addr); | |
379 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
380 | return -1; | |
381 | } | |
382 | snprintf(path, sizeof(path), | |
383 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/size", | |
384 | xen_domid, (uint64_t)phys_offset); | |
385 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)size); | |
386 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
387 | return -1; | |
388 | } | |
3e1f5086 | 389 | if (mr_name) { |
d1814e08 SS |
390 | snprintf(path, sizeof(path), |
391 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/name", | |
392 | xen_domid, (uint64_t)phys_offset); | |
3e1f5086 | 393 | if (!xs_write(state->xenstore, 0, path, mr_name, strlen(mr_name))) { |
d1814e08 SS |
394 | return -1; |
395 | } | |
396 | } | |
397 | ||
b4dd7802 AP |
398 | return 0; |
399 | } | |
400 | ||
401 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 402 | hwaddr start_addr, |
b4dd7802 AP |
403 | ram_addr_t size) |
404 | { | |
405 | unsigned long i = 0; | |
406 | int rc = 0; | |
407 | XenPhysmap *physmap = NULL; | |
a8170e5e | 408 | hwaddr phys_offset = 0; |
b4dd7802 AP |
409 | |
410 | physmap = get_physmapping(state, start_addr, size); | |
411 | if (physmap == NULL) { | |
412 | return -1; | |
413 | } | |
414 | ||
415 | phys_offset = physmap->phys_offset; | |
416 | size = physmap->size; | |
417 | ||
d18e173a WL |
418 | DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at " |
419 | "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset); | |
b4dd7802 AP |
420 | |
421 | size >>= TARGET_PAGE_BITS; | |
422 | start_addr >>= TARGET_PAGE_BITS; | |
423 | phys_offset >>= TARGET_PAGE_BITS; | |
424 | for (i = 0; i < size; i++) { | |
643f5932 | 425 | xen_pfn_t idx = start_addr + i; |
b4dd7802 AP |
426 | xen_pfn_t gpfn = phys_offset + i; |
427 | ||
20a544c7 | 428 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
429 | if (rc) { |
430 | fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 431 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
432 | return -rc; |
433 | } | |
434 | } | |
435 | ||
436 | QLIST_REMOVE(physmap, list); | |
437 | if (state->log_for_dirtybit == physmap) { | |
438 | state->log_for_dirtybit = NULL; | |
439 | } | |
c5633d99 | 440 | g_free(physmap); |
b4dd7802 AP |
441 | |
442 | return 0; | |
443 | } | |
444 | ||
445 | #else | |
446 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 447 | hwaddr start_addr, |
b4dd7802 | 448 | ram_addr_t size, |
20581d20 | 449 | MemoryRegion *mr, |
a8170e5e | 450 | hwaddr offset_within_region) |
b4dd7802 AP |
451 | { |
452 | return -ENOSYS; | |
453 | } | |
454 | ||
455 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 456 | hwaddr start_addr, |
b4dd7802 AP |
457 | ram_addr_t size) |
458 | { | |
459 | return -ENOSYS; | |
460 | } | |
461 | #endif | |
462 | ||
20581d20 AK |
463 | static void xen_set_memory(struct MemoryListener *listener, |
464 | MemoryRegionSection *section, | |
465 | bool add) | |
b4dd7802 | 466 | { |
20581d20 | 467 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
a8170e5e | 468 | hwaddr start_addr = section->offset_within_address_space; |
052e87b0 | 469 | ram_addr_t size = int128_get64(section->size); |
2d1a35be | 470 | bool log_dirty = memory_region_is_logging(section->mr, DIRTY_MEMORY_VGA); |
b4dd7802 AP |
471 | hvmmem_type_t mem_type; |
472 | ||
3996e85c PD |
473 | if (section->mr == &ram_memory) { |
474 | return; | |
475 | } else { | |
476 | if (add) { | |
477 | xen_map_memory_section(xen_xc, xen_domid, state->ioservid, | |
478 | section); | |
479 | } else { | |
480 | xen_unmap_memory_section(xen_xc, xen_domid, state->ioservid, | |
481 | section); | |
482 | } | |
483 | } | |
484 | ||
20581d20 | 485 | if (!memory_region_is_ram(section->mr)) { |
b4dd7802 AP |
486 | return; |
487 | } | |
488 | ||
3996e85c | 489 | if (log_dirty != add) { |
20581d20 AK |
490 | return; |
491 | } | |
492 | ||
493 | trace_xen_client_set_memory(start_addr, size, log_dirty); | |
b4dd7802 AP |
494 | |
495 | start_addr &= TARGET_PAGE_MASK; | |
496 | size = TARGET_PAGE_ALIGN(size); | |
20581d20 AK |
497 | |
498 | if (add) { | |
499 | if (!memory_region_is_rom(section->mr)) { | |
500 | xen_add_to_physmap(state, start_addr, size, | |
501 | section->mr, section->offset_within_region); | |
502 | } else { | |
503 | mem_type = HVMMEM_ram_ro; | |
504 | if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, | |
505 | start_addr >> TARGET_PAGE_BITS, | |
506 | size >> TARGET_PAGE_BITS)) { | |
507 | DPRINTF("xc_hvm_set_mem_type error, addr: "TARGET_FMT_plx"\n", | |
508 | start_addr); | |
509 | } | |
b4dd7802 | 510 | } |
20581d20 | 511 | } else { |
b4dd7802 AP |
512 | if (xen_remove_from_physmap(state, start_addr, size) < 0) { |
513 | DPRINTF("physmapping does not exist at "TARGET_FMT_plx"\n", start_addr); | |
514 | } | |
b4dd7802 AP |
515 | } |
516 | } | |
517 | ||
20581d20 AK |
518 | static void xen_region_add(MemoryListener *listener, |
519 | MemoryRegionSection *section) | |
520 | { | |
dfde4e6e | 521 | memory_region_ref(section->mr); |
20581d20 AK |
522 | xen_set_memory(listener, section, true); |
523 | } | |
524 | ||
525 | static void xen_region_del(MemoryListener *listener, | |
526 | MemoryRegionSection *section) | |
527 | { | |
528 | xen_set_memory(listener, section, false); | |
dfde4e6e | 529 | memory_region_unref(section->mr); |
20581d20 AK |
530 | } |
531 | ||
3996e85c PD |
532 | static void xen_io_add(MemoryListener *listener, |
533 | MemoryRegionSection *section) | |
534 | { | |
535 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
536 | ||
537 | memory_region_ref(section->mr); | |
538 | ||
539 | xen_map_io_section(xen_xc, xen_domid, state->ioservid, section); | |
540 | } | |
541 | ||
542 | static void xen_io_del(MemoryListener *listener, | |
543 | MemoryRegionSection *section) | |
544 | { | |
545 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
546 | ||
547 | xen_unmap_io_section(xen_xc, xen_domid, state->ioservid, section); | |
548 | ||
549 | memory_region_unref(section->mr); | |
550 | } | |
551 | ||
552 | static void xen_device_realize(DeviceListener *listener, | |
553 | DeviceState *dev) | |
554 | { | |
555 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
556 | ||
557 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
558 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
559 | ||
560 | xen_map_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
561 | } | |
562 | } | |
563 | ||
564 | static void xen_device_unrealize(DeviceListener *listener, | |
565 | DeviceState *dev) | |
566 | { | |
567 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
568 | ||
569 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
570 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
571 | ||
572 | xen_unmap_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
573 | } | |
574 | } | |
575 | ||
b18620cf | 576 | static void xen_sync_dirty_bitmap(XenIOState *state, |
a8170e5e | 577 | hwaddr start_addr, |
b18620cf | 578 | ram_addr_t size) |
b4dd7802 | 579 | { |
a8170e5e | 580 | hwaddr npages = size >> TARGET_PAGE_BITS; |
b4dd7802 AP |
581 | const int width = sizeof(unsigned long) * 8; |
582 | unsigned long bitmap[(npages + width - 1) / width]; | |
583 | int rc, i, j; | |
584 | const XenPhysmap *physmap = NULL; | |
585 | ||
586 | physmap = get_physmapping(state, start_addr, size); | |
587 | if (physmap == NULL) { | |
588 | /* not handled */ | |
b18620cf | 589 | return; |
b4dd7802 AP |
590 | } |
591 | ||
592 | if (state->log_for_dirtybit == NULL) { | |
593 | state->log_for_dirtybit = physmap; | |
594 | } else if (state->log_for_dirtybit != physmap) { | |
b18620cf AP |
595 | /* Only one range for dirty bitmap can be tracked. */ |
596 | return; | |
b4dd7802 | 597 | } |
b4dd7802 AP |
598 | |
599 | rc = xc_hvm_track_dirty_vram(xen_xc, xen_domid, | |
600 | start_addr >> TARGET_PAGE_BITS, npages, | |
601 | bitmap); | |
b18620cf | 602 | if (rc < 0) { |
74bc4151 RPM |
603 | #ifndef ENODATA |
604 | #define ENODATA ENOENT | |
605 | #endif | |
606 | if (errno == ENODATA) { | |
8aba7dc0 AP |
607 | memory_region_set_dirty(framebuffer, 0, size); |
608 | DPRINTF("xen: track_dirty_vram failed (0x" TARGET_FMT_plx | |
b18620cf | 609 | ", 0x" TARGET_FMT_plx "): %s\n", |
74bc4151 | 610 | start_addr, start_addr + size, strerror(errno)); |
b18620cf AP |
611 | } |
612 | return; | |
b4dd7802 AP |
613 | } |
614 | ||
615 | for (i = 0; i < ARRAY_SIZE(bitmap); i++) { | |
616 | unsigned long map = bitmap[i]; | |
617 | while (map != 0) { | |
adf9d70b | 618 | j = ctzl(map); |
b4dd7802 | 619 | map &= ~(1ul << j); |
5a97065b | 620 | memory_region_set_dirty(framebuffer, |
fd4aa979 BS |
621 | (i * width + j) * TARGET_PAGE_SIZE, |
622 | TARGET_PAGE_SIZE); | |
b4dd7802 AP |
623 | }; |
624 | } | |
b4dd7802 AP |
625 | } |
626 | ||
20581d20 | 627 | static void xen_log_start(MemoryListener *listener, |
b2dfd71c PB |
628 | MemoryRegionSection *section, |
629 | int old, int new) | |
b4dd7802 | 630 | { |
20581d20 | 631 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 632 | |
b2dfd71c PB |
633 | if (new & ~old & (1 << DIRTY_MEMORY_VGA)) { |
634 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, | |
635 | int128_get64(section->size)); | |
636 | } | |
b4dd7802 AP |
637 | } |
638 | ||
b2dfd71c PB |
639 | static void xen_log_stop(MemoryListener *listener, MemoryRegionSection *section, |
640 | int old, int new) | |
b4dd7802 | 641 | { |
20581d20 | 642 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 643 | |
b2dfd71c PB |
644 | if (old & ~new & (1 << DIRTY_MEMORY_VGA)) { |
645 | state->log_for_dirtybit = NULL; | |
646 | /* Disable dirty bit tracking */ | |
647 | xc_hvm_track_dirty_vram(xen_xc, xen_domid, 0, 0, NULL); | |
648 | } | |
b4dd7802 AP |
649 | } |
650 | ||
20581d20 | 651 | static void xen_log_sync(MemoryListener *listener, MemoryRegionSection *section) |
b4dd7802 | 652 | { |
20581d20 | 653 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 654 | |
b18620cf | 655 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, |
052e87b0 | 656 | int128_get64(section->size)); |
b4dd7802 AP |
657 | } |
658 | ||
20581d20 AK |
659 | static void xen_log_global_start(MemoryListener *listener) |
660 | { | |
39f42439 AP |
661 | if (xen_enabled()) { |
662 | xen_in_migration = true; | |
663 | } | |
20581d20 AK |
664 | } |
665 | ||
666 | static void xen_log_global_stop(MemoryListener *listener) | |
b4dd7802 | 667 | { |
39f42439 | 668 | xen_in_migration = false; |
b4dd7802 AP |
669 | } |
670 | ||
20581d20 AK |
671 | static MemoryListener xen_memory_listener = { |
672 | .region_add = xen_region_add, | |
673 | .region_del = xen_region_del, | |
b4dd7802 AP |
674 | .log_start = xen_log_start, |
675 | .log_stop = xen_log_stop, | |
20581d20 AK |
676 | .log_sync = xen_log_sync, |
677 | .log_global_start = xen_log_global_start, | |
678 | .log_global_stop = xen_log_global_stop, | |
72e22d2f | 679 | .priority = 10, |
b4dd7802 | 680 | }; |
432d268c | 681 | |
3996e85c PD |
682 | static MemoryListener xen_io_listener = { |
683 | .region_add = xen_io_add, | |
684 | .region_del = xen_io_del, | |
685 | .priority = 10, | |
686 | }; | |
687 | ||
688 | static DeviceListener xen_device_listener = { | |
689 | .realize = xen_device_realize, | |
690 | .unrealize = xen_device_unrealize, | |
691 | }; | |
692 | ||
9ce94e7c AS |
693 | /* get the ioreq packets from share mem */ |
694 | static ioreq_t *cpu_get_ioreq_from_shared_memory(XenIOState *state, int vcpu) | |
695 | { | |
696 | ioreq_t *req = xen_vcpu_ioreq(state->shared_page, vcpu); | |
697 | ||
698 | if (req->state != STATE_IOREQ_READY) { | |
699 | DPRINTF("I/O request not ready: " | |
700 | "%x, ptr: %x, port: %"PRIx64", " | |
701 | "data: %"PRIx64", count: %" FMT_ioreq_size ", size: %" FMT_ioreq_size "\n", | |
702 | req->state, req->data_is_ptr, req->addr, | |
703 | req->data, req->count, req->size); | |
704 | return NULL; | |
705 | } | |
706 | ||
707 | xen_rmb(); /* see IOREQ_READY /then/ read contents of ioreq */ | |
708 | ||
709 | req->state = STATE_IOREQ_INPROCESS; | |
710 | return req; | |
711 | } | |
712 | ||
713 | /* use poll to get the port notification */ | |
714 | /* ioreq_vec--out,the */ | |
715 | /* retval--the number of ioreq packet */ | |
716 | static ioreq_t *cpu_get_ioreq(XenIOState *state) | |
717 | { | |
718 | int i; | |
719 | evtchn_port_t port; | |
720 | ||
a2db2a1e | 721 | port = xenevtchn_pending(state->xce_handle); |
fda1f768 | 722 | if (port == state->bufioreq_local_port) { |
bc72ad67 AB |
723 | timer_mod(state->buffered_io_timer, |
724 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 SS |
725 | return NULL; |
726 | } | |
727 | ||
9ce94e7c | 728 | if (port != -1) { |
1cd25a88 | 729 | for (i = 0; i < max_cpus; i++) { |
9ce94e7c AS |
730 | if (state->ioreq_local_port[i] == port) { |
731 | break; | |
732 | } | |
733 | } | |
734 | ||
1cd25a88 | 735 | if (i == max_cpus) { |
9ce94e7c AS |
736 | hw_error("Fatal error while trying to get io event!\n"); |
737 | } | |
738 | ||
739 | /* unmask the wanted port again */ | |
a2db2a1e | 740 | xenevtchn_unmask(state->xce_handle, port); |
9ce94e7c AS |
741 | |
742 | /* get the io packet from shared memory */ | |
743 | state->send_vcpu = i; | |
744 | return cpu_get_ioreq_from_shared_memory(state, i); | |
745 | } | |
746 | ||
747 | /* read error or read nothing */ | |
748 | return NULL; | |
749 | } | |
750 | ||
751 | static uint32_t do_inp(pio_addr_t addr, unsigned long size) | |
752 | { | |
753 | switch (size) { | |
754 | case 1: | |
755 | return cpu_inb(addr); | |
756 | case 2: | |
757 | return cpu_inw(addr); | |
758 | case 4: | |
759 | return cpu_inl(addr); | |
760 | default: | |
761 | hw_error("inp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
762 | } | |
763 | } | |
764 | ||
765 | static void do_outp(pio_addr_t addr, | |
766 | unsigned long size, uint32_t val) | |
767 | { | |
768 | switch (size) { | |
769 | case 1: | |
770 | return cpu_outb(addr, val); | |
771 | case 2: | |
772 | return cpu_outw(addr, val); | |
773 | case 4: | |
774 | return cpu_outl(addr, val); | |
775 | default: | |
776 | hw_error("outp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
777 | } | |
778 | } | |
779 | ||
a3864829 IJ |
780 | /* |
781 | * Helper functions which read/write an object from/to physical guest | |
782 | * memory, as part of the implementation of an ioreq. | |
783 | * | |
784 | * Equivalent to | |
785 | * cpu_physical_memory_rw(addr + (req->df ? -1 : +1) * req->size * i, | |
786 | * val, req->size, 0/1) | |
787 | * except without the integer overflow problems. | |
788 | */ | |
789 | static void rw_phys_req_item(hwaddr addr, | |
790 | ioreq_t *req, uint32_t i, void *val, int rw) | |
791 | { | |
792 | /* Do everything unsigned so overflow just results in a truncated result | |
793 | * and accesses to undesired parts of guest memory, which is up | |
794 | * to the guest */ | |
795 | hwaddr offset = (hwaddr)req->size * i; | |
796 | if (req->df) { | |
797 | addr -= offset; | |
798 | } else { | |
799 | addr += offset; | |
800 | } | |
801 | cpu_physical_memory_rw(addr, val, req->size, rw); | |
802 | } | |
803 | ||
804 | static inline void read_phys_req_item(hwaddr addr, | |
805 | ioreq_t *req, uint32_t i, void *val) | |
9ce94e7c | 806 | { |
a3864829 IJ |
807 | rw_phys_req_item(addr, req, i, val, 0); |
808 | } | |
809 | static inline void write_phys_req_item(hwaddr addr, | |
810 | ioreq_t *req, uint32_t i, void *val) | |
811 | { | |
812 | rw_phys_req_item(addr, req, i, val, 1); | |
813 | } | |
9ce94e7c | 814 | |
a3864829 IJ |
815 | |
816 | static void cpu_ioreq_pio(ioreq_t *req) | |
817 | { | |
249e7e0f | 818 | uint32_t i; |
9ce94e7c | 819 | |
eeb6b13a DS |
820 | trace_cpu_ioreq_pio(req, req->dir, req->df, req->data_is_ptr, req->addr, |
821 | req->data, req->count, req->size); | |
822 | ||
9ce94e7c AS |
823 | if (req->dir == IOREQ_READ) { |
824 | if (!req->data_is_ptr) { | |
825 | req->data = do_inp(req->addr, req->size); | |
eeb6b13a DS |
826 | trace_cpu_ioreq_pio_read_reg(req, req->data, req->addr, |
827 | req->size); | |
9ce94e7c AS |
828 | } else { |
829 | uint32_t tmp; | |
830 | ||
831 | for (i = 0; i < req->count; i++) { | |
832 | tmp = do_inp(req->addr, req->size); | |
a3864829 | 833 | write_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
834 | } |
835 | } | |
836 | } else if (req->dir == IOREQ_WRITE) { | |
837 | if (!req->data_is_ptr) { | |
eeb6b13a DS |
838 | trace_cpu_ioreq_pio_write_reg(req, req->data, req->addr, |
839 | req->size); | |
9ce94e7c AS |
840 | do_outp(req->addr, req->size, req->data); |
841 | } else { | |
842 | for (i = 0; i < req->count; i++) { | |
843 | uint32_t tmp = 0; | |
844 | ||
a3864829 | 845 | read_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
846 | do_outp(req->addr, req->size, tmp); |
847 | } | |
848 | } | |
849 | } | |
850 | } | |
851 | ||
852 | static void cpu_ioreq_move(ioreq_t *req) | |
853 | { | |
249e7e0f | 854 | uint32_t i; |
9ce94e7c | 855 | |
eeb6b13a DS |
856 | trace_cpu_ioreq_move(req, req->dir, req->df, req->data_is_ptr, req->addr, |
857 | req->data, req->count, req->size); | |
858 | ||
9ce94e7c AS |
859 | if (!req->data_is_ptr) { |
860 | if (req->dir == IOREQ_READ) { | |
861 | for (i = 0; i < req->count; i++) { | |
a3864829 | 862 | read_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
863 | } |
864 | } else if (req->dir == IOREQ_WRITE) { | |
865 | for (i = 0; i < req->count; i++) { | |
a3864829 | 866 | write_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
867 | } |
868 | } | |
869 | } else { | |
2b734340 | 870 | uint64_t tmp; |
9ce94e7c AS |
871 | |
872 | if (req->dir == IOREQ_READ) { | |
873 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
874 | read_phys_req_item(req->addr, req, i, &tmp); |
875 | write_phys_req_item(req->data, req, i, &tmp); | |
9ce94e7c AS |
876 | } |
877 | } else if (req->dir == IOREQ_WRITE) { | |
878 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
879 | read_phys_req_item(req->data, req, i, &tmp); |
880 | write_phys_req_item(req->addr, req, i, &tmp); | |
9ce94e7c AS |
881 | } |
882 | } | |
883 | } | |
884 | } | |
885 | ||
37f9e258 DS |
886 | static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t *req) |
887 | { | |
888 | X86CPU *cpu; | |
889 | CPUX86State *env; | |
890 | ||
891 | cpu = X86_CPU(current_cpu); | |
892 | env = &cpu->env; | |
893 | env->regs[R_EAX] = req->data; | |
894 | env->regs[R_EBX] = vmport_regs->ebx; | |
895 | env->regs[R_ECX] = vmport_regs->ecx; | |
896 | env->regs[R_EDX] = vmport_regs->edx; | |
897 | env->regs[R_ESI] = vmport_regs->esi; | |
898 | env->regs[R_EDI] = vmport_regs->edi; | |
899 | } | |
900 | ||
901 | static void regs_from_cpu(vmware_regs_t *vmport_regs) | |
902 | { | |
903 | X86CPU *cpu = X86_CPU(current_cpu); | |
904 | CPUX86State *env = &cpu->env; | |
905 | ||
906 | vmport_regs->ebx = env->regs[R_EBX]; | |
907 | vmport_regs->ecx = env->regs[R_ECX]; | |
908 | vmport_regs->edx = env->regs[R_EDX]; | |
909 | vmport_regs->esi = env->regs[R_ESI]; | |
910 | vmport_regs->edi = env->regs[R_EDI]; | |
911 | } | |
912 | ||
913 | static void handle_vmport_ioreq(XenIOState *state, ioreq_t *req) | |
914 | { | |
915 | vmware_regs_t *vmport_regs; | |
916 | ||
917 | assert(state->shared_vmport_page); | |
918 | vmport_regs = | |
919 | &state->shared_vmport_page->vcpu_vmport_regs[state->send_vcpu]; | |
920 | QEMU_BUILD_BUG_ON(sizeof(*req) < sizeof(*vmport_regs)); | |
921 | ||
922 | current_cpu = state->cpu_by_vcpu_id[state->send_vcpu]; | |
923 | regs_to_cpu(vmport_regs, req); | |
924 | cpu_ioreq_pio(req); | |
925 | regs_from_cpu(vmport_regs); | |
926 | current_cpu = NULL; | |
927 | } | |
928 | ||
929 | static void handle_ioreq(XenIOState *state, ioreq_t *req) | |
9ce94e7c | 930 | { |
eeb6b13a DS |
931 | trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr, |
932 | req->addr, req->data, req->count, req->size); | |
933 | ||
9ce94e7c AS |
934 | if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) && |
935 | (req->size < sizeof (target_ulong))) { | |
936 | req->data &= ((target_ulong) 1 << (8 * req->size)) - 1; | |
937 | } | |
938 | ||
eeb6b13a DS |
939 | if (req->dir == IOREQ_WRITE) |
940 | trace_handle_ioreq_write(req, req->type, req->df, req->data_is_ptr, | |
941 | req->addr, req->data, req->count, req->size); | |
942 | ||
9ce94e7c AS |
943 | switch (req->type) { |
944 | case IOREQ_TYPE_PIO: | |
945 | cpu_ioreq_pio(req); | |
946 | break; | |
947 | case IOREQ_TYPE_COPY: | |
948 | cpu_ioreq_move(req); | |
949 | break; | |
37f9e258 DS |
950 | case IOREQ_TYPE_VMWARE_PORT: |
951 | handle_vmport_ioreq(state, req); | |
952 | break; | |
9ce94e7c AS |
953 | case IOREQ_TYPE_TIMEOFFSET: |
954 | break; | |
955 | case IOREQ_TYPE_INVALIDATE: | |
e41d7c69 | 956 | xen_invalidate_map_cache(); |
9ce94e7c | 957 | break; |
3996e85c PD |
958 | case IOREQ_TYPE_PCI_CONFIG: { |
959 | uint32_t sbdf = req->addr >> 32; | |
960 | uint32_t val; | |
961 | ||
962 | /* Fake a write to port 0xCF8 so that | |
963 | * the config space access will target the | |
964 | * correct device model. | |
965 | */ | |
966 | val = (1u << 31) | | |
967 | ((req->addr & 0x0f00) << 16) | | |
968 | ((sbdf & 0xffff) << 8) | | |
969 | (req->addr & 0xfc); | |
970 | do_outp(0xcf8, 4, val); | |
971 | ||
972 | /* Now issue the config space access via | |
973 | * port 0xCFC | |
974 | */ | |
975 | req->addr = 0xcfc | (req->addr & 0x03); | |
976 | cpu_ioreq_pio(req); | |
977 | break; | |
978 | } | |
9ce94e7c AS |
979 | default: |
980 | hw_error("Invalid ioreq type 0x%x\n", req->type); | |
981 | } | |
eeb6b13a DS |
982 | if (req->dir == IOREQ_READ) { |
983 | trace_handle_ioreq_read(req, req->type, req->df, req->data_is_ptr, | |
984 | req->addr, req->data, req->count, req->size); | |
985 | } | |
9ce94e7c AS |
986 | } |
987 | ||
fda1f768 | 988 | static int handle_buffered_iopage(XenIOState *state) |
9ce94e7c | 989 | { |
d8b441a3 | 990 | buffered_iopage_t *buf_page = state->buffered_io_page; |
9ce94e7c AS |
991 | buf_ioreq_t *buf_req = NULL; |
992 | ioreq_t req; | |
993 | int qw; | |
994 | ||
d8b441a3 | 995 | if (!buf_page) { |
fda1f768 | 996 | return 0; |
9ce94e7c AS |
997 | } |
998 | ||
fda1f768 SS |
999 | memset(&req, 0x00, sizeof(req)); |
1000 | ||
d8b441a3 JB |
1001 | for (;;) { |
1002 | uint32_t rdptr = buf_page->read_pointer, wrptr; | |
1003 | ||
1004 | xen_rmb(); | |
1005 | wrptr = buf_page->write_pointer; | |
1006 | xen_rmb(); | |
1007 | if (rdptr != buf_page->read_pointer) { | |
1008 | continue; | |
1009 | } | |
1010 | if (rdptr == wrptr) { | |
1011 | break; | |
1012 | } | |
1013 | buf_req = &buf_page->buf_ioreq[rdptr % IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1014 | req.size = 1UL << buf_req->size; |
1015 | req.count = 1; | |
1016 | req.addr = buf_req->addr; | |
1017 | req.data = buf_req->data; | |
1018 | req.state = STATE_IOREQ_READY; | |
1019 | req.dir = buf_req->dir; | |
1020 | req.df = 1; | |
1021 | req.type = buf_req->type; | |
1022 | req.data_is_ptr = 0; | |
1023 | qw = (req.size == 8); | |
1024 | if (qw) { | |
d8b441a3 JB |
1025 | buf_req = &buf_page->buf_ioreq[(rdptr + 1) % |
1026 | IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1027 | req.data |= ((uint64_t)buf_req->data) << 32; |
1028 | } | |
1029 | ||
37f9e258 | 1030 | handle_ioreq(state, &req); |
9ce94e7c | 1031 | |
d8b441a3 | 1032 | atomic_add(&buf_page->read_pointer, qw + 1); |
9ce94e7c | 1033 | } |
fda1f768 SS |
1034 | |
1035 | return req.count; | |
9ce94e7c AS |
1036 | } |
1037 | ||
1038 | static void handle_buffered_io(void *opaque) | |
1039 | { | |
1040 | XenIOState *state = opaque; | |
1041 | ||
fda1f768 | 1042 | if (handle_buffered_iopage(state)) { |
bc72ad67 AB |
1043 | timer_mod(state->buffered_io_timer, |
1044 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 | 1045 | } else { |
bc72ad67 | 1046 | timer_del(state->buffered_io_timer); |
a2db2a1e | 1047 | xenevtchn_unmask(state->xce_handle, state->bufioreq_local_port); |
fda1f768 | 1048 | } |
9ce94e7c AS |
1049 | } |
1050 | ||
1051 | static void cpu_handle_ioreq(void *opaque) | |
1052 | { | |
1053 | XenIOState *state = opaque; | |
1054 | ioreq_t *req = cpu_get_ioreq(state); | |
1055 | ||
1056 | handle_buffered_iopage(state); | |
1057 | if (req) { | |
37f9e258 | 1058 | handle_ioreq(state, req); |
9ce94e7c AS |
1059 | |
1060 | if (req->state != STATE_IOREQ_INPROCESS) { | |
1061 | fprintf(stderr, "Badness in I/O request ... not in service?!: " | |
1062 | "%x, ptr: %x, port: %"PRIx64", " | |
37f9e258 DS |
1063 | "data: %"PRIx64", count: %" FMT_ioreq_size |
1064 | ", size: %" FMT_ioreq_size | |
1065 | ", type: %"FMT_ioreq_size"\n", | |
9ce94e7c | 1066 | req->state, req->data_is_ptr, req->addr, |
37f9e258 | 1067 | req->data, req->count, req->size, req->type); |
180640ea | 1068 | destroy_hvm_domain(false); |
9ce94e7c AS |
1069 | return; |
1070 | } | |
1071 | ||
1072 | xen_wmb(); /* Update ioreq contents /then/ update state. */ | |
1073 | ||
1074 | /* | |
1075 | * We do this before we send the response so that the tools | |
1076 | * have the opportunity to pick up on the reset before the | |
1077 | * guest resumes and does a hlt with interrupts disabled which | |
1078 | * causes Xen to powerdown the domain. | |
1079 | */ | |
1354869c | 1080 | if (runstate_is_running()) { |
9ce94e7c | 1081 | if (qemu_shutdown_requested_get()) { |
180640ea | 1082 | destroy_hvm_domain(false); |
9ce94e7c AS |
1083 | } |
1084 | if (qemu_reset_requested_get()) { | |
e063eb1f | 1085 | qemu_system_reset(VMRESET_REPORT); |
180640ea | 1086 | destroy_hvm_domain(true); |
9ce94e7c AS |
1087 | } |
1088 | } | |
1089 | ||
1090 | req->state = STATE_IORESP_READY; | |
a2db2a1e IC |
1091 | xenevtchn_notify(state->xce_handle, |
1092 | state->ioreq_local_port[state->send_vcpu]); | |
9ce94e7c AS |
1093 | } |
1094 | } | |
1095 | ||
1096 | static void xen_main_loop_prepare(XenIOState *state) | |
1097 | { | |
1098 | int evtchn_fd = -1; | |
1099 | ||
a2db2a1e IC |
1100 | if (state->xce_handle != NULL) { |
1101 | evtchn_fd = xenevtchn_fd(state->xce_handle); | |
9ce94e7c AS |
1102 | } |
1103 | ||
bc72ad67 | 1104 | state->buffered_io_timer = timer_new_ms(QEMU_CLOCK_REALTIME, handle_buffered_io, |
9ce94e7c | 1105 | state); |
9ce94e7c AS |
1106 | |
1107 | if (evtchn_fd != -1) { | |
37f9e258 DS |
1108 | CPUState *cpu_state; |
1109 | ||
1110 | DPRINTF("%s: Init cpu_by_vcpu_id\n", __func__); | |
1111 | CPU_FOREACH(cpu_state) { | |
1112 | DPRINTF("%s: cpu_by_vcpu_id[%d]=%p\n", | |
1113 | __func__, cpu_state->cpu_index, cpu_state); | |
1114 | state->cpu_by_vcpu_id[cpu_state->cpu_index] = cpu_state; | |
1115 | } | |
9ce94e7c AS |
1116 | qemu_set_fd_handler(evtchn_fd, cpu_handle_ioreq, NULL, state); |
1117 | } | |
1118 | } | |
1119 | ||
1120 | ||
1dfb4dd9 LC |
1121 | static void xen_hvm_change_state_handler(void *opaque, int running, |
1122 | RunState rstate) | |
9ce94e7c | 1123 | { |
3996e85c PD |
1124 | XenIOState *state = opaque; |
1125 | ||
9ce94e7c | 1126 | if (running) { |
3996e85c | 1127 | xen_main_loop_prepare(state); |
9ce94e7c | 1128 | } |
3996e85c PD |
1129 | |
1130 | xen_set_ioreq_server_state(xen_xc, xen_domid, | |
1131 | state->ioservid, | |
1132 | (rstate == RUN_STATE_RUNNING)); | |
9ce94e7c AS |
1133 | } |
1134 | ||
9e8dd451 | 1135 | static void xen_exit_notifier(Notifier *n, void *data) |
9ce94e7c AS |
1136 | { |
1137 | XenIOState *state = container_of(n, XenIOState, exit); | |
1138 | ||
a2db2a1e | 1139 | xenevtchn_close(state->xce_handle); |
29321335 | 1140 | xs_daemon_close(state->xenstore); |
9ce94e7c AS |
1141 | } |
1142 | ||
d1814e08 SS |
1143 | static void xen_read_physmap(XenIOState *state) |
1144 | { | |
1145 | XenPhysmap *physmap = NULL; | |
1146 | unsigned int len, num, i; | |
1147 | char path[80], *value = NULL; | |
1148 | char **entries = NULL; | |
1149 | ||
1150 | snprintf(path, sizeof(path), | |
1151 | "/local/domain/0/device-model/%d/physmap", xen_domid); | |
1152 | entries = xs_directory(state->xenstore, 0, path, &num); | |
1153 | if (entries == NULL) | |
1154 | return; | |
1155 | ||
1156 | for (i = 0; i < num; i++) { | |
1157 | physmap = g_malloc(sizeof (XenPhysmap)); | |
1158 | physmap->phys_offset = strtoull(entries[i], NULL, 16); | |
1159 | snprintf(path, sizeof(path), | |
1160 | "/local/domain/0/device-model/%d/physmap/%s/start_addr", | |
1161 | xen_domid, entries[i]); | |
1162 | value = xs_read(state->xenstore, 0, path, &len); | |
1163 | if (value == NULL) { | |
c5633d99 | 1164 | g_free(physmap); |
d1814e08 SS |
1165 | continue; |
1166 | } | |
1167 | physmap->start_addr = strtoull(value, NULL, 16); | |
1168 | free(value); | |
1169 | ||
1170 | snprintf(path, sizeof(path), | |
1171 | "/local/domain/0/device-model/%d/physmap/%s/size", | |
1172 | xen_domid, entries[i]); | |
1173 | value = xs_read(state->xenstore, 0, path, &len); | |
1174 | if (value == NULL) { | |
c5633d99 | 1175 | g_free(physmap); |
d1814e08 SS |
1176 | continue; |
1177 | } | |
1178 | physmap->size = strtoull(value, NULL, 16); | |
1179 | free(value); | |
1180 | ||
1181 | snprintf(path, sizeof(path), | |
1182 | "/local/domain/0/device-model/%d/physmap/%s/name", | |
1183 | xen_domid, entries[i]); | |
1184 | physmap->name = xs_read(state->xenstore, 0, path, &len); | |
1185 | ||
1186 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
1187 | } | |
1188 | free(entries); | |
d1814e08 SS |
1189 | } |
1190 | ||
11addd0a LJ |
1191 | static void xen_wakeup_notifier(Notifier *notifier, void *data) |
1192 | { | |
1193 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 0); | |
1194 | } | |
1195 | ||
dced4d2f | 1196 | void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory) |
29d3ccde | 1197 | { |
9ce94e7c | 1198 | int i, rc; |
3996e85c PD |
1199 | xen_pfn_t ioreq_pfn; |
1200 | xen_pfn_t bufioreq_pfn; | |
1201 | evtchn_port_t bufioreq_evtchn; | |
9ce94e7c AS |
1202 | XenIOState *state; |
1203 | ||
7267c094 | 1204 | state = g_malloc0(sizeof (XenIOState)); |
9ce94e7c | 1205 | |
a2db2a1e IC |
1206 | state->xce_handle = xenevtchn_open(NULL, 0); |
1207 | if (state->xce_handle == NULL) { | |
9ce94e7c | 1208 | perror("xen: event channel open"); |
dced4d2f | 1209 | goto err; |
9ce94e7c AS |
1210 | } |
1211 | ||
29321335 AP |
1212 | state->xenstore = xs_daemon_open(); |
1213 | if (state->xenstore == NULL) { | |
1214 | perror("xen: xenstore open"); | |
dced4d2f | 1215 | goto err; |
29321335 AP |
1216 | } |
1217 | ||
3996e85c PD |
1218 | rc = xen_create_ioreq_server(xen_xc, xen_domid, &state->ioservid); |
1219 | if (rc < 0) { | |
1220 | perror("xen: ioreq server create"); | |
dced4d2f | 1221 | goto err; |
3996e85c PD |
1222 | } |
1223 | ||
9ce94e7c AS |
1224 | state->exit.notify = xen_exit_notifier; |
1225 | qemu_add_exit_notifier(&state->exit); | |
1226 | ||
da98c8eb GH |
1227 | state->suspend.notify = xen_suspend_notifier; |
1228 | qemu_register_suspend_notifier(&state->suspend); | |
1229 | ||
11addd0a LJ |
1230 | state->wakeup.notify = xen_wakeup_notifier; |
1231 | qemu_register_wakeup_notifier(&state->wakeup); | |
1232 | ||
3996e85c PD |
1233 | rc = xen_get_ioreq_server_info(xen_xc, xen_domid, state->ioservid, |
1234 | &ioreq_pfn, &bufioreq_pfn, | |
1235 | &bufioreq_evtchn); | |
1236 | if (rc < 0) { | |
dced4d2f MA |
1237 | error_report("failed to get ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1238 | errno, xen_xc); | |
1239 | goto err; | |
3996e85c PD |
1240 | } |
1241 | ||
9ce94e7c | 1242 | DPRINTF("shared page at pfn %lx\n", ioreq_pfn); |
3996e85c PD |
1243 | DPRINTF("buffered io page at pfn %lx\n", bufioreq_pfn); |
1244 | DPRINTF("buffered io evtchn is %x\n", bufioreq_evtchn); | |
1245 | ||
e0cb42ae | 1246 | state->shared_page = xenforeignmemory_map(xen_fmem, xen_domid, |
9ed257d1 | 1247 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1248 | 1, &ioreq_pfn, NULL); |
9ce94e7c | 1249 | if (state->shared_page == NULL) { |
dced4d2f MA |
1250 | error_report("map shared IO page returned error %d handle=" XC_INTERFACE_FMT, |
1251 | errno, xen_xc); | |
1252 | goto err; | |
9ce94e7c AS |
1253 | } |
1254 | ||
37f9e258 DS |
1255 | rc = xen_get_vmport_regs_pfn(xen_xc, xen_domid, &ioreq_pfn); |
1256 | if (!rc) { | |
1257 | DPRINTF("shared vmport page at pfn %lx\n", ioreq_pfn); | |
1258 | state->shared_vmport_page = | |
e0cb42ae IC |
1259 | xenforeignmemory_map(xen_fmem, xen_domid, PROT_READ|PROT_WRITE, |
1260 | 1, &ioreq_pfn, NULL); | |
37f9e258 | 1261 | if (state->shared_vmport_page == NULL) { |
dced4d2f MA |
1262 | error_report("map shared vmport IO page returned error %d handle=" |
1263 | XC_INTERFACE_FMT, errno, xen_xc); | |
1264 | goto err; | |
37f9e258 DS |
1265 | } |
1266 | } else if (rc != -ENOSYS) { | |
dced4d2f MA |
1267 | error_report("get vmport regs pfn returned error %d, rc=%d", |
1268 | errno, rc); | |
1269 | goto err; | |
37f9e258 DS |
1270 | } |
1271 | ||
e0cb42ae | 1272 | state->buffered_io_page = xenforeignmemory_map(xen_fmem, xen_domid, |
3996e85c | 1273 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1274 | 1, &bufioreq_pfn, NULL); |
9ce94e7c | 1275 | if (state->buffered_io_page == NULL) { |
dced4d2f MA |
1276 | error_report("map buffered IO page returned error %d", errno); |
1277 | goto err; | |
9ce94e7c AS |
1278 | } |
1279 | ||
37f9e258 DS |
1280 | /* Note: cpus is empty at this point in init */ |
1281 | state->cpu_by_vcpu_id = g_malloc0(max_cpus * sizeof(CPUState *)); | |
1282 | ||
3996e85c PD |
1283 | rc = xen_set_ioreq_server_state(xen_xc, xen_domid, state->ioservid, true); |
1284 | if (rc < 0) { | |
dced4d2f MA |
1285 | error_report("failed to enable ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1286 | errno, xen_xc); | |
1287 | goto err; | |
3996e85c PD |
1288 | } |
1289 | ||
1cd25a88 | 1290 | state->ioreq_local_port = g_malloc0(max_cpus * sizeof (evtchn_port_t)); |
9ce94e7c AS |
1291 | |
1292 | /* FIXME: how about if we overflow the page here? */ | |
1cd25a88 | 1293 | for (i = 0; i < max_cpus; i++) { |
a2db2a1e | 1294 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
9ce94e7c AS |
1295 | xen_vcpu_eport(state->shared_page, i)); |
1296 | if (rc == -1) { | |
dced4d2f MA |
1297 | error_report("shared evtchn %d bind error %d", i, errno); |
1298 | goto err; | |
9ce94e7c AS |
1299 | } |
1300 | state->ioreq_local_port[i] = rc; | |
1301 | } | |
1302 | ||
a2db2a1e | 1303 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
3996e85c | 1304 | bufioreq_evtchn); |
fda1f768 | 1305 | if (rc == -1) { |
dced4d2f MA |
1306 | error_report("buffered evtchn bind error %d", errno); |
1307 | goto err; | |
fda1f768 SS |
1308 | } |
1309 | state->bufioreq_local_port = rc; | |
1310 | ||
432d268c | 1311 | /* Init RAM management */ |
cd1ba7de | 1312 | xen_map_cache_init(xen_phys_offset_to_gaddr, state); |
91176e31 | 1313 | xen_ram_init(pcms, ram_size, ram_memory); |
432d268c | 1314 | |
fb4bb2b5 | 1315 | qemu_add_vm_change_state_handler(xen_hvm_change_state_handler, state); |
9ce94e7c | 1316 | |
20581d20 | 1317 | state->memory_listener = xen_memory_listener; |
b4dd7802 | 1318 | QLIST_INIT(&state->physmap); |
f6790af6 | 1319 | memory_listener_register(&state->memory_listener, &address_space_memory); |
b4dd7802 AP |
1320 | state->log_for_dirtybit = NULL; |
1321 | ||
3996e85c PD |
1322 | state->io_listener = xen_io_listener; |
1323 | memory_listener_register(&state->io_listener, &address_space_io); | |
1324 | ||
1325 | state->device_listener = xen_device_listener; | |
1326 | device_listener_register(&state->device_listener); | |
1327 | ||
ad35a7da SS |
1328 | /* Initialize backend core & drivers */ |
1329 | if (xen_be_init() != 0) { | |
dced4d2f MA |
1330 | error_report("xen backend core setup failed"); |
1331 | goto err; | |
ad35a7da SS |
1332 | } |
1333 | xen_be_register("console", &xen_console_ops); | |
37cdfcf1 | 1334 | xen_be_register("vkbd", &xen_kbdmouse_ops); |
ad35a7da | 1335 | xen_be_register("qdisk", &xen_blkdev_ops); |
d1814e08 | 1336 | xen_read_physmap(state); |
dced4d2f | 1337 | return; |
ad35a7da | 1338 | |
dced4d2f MA |
1339 | err: |
1340 | error_report("xen hardware virtual machine initialisation failed"); | |
1341 | exit(1); | |
29d3ccde | 1342 | } |
9ce94e7c | 1343 | |
180640ea | 1344 | void destroy_hvm_domain(bool reboot) |
9ce94e7c AS |
1345 | { |
1346 | XenXC xc_handle; | |
1347 | int sts; | |
1348 | ||
1349 | xc_handle = xen_xc_interface_open(0, 0, 0); | |
1350 | if (xc_handle == XC_HANDLER_INITIAL_VALUE) { | |
1351 | fprintf(stderr, "Cannot acquire xenctrl handle\n"); | |
1352 | } else { | |
180640ea JB |
1353 | sts = xc_domain_shutdown(xc_handle, xen_domid, |
1354 | reboot ? SHUTDOWN_reboot : SHUTDOWN_poweroff); | |
9ce94e7c | 1355 | if (sts != 0) { |
180640ea JB |
1356 | fprintf(stderr, "xc_domain_shutdown failed to issue %s, " |
1357 | "sts %d, %s\n", reboot ? "reboot" : "poweroff", | |
1358 | sts, strerror(errno)); | |
9ce94e7c | 1359 | } else { |
180640ea JB |
1360 | fprintf(stderr, "Issued domain %d %s\n", xen_domid, |
1361 | reboot ? "reboot" : "poweroff"); | |
9ce94e7c AS |
1362 | } |
1363 | xc_interface_close(xc_handle); | |
1364 | } | |
1365 | } | |
c65adf9b AK |
1366 | |
1367 | void xen_register_framebuffer(MemoryRegion *mr) | |
1368 | { | |
1369 | framebuffer = mr; | |
1370 | } | |
eaab4d60 AK |
1371 | |
1372 | void xen_shutdown_fatal_error(const char *fmt, ...) | |
1373 | { | |
1374 | va_list ap; | |
1375 | ||
1376 | va_start(ap, fmt); | |
1377 | vfprintf(stderr, fmt, ap); | |
1378 | va_end(ap); | |
1379 | fprintf(stderr, "Will destroy the domain.\n"); | |
1380 | /* destroy the domain */ | |
1381 | qemu_system_shutdown_request(); | |
1382 | } | |
910b38e4 AP |
1383 | |
1384 | void xen_modified_memory(ram_addr_t start, ram_addr_t length) | |
1385 | { | |
1386 | if (unlikely(xen_in_migration)) { | |
1387 | int rc; | |
1388 | ram_addr_t start_pfn, nb_pages; | |
1389 | ||
1390 | if (length == 0) { | |
1391 | length = TARGET_PAGE_SIZE; | |
1392 | } | |
1393 | start_pfn = start >> TARGET_PAGE_BITS; | |
1394 | nb_pages = ((start + length + TARGET_PAGE_SIZE - 1) >> TARGET_PAGE_BITS) | |
1395 | - start_pfn; | |
1396 | rc = xc_hvm_modified_memory(xen_xc, xen_domid, start_pfn, nb_pages); | |
1397 | if (rc) { | |
1398 | fprintf(stderr, | |
1399 | "%s failed for "RAM_ADDR_FMT" ("RAM_ADDR_FMT"): %i, %s\n", | |
1400 | __func__, start, nb_pages, rc, strerror(-rc)); | |
1401 | } | |
1402 | } | |
1403 | } | |
04b0de0e WL |
1404 | |
1405 | void qmp_xen_set_global_dirty_log(bool enable, Error **errp) | |
1406 | { | |
1407 | if (enable) { | |
1408 | memory_global_dirty_log_start(); | |
1409 | } else { | |
1410 | memory_global_dirty_log_stop(); | |
1411 | } | |
1412 | } |