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4040ab72 DG |
1 | /* |
2 | * QEMU sPAPR VIO code | |
3 | * | |
4 | * Copyright (c) 2010 David Gibson, IBM Corporation <[email protected]> | |
5 | * Based on the s390 virtio bus code: | |
6 | * Copyright (c) 2009 Alexander Graf <[email protected]> | |
7 | * | |
8 | * This library is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU Lesser General Public | |
10 | * License as published by the Free Software Foundation; either | |
11 | * version 2 of the License, or (at your option) any later version. | |
12 | * | |
13 | * This library is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * Lesser General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU Lesser General Public | |
19 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #include "hw.h" | |
9c17d615 | 23 | #include "sysemu/sysemu.h" |
4040ab72 | 24 | #include "boards.h" |
83c9089e | 25 | #include "monitor/monitor.h" |
4040ab72 DG |
26 | #include "loader.h" |
27 | #include "elf.h" | |
28 | #include "hw/sysbus.h" | |
9c17d615 PB |
29 | #include "sysemu/kvm.h" |
30 | #include "sysemu/device_tree.h" | |
b45d63b6 | 31 | #include "kvm_ppc.h" |
4040ab72 DG |
32 | |
33 | #include "hw/spapr.h" | |
34 | #include "hw/spapr_vio.h" | |
277f9acf | 35 | #include "hw/xics.h" |
4040ab72 DG |
36 | |
37 | #ifdef CONFIG_FDT | |
38 | #include <libfdt.h> | |
39 | #endif /* CONFIG_FDT */ | |
40 | ||
41 | /* #define DEBUG_SPAPR */ | |
42 | ||
43 | #ifdef DEBUG_SPAPR | |
44 | #define dprintf(fmt, ...) \ | |
45 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) | |
46 | #else | |
47 | #define dprintf(fmt, ...) \ | |
48 | do { } while (0) | |
49 | #endif | |
50 | ||
3cb75a7c | 51 | static Property spapr_vio_props[] = { |
a307d594 | 52 | DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, irq, 0), \ |
3cb75a7c PB |
53 | DEFINE_PROP_END_OF_LIST(), |
54 | }; | |
55 | ||
0d936928 AL |
56 | static const TypeInfo spapr_vio_bus_info = { |
57 | .name = TYPE_SPAPR_VIO_BUS, | |
58 | .parent = TYPE_BUS, | |
59 | .instance_size = sizeof(VIOsPAPRBus), | |
4040ab72 DG |
60 | }; |
61 | ||
62 | VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg) | |
63 | { | |
0866aca1 | 64 | BusChild *kid; |
4040ab72 DG |
65 | VIOsPAPRDevice *dev = NULL; |
66 | ||
0866aca1 AL |
67 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
68 | dev = (VIOsPAPRDevice *)kid->child; | |
4040ab72 | 69 | if (dev->reg == reg) { |
5435352c | 70 | return dev; |
4040ab72 DG |
71 | } |
72 | } | |
73 | ||
5435352c | 74 | return NULL; |
4040ab72 DG |
75 | } |
76 | ||
1e34d859 ME |
77 | static char *vio_format_dev_name(VIOsPAPRDevice *dev) |
78 | { | |
3954d33a | 79 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
1e34d859 ME |
80 | char *name; |
81 | ||
82 | /* Device tree style name device@reg */ | |
4ecf8aa5 | 83 | name = g_strdup_printf("%s@%x", pc->dt_name, dev->reg); |
1e34d859 ME |
84 | |
85 | return name; | |
86 | } | |
87 | ||
4040ab72 DG |
88 | #ifdef CONFIG_FDT |
89 | static int vio_make_devnode(VIOsPAPRDevice *dev, | |
90 | void *fdt) | |
91 | { | |
3954d33a | 92 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
1e34d859 ME |
93 | int vdevice_off, node_off, ret; |
94 | char *dt_name; | |
4040ab72 DG |
95 | |
96 | vdevice_off = fdt_path_offset(fdt, "/vdevice"); | |
97 | if (vdevice_off < 0) { | |
98 | return vdevice_off; | |
99 | } | |
100 | ||
1e34d859 | 101 | dt_name = vio_format_dev_name(dev); |
1e34d859 | 102 | node_off = fdt_add_subnode(fdt, vdevice_off, dt_name); |
4ecf8aa5 | 103 | g_free(dt_name); |
4040ab72 DG |
104 | if (node_off < 0) { |
105 | return node_off; | |
106 | } | |
107 | ||
108 | ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg); | |
109 | if (ret < 0) { | |
110 | return ret; | |
111 | } | |
112 | ||
3954d33a | 113 | if (pc->dt_type) { |
4040ab72 | 114 | ret = fdt_setprop_string(fdt, node_off, "device_type", |
3954d33a | 115 | pc->dt_type); |
4040ab72 DG |
116 | if (ret < 0) { |
117 | return ret; | |
118 | } | |
119 | } | |
120 | ||
3954d33a | 121 | if (pc->dt_compatible) { |
4040ab72 | 122 | ret = fdt_setprop_string(fdt, node_off, "compatible", |
3954d33a | 123 | pc->dt_compatible); |
4040ab72 DG |
124 | if (ret < 0) { |
125 | return ret; | |
126 | } | |
127 | } | |
128 | ||
a307d594 AK |
129 | if (dev->irq) { |
130 | uint32_t ints_prop[] = {cpu_to_be32(dev->irq), 0}; | |
00dc738d DG |
131 | |
132 | ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop, | |
133 | sizeof(ints_prop)); | |
134 | if (ret < 0) { | |
135 | return ret; | |
136 | } | |
137 | } | |
138 | ||
5c4cbcf2 | 139 | ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->dma); |
ad0ebb91 DG |
140 | if (ret < 0) { |
141 | return ret; | |
ee86dfee DG |
142 | } |
143 | ||
3954d33a AL |
144 | if (pc->devnode) { |
145 | ret = (pc->devnode)(dev, fdt, node_off); | |
4040ab72 DG |
146 | if (ret < 0) { |
147 | return ret; | |
148 | } | |
149 | } | |
150 | ||
151 | return node_off; | |
152 | } | |
153 | #endif /* CONFIG_FDT */ | |
154 | ||
b45d63b6 BH |
155 | /* |
156 | * CRQ handling | |
157 | */ | |
b13ce26d | 158 | static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
b45d63b6 BH |
159 | target_ulong opcode, target_ulong *args) |
160 | { | |
161 | target_ulong reg = args[0]; | |
162 | target_ulong queue_addr = args[1]; | |
163 | target_ulong queue_len = args[2]; | |
164 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
165 | ||
166 | if (!dev) { | |
d9599c92 | 167 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
168 | return H_PARAMETER; |
169 | } | |
170 | ||
171 | /* We can't grok a queue size bigger than 256M for now */ | |
172 | if (queue_len < 0x1000 || queue_len > 0x10000000) { | |
d9599c92 DG |
173 | hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx |
174 | ")\n", queue_len); | |
b45d63b6 BH |
175 | return H_PARAMETER; |
176 | } | |
177 | ||
178 | /* Check queue alignment */ | |
179 | if (queue_addr & 0xfff) { | |
d9599c92 | 180 | hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr); |
b45d63b6 BH |
181 | return H_PARAMETER; |
182 | } | |
183 | ||
184 | /* Check if device supports CRQs */ | |
185 | if (!dev->crq.SendFunc) { | |
8e01f355 | 186 | hcall_dprintf("Device does not support CRQ\n"); |
b45d63b6 BH |
187 | return H_NOT_FOUND; |
188 | } | |
189 | ||
b45d63b6 BH |
190 | /* Already a queue ? */ |
191 | if (dev->crq.qsize) { | |
8e01f355 | 192 | hcall_dprintf("CRQ already registered\n"); |
b45d63b6 BH |
193 | return H_RESOURCE; |
194 | } | |
195 | dev->crq.qladdr = queue_addr; | |
196 | dev->crq.qsize = queue_len; | |
197 | dev->crq.qnext = 0; | |
198 | ||
199 | dprintf("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x" | |
200 | TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n", | |
201 | reg, queue_addr, queue_len); | |
202 | return H_SUCCESS; | |
203 | } | |
204 | ||
8e01f355 DG |
205 | static target_ulong free_crq(VIOsPAPRDevice *dev) |
206 | { | |
207 | dev->crq.qladdr = 0; | |
208 | dev->crq.qsize = 0; | |
209 | dev->crq.qnext = 0; | |
210 | ||
211 | dprintf("CRQ for dev 0x%" PRIx32 " freed\n", dev->reg); | |
212 | ||
213 | return H_SUCCESS; | |
214 | } | |
215 | ||
b13ce26d | 216 | static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
b45d63b6 BH |
217 | target_ulong opcode, target_ulong *args) |
218 | { | |
219 | target_ulong reg = args[0]; | |
220 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
221 | ||
222 | if (!dev) { | |
d9599c92 | 223 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
224 | return H_PARAMETER; |
225 | } | |
226 | ||
8e01f355 | 227 | return free_crq(dev); |
b45d63b6 BH |
228 | } |
229 | ||
b13ce26d | 230 | static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
b45d63b6 BH |
231 | target_ulong opcode, target_ulong *args) |
232 | { | |
233 | target_ulong reg = args[0]; | |
234 | target_ulong msg_hi = args[1]; | |
235 | target_ulong msg_lo = args[2]; | |
236 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
237 | uint64_t crq_mangle[2]; | |
238 | ||
239 | if (!dev) { | |
d9599c92 | 240 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
241 | return H_PARAMETER; |
242 | } | |
243 | crq_mangle[0] = cpu_to_be64(msg_hi); | |
244 | crq_mangle[1] = cpu_to_be64(msg_lo); | |
245 | ||
246 | if (dev->crq.SendFunc) { | |
247 | return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle); | |
248 | } | |
249 | ||
250 | return H_HARDWARE; | |
251 | } | |
252 | ||
b13ce26d | 253 | static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
b45d63b6 BH |
254 | target_ulong opcode, target_ulong *args) |
255 | { | |
256 | target_ulong reg = args[0]; | |
257 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
258 | ||
259 | if (!dev) { | |
d9599c92 | 260 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
261 | return H_PARAMETER; |
262 | } | |
263 | ||
264 | return 0; | |
265 | } | |
266 | ||
267 | /* Returns negative error, 0 success, or positive: queue full */ | |
268 | int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq) | |
269 | { | |
270 | int rc; | |
271 | uint8_t byte; | |
272 | ||
273 | if (!dev->crq.qsize) { | |
274 | fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n"); | |
275 | return -1; | |
276 | } | |
277 | ||
278 | /* Maybe do a fast path for KVM just writing to the pages */ | |
ad0ebb91 | 279 | rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1); |
b45d63b6 BH |
280 | if (rc) { |
281 | return rc; | |
282 | } | |
283 | if (byte != 0) { | |
284 | return 1; | |
285 | } | |
286 | ||
ad0ebb91 | 287 | rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8, |
b45d63b6 BH |
288 | &crq[8], 8); |
289 | if (rc) { | |
290 | return rc; | |
291 | } | |
292 | ||
293 | kvmppc_eieio(); | |
294 | ||
ad0ebb91 | 295 | rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8); |
b45d63b6 BH |
296 | if (rc) { |
297 | return rc; | |
298 | } | |
299 | ||
300 | dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize; | |
301 | ||
302 | if (dev->signal_state & 1) { | |
a307d594 | 303 | qemu_irq_pulse(spapr_vio_qirq(dev)); |
b45d63b6 BH |
304 | } |
305 | ||
306 | return 0; | |
307 | } | |
308 | ||
08942ac1 BH |
309 | /* "quiesce" handling */ |
310 | ||
311 | static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev) | |
312 | { | |
ad0ebb91 | 313 | if (dev->dma) { |
53724ee5 | 314 | spapr_tce_reset(dev->dma); |
08942ac1 | 315 | } |
4dd96f24 | 316 | free_crq(dev); |
08942ac1 BH |
317 | } |
318 | ||
319 | static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token, | |
320 | uint32_t nargs, target_ulong args, | |
321 | uint32_t nret, target_ulong rets) | |
322 | { | |
323 | VIOsPAPRBus *bus = spapr->vio_bus; | |
324 | VIOsPAPRDevice *dev; | |
325 | uint32_t unit, enable; | |
326 | ||
327 | if (nargs != 2) { | |
328 | rtas_st(rets, 0, -3); | |
329 | return; | |
330 | } | |
331 | unit = rtas_ld(args, 0); | |
332 | enable = rtas_ld(args, 1); | |
333 | dev = spapr_vio_find_by_reg(bus, unit); | |
334 | if (!dev) { | |
335 | rtas_st(rets, 0, -3); | |
336 | return; | |
337 | } | |
ad0ebb91 | 338 | |
53724ee5 DG |
339 | if (!dev->dma) { |
340 | rtas_st(rets, 0, -3); | |
341 | return; | |
08942ac1 BH |
342 | } |
343 | ||
53724ee5 DG |
344 | spapr_tce_set_bypass(dev->dma, !!enable); |
345 | ||
08942ac1 BH |
346 | rtas_st(rets, 0, 0); |
347 | } | |
348 | ||
349 | static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token, | |
350 | uint32_t nargs, target_ulong args, | |
351 | uint32_t nret, target_ulong rets) | |
352 | { | |
353 | VIOsPAPRBus *bus = spapr->vio_bus; | |
0866aca1 | 354 | BusChild *kid; |
08942ac1 BH |
355 | VIOsPAPRDevice *dev = NULL; |
356 | ||
357 | if (nargs != 0) { | |
358 | rtas_st(rets, 0, -3); | |
359 | return; | |
360 | } | |
361 | ||
0866aca1 AL |
362 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
363 | dev = (VIOsPAPRDevice *)kid->child; | |
08942ac1 BH |
364 | spapr_vio_quiesce_one(dev); |
365 | } | |
366 | ||
367 | rtas_st(rets, 0, 0); | |
368 | } | |
369 | ||
d601fac4 | 370 | static VIOsPAPRDevice *reg_conflict(VIOsPAPRDevice *dev) |
9fc380d3 | 371 | { |
d601fac4 | 372 | VIOsPAPRBus *bus = DO_UPCAST(VIOsPAPRBus, bus, dev->qdev.parent_bus); |
0866aca1 | 373 | BusChild *kid; |
d601fac4 | 374 | VIOsPAPRDevice *other; |
9fc380d3 ME |
375 | |
376 | /* | |
d601fac4 DG |
377 | * Check for a device other than the given one which is already |
378 | * using the requested address. We have to open code this because | |
379 | * the given dev might already be in the list. | |
9fc380d3 | 380 | */ |
0866aca1 AL |
381 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
382 | other = DO_UPCAST(VIOsPAPRDevice, qdev, kid->child); | |
9fc380d3 | 383 | |
d601fac4 DG |
384 | if (other != dev && other->reg == dev->reg) { |
385 | return other; | |
9fc380d3 ME |
386 | } |
387 | } | |
388 | ||
389 | return 0; | |
390 | } | |
391 | ||
b1c7f725 | 392 | static void spapr_vio_busdev_reset(DeviceState *qdev) |
8e01f355 | 393 | { |
b1c7f725 DG |
394 | VIOsPAPRDevice *dev = DO_UPCAST(VIOsPAPRDevice, qdev, qdev); |
395 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); | |
8e01f355 | 396 | |
4dd96f24 DG |
397 | /* Shut down the request queue and TCEs if necessary */ |
398 | spapr_vio_quiesce_one(dev); | |
399 | ||
400 | dev->signal_state = 0; | |
b1c7f725 DG |
401 | |
402 | if (pc->reset) { | |
403 | pc->reset(dev); | |
404 | } | |
8e01f355 DG |
405 | } |
406 | ||
d307af79 | 407 | static int spapr_vio_busdev_init(DeviceState *qdev) |
4040ab72 | 408 | { |
4040ab72 | 409 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev; |
3954d33a | 410 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
4040ab72 | 411 | char *id; |
9fc380d3 | 412 | |
d601fac4 DG |
413 | if (dev->reg != -1) { |
414 | /* | |
415 | * Explicitly assigned address, just verify that no-one else | |
416 | * is using it. other mechanism). We have to open code this | |
417 | * rather than using spapr_vio_find_by_reg() because sdev | |
418 | * itself is already in the list. | |
419 | */ | |
420 | VIOsPAPRDevice *other = reg_conflict(dev); | |
421 | ||
422 | if (other) { | |
423 | fprintf(stderr, "vio: %s and %s devices conflict at address %#x\n", | |
424 | object_get_typename(OBJECT(qdev)), | |
425 | object_get_typename(OBJECT(&other->qdev)), | |
426 | dev->reg); | |
427 | return -1; | |
428 | } | |
429 | } else { | |
430 | /* Need to assign an address */ | |
431 | VIOsPAPRBus *bus = DO_UPCAST(VIOsPAPRBus, bus, dev->qdev.parent_bus); | |
432 | ||
433 | do { | |
434 | dev->reg = bus->next_reg++; | |
435 | } while (reg_conflict(dev)); | |
9fc380d3 | 436 | } |
4040ab72 | 437 | |
1e34d859 ME |
438 | /* Don't overwrite ids assigned on the command line */ |
439 | if (!dev->qdev.id) { | |
440 | id = vio_format_dev_name(dev); | |
1e34d859 | 441 | dev->qdev.id = id; |
4040ab72 DG |
442 | } |
443 | ||
a307d594 AK |
444 | dev->irq = spapr_allocate_msi(dev->irq); |
445 | if (!dev->irq) { | |
e6c866d4 | 446 | return -1; |
416343b1 | 447 | } |
4040ab72 | 448 | |
53724ee5 DG |
449 | if (pc->rtce_window_size) { |
450 | uint32_t liobn = SPAPR_VIO_BASE_LIOBN | dev->reg; | |
451 | dev->dma = spapr_tce_new_dma_context(liobn, pc->rtce_window_size); | |
452 | } | |
ee86dfee | 453 | |
3954d33a | 454 | return pc->init(dev); |
4040ab72 DG |
455 | } |
456 | ||
b13ce26d | 457 | static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
00dc738d DG |
458 | target_ulong opcode, |
459 | target_ulong *args) | |
460 | { | |
461 | target_ulong reg = args[0]; | |
462 | target_ulong mode = args[1]; | |
463 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
3954d33a | 464 | VIOsPAPRDeviceClass *pc; |
00dc738d DG |
465 | |
466 | if (!dev) { | |
467 | return H_PARAMETER; | |
468 | } | |
469 | ||
3954d33a | 470 | pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
00dc738d | 471 | |
3954d33a | 472 | if (mode & ~pc->signal_mask) { |
00dc738d DG |
473 | return H_PARAMETER; |
474 | } | |
475 | ||
476 | dev->signal_state = mode; | |
477 | ||
478 | return H_SUCCESS; | |
479 | } | |
480 | ||
4040ab72 DG |
481 | VIOsPAPRBus *spapr_vio_bus_init(void) |
482 | { | |
483 | VIOsPAPRBus *bus; | |
484 | BusState *qbus; | |
485 | DeviceState *dev; | |
4040ab72 DG |
486 | |
487 | /* Create bridge device */ | |
488 | dev = qdev_create(NULL, "spapr-vio-bridge"); | |
489 | qdev_init_nofail(dev); | |
490 | ||
491 | /* Create bus on bridge device */ | |
492 | ||
0d936928 | 493 | qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); |
4040ab72 | 494 | bus = DO_UPCAST(VIOsPAPRBus, bus, qbus); |
1ea1ce8a | 495 | bus->next_reg = 0x71000000; |
4040ab72 | 496 | |
00dc738d DG |
497 | /* hcall-vio */ |
498 | spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); | |
499 | ||
b45d63b6 BH |
500 | /* hcall-crq */ |
501 | spapr_register_hypercall(H_REG_CRQ, h_reg_crq); | |
502 | spapr_register_hypercall(H_FREE_CRQ, h_free_crq); | |
503 | spapr_register_hypercall(H_SEND_CRQ, h_send_crq); | |
504 | spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); | |
505 | ||
08942ac1 BH |
506 | /* RTAS calls */ |
507 | spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass); | |
508 | spapr_rtas_register("quiesce", rtas_quiesce); | |
509 | ||
4040ab72 DG |
510 | return bus; |
511 | } | |
512 | ||
513 | /* Represents sPAPR hcall VIO devices */ | |
514 | ||
515 | static int spapr_vio_bridge_init(SysBusDevice *dev) | |
516 | { | |
517 | /* nothing */ | |
518 | return 0; | |
519 | } | |
520 | ||
999e12bb AL |
521 | static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data) |
522 | { | |
39bffca2 AL |
523 | DeviceClass *dc = DEVICE_CLASS(klass); |
524 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
999e12bb | 525 | |
39bffca2 AL |
526 | k->init = spapr_vio_bridge_init; |
527 | dc->no_user = 1; | |
999e12bb AL |
528 | } |
529 | ||
8c43a6f0 | 530 | static const TypeInfo spapr_vio_bridge_info = { |
39bffca2 AL |
531 | .name = "spapr-vio-bridge", |
532 | .parent = TYPE_SYS_BUS_DEVICE, | |
533 | .instance_size = sizeof(SysBusDevice), | |
534 | .class_init = spapr_vio_bridge_class_init, | |
4040ab72 DG |
535 | }; |
536 | ||
39bffca2 AL |
537 | static void vio_spapr_device_class_init(ObjectClass *klass, void *data) |
538 | { | |
539 | DeviceClass *k = DEVICE_CLASS(klass); | |
540 | k->init = spapr_vio_busdev_init; | |
b1c7f725 | 541 | k->reset = spapr_vio_busdev_reset; |
0d936928 | 542 | k->bus_type = TYPE_SPAPR_VIO_BUS; |
bce54474 | 543 | k->props = spapr_vio_props; |
39bffca2 AL |
544 | } |
545 | ||
8c43a6f0 | 546 | static const TypeInfo spapr_vio_type_info = { |
3954d33a AL |
547 | .name = TYPE_VIO_SPAPR_DEVICE, |
548 | .parent = TYPE_DEVICE, | |
549 | .instance_size = sizeof(VIOsPAPRDevice), | |
550 | .abstract = true, | |
551 | .class_size = sizeof(VIOsPAPRDeviceClass), | |
39bffca2 | 552 | .class_init = vio_spapr_device_class_init, |
3954d33a AL |
553 | }; |
554 | ||
83f7d43a | 555 | static void spapr_vio_register_types(void) |
4040ab72 | 556 | { |
0d936928 | 557 | type_register_static(&spapr_vio_bus_info); |
39bffca2 | 558 | type_register_static(&spapr_vio_bridge_info); |
3954d33a | 559 | type_register_static(&spapr_vio_type_info); |
4040ab72 DG |
560 | } |
561 | ||
83f7d43a | 562 | type_init(spapr_vio_register_types) |
4040ab72 DG |
563 | |
564 | #ifdef CONFIG_FDT | |
05c19438 DG |
565 | static int compare_reg(const void *p1, const void *p2) |
566 | { | |
567 | VIOsPAPRDevice const *dev1, *dev2; | |
568 | ||
569 | dev1 = (VIOsPAPRDevice *)*(DeviceState **)p1; | |
570 | dev2 = (VIOsPAPRDevice *)*(DeviceState **)p2; | |
571 | ||
572 | if (dev1->reg < dev2->reg) { | |
573 | return -1; | |
574 | } | |
575 | if (dev1->reg == dev2->reg) { | |
576 | return 0; | |
577 | } | |
578 | ||
579 | /* dev1->reg > dev2->reg */ | |
580 | return 1; | |
581 | } | |
582 | ||
4040ab72 DG |
583 | int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt) |
584 | { | |
05c19438 | 585 | DeviceState *qdev, **qdevs; |
0866aca1 | 586 | BusChild *kid; |
05c19438 | 587 | int i, num, ret = 0; |
4040ab72 | 588 | |
05c19438 DG |
589 | /* Count qdevs on the bus list */ |
590 | num = 0; | |
0866aca1 | 591 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
05c19438 DG |
592 | num++; |
593 | } | |
594 | ||
595 | /* Copy out into an array of pointers */ | |
596 | qdevs = g_malloc(sizeof(qdev) * num); | |
597 | num = 0; | |
0866aca1 AL |
598 | QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { |
599 | qdevs[num++] = kid->child; | |
05c19438 DG |
600 | } |
601 | ||
602 | /* Sort the array */ | |
603 | qsort(qdevs, num, sizeof(qdev), compare_reg); | |
604 | ||
605 | /* Hack alert. Give the devices to libfdt in reverse order, we happen | |
606 | * to know that will mean they are in forward order in the tree. */ | |
607 | for (i = num - 1; i >= 0; i--) { | |
608 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)(qdevs[i]); | |
4040ab72 DG |
609 | |
610 | ret = vio_make_devnode(dev, fdt); | |
611 | ||
612 | if (ret < 0) { | |
05c19438 | 613 | goto out; |
4040ab72 DG |
614 | } |
615 | } | |
616 | ||
05c19438 DG |
617 | ret = 0; |
618 | out: | |
619 | free(qdevs); | |
620 | ||
621 | return ret; | |
4040ab72 | 622 | } |
68f3a94c DG |
623 | |
624 | int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus) | |
625 | { | |
626 | VIOsPAPRDevice *dev; | |
627 | char *name, *path; | |
628 | int ret, offset; | |
629 | ||
630 | dev = spapr_vty_get_default(bus); | |
631 | if (!dev) | |
632 | return 0; | |
633 | ||
634 | offset = fdt_path_offset(fdt, "/chosen"); | |
635 | if (offset < 0) { | |
636 | return offset; | |
637 | } | |
638 | ||
639 | name = vio_format_dev_name(dev); | |
4ecf8aa5 | 640 | path = g_strdup_printf("/vdevice/%s", name); |
68f3a94c DG |
641 | |
642 | ret = fdt_setprop_string(fdt, offset, "linux,stdout-path", path); | |
4ecf8aa5 SW |
643 | |
644 | g_free(name); | |
645 | g_free(path); | |
68f3a94c DG |
646 | |
647 | return ret; | |
648 | } | |
4040ab72 | 649 | #endif /* CONFIG_FDT */ |