]>
Commit | Line | Data |
---|---|---|
40d14bef MA |
1 | /* |
2 | * PCI Expander Bridge Device Emulation | |
3 | * | |
4 | * Copyright (C) 2015 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <[email protected]> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
97d5408f | 13 | #include "qemu/osdep.h" |
86395eb3 | 14 | #include "qapi/error.h" |
40d14bef MA |
15 | #include "hw/pci/pci.h" |
16 | #include "hw/pci/pci_bus.h" | |
17 | #include "hw/pci/pci_host.h" | |
3cf0ecb3 | 18 | #include "hw/pci/pci_bridge.h" |
40d14bef MA |
19 | #include "hw/i386/pc.h" |
20 | #include "qemu/range.h" | |
21 | #include "qemu/error-report.h" | |
0e79e51a | 22 | #include "sysemu/numa.h" |
40d14bef MA |
23 | |
24 | #define TYPE_PXB_BUS "pxb-bus" | |
25 | #define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS) | |
26 | ||
02b07434 MA |
27 | #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" |
28 | #define PXB_PCIE_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_PCIE_BUS) | |
29 | ||
40d14bef MA |
30 | typedef struct PXBBus { |
31 | /*< private >*/ | |
32 | PCIBus parent_obj; | |
33 | /*< public >*/ | |
34 | ||
35 | char bus_path[8]; | |
36 | } PXBBus; | |
37 | ||
38 | #define TYPE_PXB_DEVICE "pxb" | |
39 | #define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE) | |
40 | ||
02b07434 MA |
41 | #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" |
42 | #define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE) | |
43 | ||
40d14bef MA |
44 | typedef struct PXBDev { |
45 | /*< private >*/ | |
46 | PCIDevice parent_obj; | |
47 | /*< public >*/ | |
48 | ||
49 | uint8_t bus_nr; | |
0e79e51a | 50 | uint16_t numa_node; |
40d14bef MA |
51 | } PXBDev; |
52 | ||
02b07434 MA |
53 | static PXBDev *convert_to_pxb(PCIDevice *dev) |
54 | { | |
55 | return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev); | |
56 | } | |
57 | ||
48ea3ded LE |
58 | static GList *pxb_dev_list; |
59 | ||
40d14bef MA |
60 | #define TYPE_PXB_HOST "pxb-host" |
61 | ||
62 | static int pxb_bus_num(PCIBus *bus) | |
63 | { | |
02b07434 | 64 | PXBDev *pxb = convert_to_pxb(bus->parent_dev); |
40d14bef MA |
65 | |
66 | return pxb->bus_nr; | |
67 | } | |
68 | ||
69 | static bool pxb_is_root(PCIBus *bus) | |
70 | { | |
71 | return true; /* by definition */ | |
72 | } | |
73 | ||
0e79e51a MA |
74 | static uint16_t pxb_bus_numa_node(PCIBus *bus) |
75 | { | |
02b07434 | 76 | PXBDev *pxb = convert_to_pxb(bus->parent_dev); |
0e79e51a MA |
77 | |
78 | return pxb->numa_node; | |
79 | } | |
80 | ||
40d14bef MA |
81 | static void pxb_bus_class_init(ObjectClass *class, void *data) |
82 | { | |
83 | PCIBusClass *pbc = PCI_BUS_CLASS(class); | |
84 | ||
85 | pbc->bus_num = pxb_bus_num; | |
86 | pbc->is_root = pxb_is_root; | |
0e79e51a | 87 | pbc->numa_node = pxb_bus_numa_node; |
40d14bef MA |
88 | } |
89 | ||
90 | static const TypeInfo pxb_bus_info = { | |
91 | .name = TYPE_PXB_BUS, | |
92 | .parent = TYPE_PCI_BUS, | |
93 | .instance_size = sizeof(PXBBus), | |
94 | .class_init = pxb_bus_class_init, | |
95 | }; | |
96 | ||
02b07434 MA |
97 | static const TypeInfo pxb_pcie_bus_info = { |
98 | .name = TYPE_PXB_PCIE_BUS, | |
99 | .parent = TYPE_PCIE_BUS, | |
100 | .instance_size = sizeof(PXBBus), | |
101 | .class_init = pxb_bus_class_init, | |
102 | }; | |
103 | ||
40d14bef MA |
104 | static const char *pxb_host_root_bus_path(PCIHostState *host_bridge, |
105 | PCIBus *rootbus) | |
106 | { | |
02b07434 MA |
107 | PXBBus *bus = pci_bus_is_express(rootbus) ? |
108 | PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus); | |
40d14bef MA |
109 | |
110 | snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus)); | |
111 | return bus->bus_path; | |
112 | } | |
113 | ||
48ea3ded LE |
114 | static char *pxb_host_ofw_unit_address(const SysBusDevice *dev) |
115 | { | |
116 | const PCIHostState *pxb_host; | |
117 | const PCIBus *pxb_bus; | |
118 | const PXBDev *pxb_dev; | |
119 | int position; | |
120 | const DeviceState *pxb_dev_base; | |
121 | const PCIHostState *main_host; | |
122 | const SysBusDevice *main_host_sbd; | |
123 | ||
124 | pxb_host = PCI_HOST_BRIDGE(dev); | |
125 | pxb_bus = pxb_host->bus; | |
02b07434 | 126 | pxb_dev = convert_to_pxb(pxb_bus->parent_dev); |
48ea3ded LE |
127 | position = g_list_index(pxb_dev_list, pxb_dev); |
128 | assert(position >= 0); | |
129 | ||
130 | pxb_dev_base = DEVICE(pxb_dev); | |
131 | main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent); | |
132 | main_host_sbd = SYS_BUS_DEVICE(main_host); | |
133 | ||
134 | if (main_host_sbd->num_mmio > 0) { | |
135 | return g_strdup_printf(TARGET_FMT_plx ",%x", | |
136 | main_host_sbd->mmio[0].addr, position + 1); | |
137 | } | |
138 | if (main_host_sbd->num_pio > 0) { | |
139 | return g_strdup_printf("i%04x,%x", | |
140 | main_host_sbd->pio[0], position + 1); | |
141 | } | |
142 | return NULL; | |
143 | } | |
144 | ||
40d14bef MA |
145 | static void pxb_host_class_init(ObjectClass *class, void *data) |
146 | { | |
147 | DeviceClass *dc = DEVICE_CLASS(class); | |
48ea3ded | 148 | SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class); |
40d14bef MA |
149 | PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class); |
150 | ||
151 | dc->fw_name = "pci"; | |
bf8d4924 MA |
152 | /* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */ |
153 | dc->cannot_instantiate_with_device_add_yet = true; | |
48ea3ded | 154 | sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address; |
40d14bef MA |
155 | hc->root_bus_path = pxb_host_root_bus_path; |
156 | } | |
157 | ||
158 | static const TypeInfo pxb_host_info = { | |
159 | .name = TYPE_PXB_HOST, | |
160 | .parent = TYPE_PCI_HOST_BRIDGE, | |
161 | .class_init = pxb_host_class_init, | |
162 | }; | |
163 | ||
164 | /* | |
86395eb3 | 165 | * Registers the PXB bus as a child of pci host root bus. |
40d14bef | 166 | */ |
86395eb3 | 167 | static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp) |
40d14bef MA |
168 | { |
169 | PCIBus *bus = dev->bus; | |
170 | int pxb_bus_num = pci_bus_num(pxb_bus); | |
171 | ||
172 | if (bus->parent_dev) { | |
86395eb3 WJ |
173 | error_setg(errp, "PXB devices can be attached only to root bus"); |
174 | return; | |
40d14bef MA |
175 | } |
176 | ||
177 | QLIST_FOREACH(bus, &bus->child, sibling) { | |
178 | if (pci_bus_num(bus) == pxb_bus_num) { | |
86395eb3 WJ |
179 | error_setg(errp, "Bus %d is already in use", pxb_bus_num); |
180 | return; | |
40d14bef MA |
181 | } |
182 | } | |
183 | QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling); | |
40d14bef MA |
184 | } |
185 | ||
0639b00d MA |
186 | static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) |
187 | { | |
188 | PCIDevice *pxb = pci_dev->bus->parent_dev; | |
189 | ||
190 | /* | |
191 | * The bios does not index the pxb slot number when | |
192 | * it computes the IRQ because it resides on bus 0 | |
193 | * and not on the current bus. | |
194 | * However QEMU routes the irq through bus 0 and adds | |
195 | * the pxb slot to the IRQ computation of the PXB | |
196 | * device. | |
197 | * | |
198 | * Synchronize between bios and QEMU by canceling | |
199 | * pxb's effect. | |
200 | */ | |
201 | return pin - PCI_SLOT(pxb->devfn); | |
202 | } | |
203 | ||
48ea3ded LE |
204 | static gint pxb_compare(gconstpointer a, gconstpointer b) |
205 | { | |
206 | const PXBDev *pxb_a = a, *pxb_b = b; | |
207 | ||
208 | return pxb_a->bus_nr < pxb_b->bus_nr ? -1 : | |
209 | pxb_a->bus_nr > pxb_b->bus_nr ? 1 : | |
210 | 0; | |
211 | } | |
212 | ||
86395eb3 | 213 | static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) |
40d14bef | 214 | { |
02b07434 MA |
215 | PXBDev *pxb = convert_to_pxb(dev); |
216 | DeviceState *ds, *bds = NULL; | |
40d14bef MA |
217 | PCIBus *bus; |
218 | const char *dev_name = NULL; | |
86395eb3 | 219 | Error *local_err = NULL; |
40d14bef | 220 | |
0e79e51a MA |
221 | if (pxb->numa_node != NUMA_NODE_UNASSIGNED && |
222 | pxb->numa_node >= nb_numa_nodes) { | |
86395eb3 WJ |
223 | error_setg(errp, "Illegal numa node %d", pxb->numa_node); |
224 | return; | |
0e79e51a MA |
225 | } |
226 | ||
40d14bef MA |
227 | if (dev->qdev.id && *dev->qdev.id) { |
228 | dev_name = dev->qdev.id; | |
229 | } | |
230 | ||
231 | ds = qdev_create(NULL, TYPE_PXB_HOST); | |
02b07434 MA |
232 | if (pcie) { |
233 | bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); | |
234 | } else { | |
235 | bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); | |
236 | bds = qdev_create(BUS(bus), "pci-bridge"); | |
237 | bds->id = dev_name; | |
238 | qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); | |
239 | qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); | |
240 | } | |
40d14bef MA |
241 | |
242 | bus->parent_dev = dev; | |
243 | bus->address_space_mem = dev->bus->address_space_mem; | |
244 | bus->address_space_io = dev->bus->address_space_io; | |
0639b00d | 245 | bus->map_irq = pxb_map_irq_fn; |
40d14bef | 246 | |
40d14bef MA |
247 | PCI_HOST_BRIDGE(ds)->bus = bus; |
248 | ||
86395eb3 WJ |
249 | pxb_register_bus(dev, bus, &local_err); |
250 | if (local_err) { | |
251 | error_propagate(errp, local_err); | |
2e4278b5 | 252 | goto err_register_bus; |
40d14bef MA |
253 | } |
254 | ||
255 | qdev_init_nofail(ds); | |
02b07434 MA |
256 | if (bds) { |
257 | qdev_init_nofail(bds); | |
258 | } | |
40d14bef MA |
259 | |
260 | pci_word_test_and_set_mask(dev->config + PCI_STATUS, | |
261 | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); | |
262 | pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST); | |
263 | ||
48ea3ded | 264 | pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare); |
86395eb3 | 265 | return; |
2e4278b5 WJ |
266 | |
267 | err_register_bus: | |
268 | object_unref(OBJECT(bds)); | |
269 | object_unparent(OBJECT(bus)); | |
270 | object_unref(OBJECT(ds)); | |
40d14bef MA |
271 | } |
272 | ||
86395eb3 | 273 | static void pxb_dev_realize(PCIDevice *dev, Error **errp) |
02b07434 MA |
274 | { |
275 | if (pci_bus_is_express(dev->bus)) { | |
86395eb3 WJ |
276 | error_setg(errp, "pxb devices cannot reside on a PCIe bus"); |
277 | return; | |
02b07434 MA |
278 | } |
279 | ||
86395eb3 | 280 | pxb_dev_realize_common(dev, false, errp); |
02b07434 MA |
281 | } |
282 | ||
48ea3ded LE |
283 | static void pxb_dev_exitfn(PCIDevice *pci_dev) |
284 | { | |
02b07434 | 285 | PXBDev *pxb = convert_to_pxb(pci_dev); |
48ea3ded LE |
286 | |
287 | pxb_dev_list = g_list_remove(pxb_dev_list, pxb); | |
288 | } | |
289 | ||
40d14bef | 290 | static Property pxb_dev_properties[] = { |
f9735fd5 | 291 | /* Note: 0 is not a legal PXB bus number. */ |
40d14bef | 292 | DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0), |
0e79e51a | 293 | DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED), |
40d14bef MA |
294 | DEFINE_PROP_END_OF_LIST(), |
295 | }; | |
296 | ||
297 | static void pxb_dev_class_init(ObjectClass *klass, void *data) | |
298 | { | |
299 | DeviceClass *dc = DEVICE_CLASS(klass); | |
300 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
301 | ||
86395eb3 | 302 | k->realize = pxb_dev_realize; |
48ea3ded | 303 | k->exit = pxb_dev_exitfn; |
40d14bef MA |
304 | k->vendor_id = PCI_VENDOR_ID_REDHAT; |
305 | k->device_id = PCI_DEVICE_ID_REDHAT_PXB; | |
306 | k->class_id = PCI_CLASS_BRIDGE_HOST; | |
307 | ||
308 | dc->desc = "PCI Expander Bridge"; | |
309 | dc->props = pxb_dev_properties; | |
7b346c74 | 310 | dc->hotpluggable = false; |
13d11b0b | 311 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
40d14bef MA |
312 | } |
313 | ||
314 | static const TypeInfo pxb_dev_info = { | |
315 | .name = TYPE_PXB_DEVICE, | |
316 | .parent = TYPE_PCI_DEVICE, | |
317 | .instance_size = sizeof(PXBDev), | |
318 | .class_init = pxb_dev_class_init, | |
319 | }; | |
320 | ||
86395eb3 | 321 | static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) |
02b07434 MA |
322 | { |
323 | if (!pci_bus_is_express(dev->bus)) { | |
86395eb3 WJ |
324 | error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus"); |
325 | return; | |
02b07434 MA |
326 | } |
327 | ||
86395eb3 | 328 | pxb_dev_realize_common(dev, true, errp); |
02b07434 MA |
329 | } |
330 | ||
331 | static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data) | |
332 | { | |
333 | DeviceClass *dc = DEVICE_CLASS(klass); | |
334 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
335 | ||
86395eb3 | 336 | k->realize = pxb_pcie_dev_realize; |
02b07434 MA |
337 | k->exit = pxb_dev_exitfn; |
338 | k->vendor_id = PCI_VENDOR_ID_REDHAT; | |
339 | k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE; | |
340 | k->class_id = PCI_CLASS_BRIDGE_HOST; | |
341 | ||
342 | dc->desc = "PCI Express Expander Bridge"; | |
343 | dc->props = pxb_dev_properties; | |
7b346c74 | 344 | dc->hotpluggable = false; |
13d11b0b | 345 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
02b07434 MA |
346 | } |
347 | ||
348 | static const TypeInfo pxb_pcie_dev_info = { | |
349 | .name = TYPE_PXB_PCIE_DEVICE, | |
350 | .parent = TYPE_PCI_DEVICE, | |
351 | .instance_size = sizeof(PXBDev), | |
352 | .class_init = pxb_pcie_dev_class_init, | |
353 | }; | |
354 | ||
40d14bef MA |
355 | static void pxb_register_types(void) |
356 | { | |
357 | type_register_static(&pxb_bus_info); | |
02b07434 | 358 | type_register_static(&pxb_pcie_bus_info); |
40d14bef MA |
359 | type_register_static(&pxb_host_info); |
360 | type_register_static(&pxb_dev_info); | |
02b07434 | 361 | type_register_static(&pxb_pcie_dev_info); |
40d14bef MA |
362 | } |
363 | ||
364 | type_init(pxb_register_types) |