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Commit | Line | Data |
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da9fcfa5 AT |
1 | /* |
2 | * QEMU Empty Slot | |
3 | * | |
4 | * The empty_slot device emulates known to a bus but not connected devices. | |
5 | * | |
6 | * Copyright (c) 2010 Artyom Tarasenko | |
7 | * | |
8 | * This code is licensed under the GNU GPL v2 or (at your option) any later | |
9 | * version. | |
10 | */ | |
11 | ||
83c9f4ca PB |
12 | #include "hw/hw.h" |
13 | #include "hw/sysbus.h" | |
14 | #include "hw/empty_slot.h" | |
da9fcfa5 AT |
15 | |
16 | //#define DEBUG_EMPTY_SLOT | |
17 | ||
18 | #ifdef DEBUG_EMPTY_SLOT | |
19 | #define DPRINTF(fmt, ...) \ | |
20 | do { printf("empty_slot: " fmt , ## __VA_ARGS__); } while (0) | |
21 | #else | |
22 | #define DPRINTF(fmt, ...) do {} while (0) | |
23 | #endif | |
24 | ||
8df81c4b AF |
25 | #define TYPE_EMPTY_SLOT "empty_slot" |
26 | #define EMPTY_SLOT(obj) OBJECT_CHECK(EmptySlot, (obj), TYPE_EMPTY_SLOT) | |
27 | ||
da9fcfa5 | 28 | typedef struct EmptySlot { |
8df81c4b AF |
29 | SysBusDevice parent_obj; |
30 | ||
b0a941b0 | 31 | MemoryRegion iomem; |
da9fcfa5 AT |
32 | uint64_t size; |
33 | } EmptySlot; | |
34 | ||
a8170e5e | 35 | static uint64_t empty_slot_read(void *opaque, hwaddr addr, |
b0a941b0 | 36 | unsigned size) |
da9fcfa5 AT |
37 | { |
38 | DPRINTF("read from " TARGET_FMT_plx "\n", addr); | |
39 | return 0; | |
40 | } | |
41 | ||
a8170e5e | 42 | static void empty_slot_write(void *opaque, hwaddr addr, |
b0a941b0 | 43 | uint64_t val, unsigned size) |
da9fcfa5 | 44 | { |
b0a941b0 | 45 | DPRINTF("write 0x%x to " TARGET_FMT_plx "\n", (unsigned)val, addr); |
da9fcfa5 AT |
46 | } |
47 | ||
b0a941b0 AK |
48 | static const MemoryRegionOps empty_slot_ops = { |
49 | .read = empty_slot_read, | |
50 | .write = empty_slot_write, | |
51 | .endianness = DEVICE_NATIVE_ENDIAN, | |
da9fcfa5 AT |
52 | }; |
53 | ||
a8170e5e | 54 | void empty_slot_init(hwaddr addr, uint64_t slot_size) |
da9fcfa5 | 55 | { |
1a00282a SW |
56 | if (slot_size > 0) { |
57 | /* Only empty slots larger than 0 byte need handling. */ | |
58 | DeviceState *dev; | |
59 | SysBusDevice *s; | |
60 | EmptySlot *e; | |
da9fcfa5 | 61 | |
8df81c4b | 62 | dev = qdev_create(NULL, TYPE_EMPTY_SLOT); |
1356b98d | 63 | s = SYS_BUS_DEVICE(dev); |
8df81c4b | 64 | e = EMPTY_SLOT(dev); |
1a00282a | 65 | e->size = slot_size; |
da9fcfa5 | 66 | |
1a00282a | 67 | qdev_init_nofail(dev); |
da9fcfa5 | 68 | |
1a00282a SW |
69 | sysbus_mmio_map(s, 0, addr); |
70 | } | |
da9fcfa5 AT |
71 | } |
72 | ||
73 | static int empty_slot_init1(SysBusDevice *dev) | |
74 | { | |
8df81c4b | 75 | EmptySlot *s = EMPTY_SLOT(dev); |
da9fcfa5 | 76 | |
300b1fc6 | 77 | memory_region_init_io(&s->iomem, OBJECT(s), &empty_slot_ops, s, |
b0a941b0 | 78 | "empty-slot", s->size); |
750ecd44 | 79 | sysbus_init_mmio(dev, &s->iomem); |
da9fcfa5 AT |
80 | return 0; |
81 | } | |
82 | ||
999e12bb AL |
83 | static void empty_slot_class_init(ObjectClass *klass, void *data) |
84 | { | |
85 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
86 | ||
87 | k->init = empty_slot_init1; | |
88 | } | |
89 | ||
8c43a6f0 | 90 | static const TypeInfo empty_slot_info = { |
8df81c4b | 91 | .name = TYPE_EMPTY_SLOT, |
39bffca2 AL |
92 | .parent = TYPE_SYS_BUS_DEVICE, |
93 | .instance_size = sizeof(EmptySlot), | |
94 | .class_init = empty_slot_class_init, | |
da9fcfa5 AT |
95 | }; |
96 | ||
83f7d43a | 97 | static void empty_slot_register_types(void) |
da9fcfa5 | 98 | { |
39bffca2 | 99 | type_register_static(&empty_slot_info); |
da9fcfa5 AT |
100 | } |
101 | ||
83f7d43a | 102 | type_init(empty_slot_register_types) |