]>
Commit | Line | Data |
---|---|---|
2c50e26e EI |
1 | /* |
2 | * Model of Xilinx Virtex5 ML507 PPC-440 refdesign. | |
3 | * | |
4 | * Copyright (c) 2010 Edgar E. Iglesias. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #include "sysbus.h" | |
26 | #include "hw.h" | |
27 | #include "pc.h" | |
28 | #include "net.h" | |
29 | #include "flash.h" | |
30 | #include "sysemu.h" | |
31 | #include "devices.h" | |
32 | #include "boards.h" | |
33 | #include "device_tree.h" | |
34 | #include "loader.h" | |
35 | #include "elf.h" | |
36 | #include "qemu-log.h" | |
39186d8a | 37 | #include "exec-memory.h" |
2c50e26e EI |
38 | |
39 | #include "ppc.h" | |
40 | #include "ppc4xx.h" | |
41 | #include "ppc440.h" | |
42 | #include "ppc405.h" | |
43 | ||
44 | #include "blockdev.h" | |
45 | #include "xilinx.h" | |
46 | ||
47 | #define EPAPR_MAGIC (0x45504150) | |
48 | #define FLASH_SIZE (16 * 1024 * 1024) | |
49 | ||
50 | static struct boot_info | |
51 | { | |
52 | uint32_t bootstrap_pc; | |
53 | uint32_t cmdline; | |
54 | uint32_t fdt; | |
55 | uint32_t ima_size; | |
56 | void *vfdt; | |
57 | } boot_info; | |
58 | ||
59 | /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ | |
60 | static void mmubooke_create_initial_mapping(CPUState *env, | |
61 | target_ulong va, | |
62 | target_phys_addr_t pa) | |
63 | { | |
1c53accc | 64 | ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; |
2c50e26e EI |
65 | |
66 | tlb->attr = 0; | |
67 | tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); | |
68 | tlb->size = 1 << 31; /* up to 0x80000000 */ | |
69 | tlb->EPN = va & TARGET_PAGE_MASK; | |
70 | tlb->RPN = pa & TARGET_PAGE_MASK; | |
71 | tlb->PID = 0; | |
72 | ||
1c53accc | 73 | tlb = &env->tlb.tlbe[1]; |
2c50e26e EI |
74 | tlb->attr = 0; |
75 | tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); | |
76 | tlb->size = 1 << 31; /* up to 0xffffffff */ | |
77 | tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; | |
78 | tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; | |
79 | tlb->PID = 0; | |
80 | } | |
81 | ||
82 | static CPUState *ppc440_init_xilinx(ram_addr_t *ram_size, | |
83 | int do_init, | |
84 | const char *cpu_model, | |
2c50e26e EI |
85 | uint32_t sysclk) |
86 | { | |
87 | CPUState *env; | |
2c50e26e EI |
88 | qemu_irq *irqs; |
89 | ||
90 | env = cpu_init(cpu_model); | |
91 | if (!env) { | |
92 | fprintf(stderr, "Unable to initialize CPU!\n"); | |
93 | exit(1); | |
94 | } | |
95 | ||
ddd1055b | 96 | ppc_booke_timers_init(env, sysclk, 0/* no flags */); |
2c50e26e EI |
97 | |
98 | ppc_dcr_init(env, NULL, NULL); | |
99 | ||
100 | /* interrupt controller */ | |
7267c094 | 101 | irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); |
2c50e26e EI |
102 | irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; |
103 | irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; | |
49a2942d | 104 | ppcuic_init(env, irqs, 0x0C0, 0, 1); |
2c50e26e EI |
105 | return env; |
106 | } | |
107 | ||
108 | static void main_cpu_reset(void *opaque) | |
109 | { | |
110 | CPUState *env = opaque; | |
111 | struct boot_info *bi = env->load_info; | |
112 | ||
113 | cpu_reset(env); | |
114 | /* Linux Kernel Parameters (passing device tree): | |
115 | * r3: pointer to the fdt | |
116 | * r4: 0 | |
117 | * r5: 0 | |
118 | * r6: epapr magic | |
119 | * r7: size of IMA in bytes | |
120 | * r8: 0 | |
121 | * r9: 0 | |
122 | */ | |
123 | env->gpr[1] = (16<<20) - 8; | |
124 | /* Provide a device-tree. */ | |
125 | env->gpr[3] = bi->fdt; | |
126 | env->nip = bi->bootstrap_pc; | |
127 | ||
128 | /* Create a mapping for the kernel. */ | |
129 | mmubooke_create_initial_mapping(env, 0, 0); | |
130 | env->gpr[6] = tswap32(EPAPR_MAGIC); | |
131 | env->gpr[7] = bi->ima_size; | |
132 | } | |
133 | ||
134 | #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb" | |
135 | static int xilinx_load_device_tree(target_phys_addr_t addr, | |
136 | uint32_t ramsize, | |
137 | target_phys_addr_t initrd_base, | |
138 | target_phys_addr_t initrd_size, | |
139 | const char *kernel_cmdline) | |
140 | { | |
141 | char *path; | |
142 | int fdt_size; | |
143 | #ifdef CONFIG_FDT | |
144 | void *fdt; | |
145 | int r; | |
146 | ||
147 | /* Try the local "ppc.dtb" override. */ | |
148 | fdt = load_device_tree("ppc.dtb", &fdt_size); | |
149 | if (!fdt) { | |
150 | path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); | |
151 | if (path) { | |
152 | fdt = load_device_tree(path, &fdt_size); | |
7267c094 | 153 | g_free(path); |
2c50e26e | 154 | } |
3b2e3dc9 | 155 | if (!fdt) { |
2c50e26e | 156 | return 0; |
3b2e3dc9 | 157 | } |
2c50e26e EI |
158 | } |
159 | ||
160 | r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); | |
161 | if (r < 0) | |
162 | fprintf(stderr, "couldn't set /chosen/bootargs\n"); | |
163 | cpu_physical_memory_write (addr, (void *)fdt, fdt_size); | |
164 | #else | |
165 | /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob | |
166 | to the kernel. */ | |
167 | fdt_size = load_image_targphys("ppc.dtb", addr, 0x10000); | |
168 | if (fdt_size < 0) { | |
169 | path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); | |
170 | if (path) { | |
171 | fdt_size = load_image_targphys(path, addr, 0x10000); | |
7267c094 | 172 | g_free(path); |
2c50e26e EI |
173 | } |
174 | } | |
175 | ||
176 | if (kernel_cmdline) { | |
177 | fprintf(stderr, | |
178 | "Warning: missing libfdt, cannot pass cmdline to kernel!\n"); | |
179 | } | |
180 | #endif | |
181 | return fdt_size; | |
182 | } | |
183 | ||
184 | static void virtex_init(ram_addr_t ram_size, | |
185 | const char *boot_device, | |
186 | const char *kernel_filename, | |
187 | const char *kernel_cmdline, | |
188 | const char *initrd_filename, const char *cpu_model) | |
189 | { | |
39186d8a | 190 | MemoryRegion *address_space_mem = get_system_memory(); |
2c50e26e EI |
191 | DeviceState *dev; |
192 | CPUState *env; | |
193 | target_phys_addr_t ram_base = 0; | |
194 | DriveInfo *dinfo; | |
333b13fc | 195 | MemoryRegion *phys_ram = g_new(MemoryRegion, 1); |
2c50e26e | 196 | qemu_irq irq[32], *cpu_irq; |
2c50e26e EI |
197 | int kernel_size; |
198 | int i; | |
199 | ||
200 | /* init CPUs */ | |
201 | if (cpu_model == NULL) { | |
202 | cpu_model = "440-Xilinx"; | |
203 | } | |
204 | ||
ddd1055b | 205 | env = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000); |
2c50e26e EI |
206 | qemu_register_reset(main_cpu_reset, env); |
207 | ||
c5705a77 AK |
208 | memory_region_init_ram(phys_ram, "ram", ram_size); |
209 | vmstate_register_ram_global(phys_ram); | |
333b13fc | 210 | memory_region_add_subregion(address_space_mem, ram_base, phys_ram); |
2c50e26e | 211 | |
2c50e26e | 212 | dinfo = drive_get(IF_PFLASH, 0, 0); |
cfe5f011 | 213 | pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE, |
2c50e26e EI |
214 | dinfo ? dinfo->bdrv : NULL, (64 * 1024), |
215 | FLASH_SIZE >> 16, | |
01e0451a | 216 | 1, 0x89, 0x18, 0x0000, 0x0, 1); |
2c50e26e EI |
217 | |
218 | cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; | |
219 | dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0); | |
220 | for (i = 0; i < 32; i++) { | |
221 | irq[i] = qdev_get_gpio_in(dev, i); | |
222 | } | |
223 | ||
39186d8a RH |
224 | serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200, |
225 | serial_hds[0], DEVICE_LITTLE_ENDIAN); | |
2c50e26e EI |
226 | |
227 | /* 2 timers at irq 2 @ 62 Mhz. */ | |
228 | xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000); | |
229 | ||
230 | if (kernel_filename) { | |
231 | uint64_t entry, low, high; | |
2c50e26e EI |
232 | target_phys_addr_t boot_offset; |
233 | ||
234 | /* Boots a kernel elf binary. */ | |
235 | kernel_size = load_elf(kernel_filename, NULL, NULL, | |
236 | &entry, &low, &high, 1, ELF_MACHINE, 0); | |
2c50e26e EI |
237 | boot_info.bootstrap_pc = entry & 0x00ffffff; |
238 | ||
239 | if (kernel_size < 0) { | |
240 | boot_offset = 0x1200000; | |
241 | /* If we failed loading ELF's try a raw image. */ | |
242 | kernel_size = load_image_targphys(kernel_filename, | |
243 | boot_offset, | |
244 | ram_size); | |
245 | boot_info.bootstrap_pc = boot_offset; | |
246 | high = boot_info.bootstrap_pc + kernel_size + 8192; | |
247 | } | |
248 | ||
249 | boot_info.ima_size = kernel_size; | |
250 | ||
251 | /* Provide a device-tree. */ | |
252 | boot_info.fdt = high + (8192 * 2); | |
253 | boot_info.fdt &= ~8191; | |
254 | xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline); | |
255 | } | |
256 | env->load_info = &boot_info; | |
257 | } | |
258 | ||
259 | static QEMUMachine virtex_machine = { | |
260 | .name = "virtex-ml507", | |
261 | .desc = "Xilinx Virtex ML507 reference design", | |
262 | .init = virtex_init, | |
263 | }; | |
264 | ||
265 | static void virtex_machine_init(void) | |
266 | { | |
267 | qemu_register_machine(&virtex_machine); | |
268 | } | |
269 | ||
270 | machine_init(virtex_machine_init); |