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Commit | Line | Data |
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dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
1590bbcb | 4 | * Copyright (c) 2012-2014 SUSE LINUX Products GmbH |
dd83b06a AF |
5 | * |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | ||
1ef26b1f | 21 | #include "qemu/osdep.h" |
da34e65c | 22 | #include "qapi/error.h" |
dd83b06a | 23 | #include "qemu-common.h" |
878096ee | 24 | #include "qom/cpu.h" |
13eed94e | 25 | #include "sysemu/kvm.h" |
066e9b27 | 26 | #include "qemu/notify.h" |
91b1df8c | 27 | #include "qemu/log.h" |
508127e2 | 28 | #include "exec/log.h" |
9262685b | 29 | #include "qemu/error-report.h" |
066e9b27 | 30 | #include "sysemu/sysemu.h" |
62a48a2a | 31 | #include "hw/qdev-properties.h" |
2cc2d082 | 32 | #include "trace.h" |
066e9b27 | 33 | |
69e5ff06 IM |
34 | bool cpu_exists(int64_t id) |
35 | { | |
38fcbd3f AF |
36 | CPUState *cpu; |
37 | ||
38 | CPU_FOREACH(cpu) { | |
39 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
69e5ff06 | 40 | |
38fcbd3f AF |
41 | if (cc->get_arch_id(cpu) == id) { |
42 | return true; | |
43 | } | |
44 | } | |
45 | return false; | |
69e5ff06 IM |
46 | } |
47 | ||
9262685b AF |
48 | CPUState *cpu_generic_init(const char *typename, const char *cpu_model) |
49 | { | |
50 | char *str, *name, *featurestr; | |
62a48a2a | 51 | CPUState *cpu = NULL; |
9262685b AF |
52 | ObjectClass *oc; |
53 | CPUClass *cc; | |
54 | Error *err = NULL; | |
55 | ||
56 | str = g_strdup(cpu_model); | |
57 | name = strtok(str, ","); | |
58 | ||
59 | oc = cpu_class_by_name(typename, name); | |
60 | if (oc == NULL) { | |
61 | g_free(str); | |
62 | return NULL; | |
63 | } | |
64 | ||
62a48a2a | 65 | cc = CPU_CLASS(oc); |
9262685b | 66 | featurestr = strtok(NULL, ","); |
62a48a2a IM |
67 | /* TODO: all callers of cpu_generic_init() need to be converted to |
68 | * call parse_features() only once, before calling cpu_generic_init(). | |
69 | */ | |
70 | cc->parse_features(object_class_get_name(oc), featurestr, &err); | |
9262685b AF |
71 | g_free(str); |
72 | if (err != NULL) { | |
73 | goto out; | |
74 | } | |
75 | ||
62a48a2a | 76 | cpu = CPU(object_new(object_class_get_name(oc))); |
9262685b AF |
77 | object_property_set_bool(OBJECT(cpu), true, "realized", &err); |
78 | ||
79 | out: | |
80 | if (err != NULL) { | |
565f65d2 | 81 | error_report_err(err); |
9262685b AF |
82 | object_unref(OBJECT(cpu)); |
83 | return NULL; | |
84 | } | |
85 | ||
86 | return cpu; | |
87 | } | |
88 | ||
444d5590 AF |
89 | bool cpu_paging_enabled(const CPUState *cpu) |
90 | { | |
91 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
92 | ||
93 | return cc->get_paging_enabled(cpu); | |
94 | } | |
95 | ||
96 | static bool cpu_common_get_paging_enabled(const CPUState *cpu) | |
97 | { | |
6db297ea | 98 | return false; |
444d5590 AF |
99 | } |
100 | ||
a23bbfda AF |
101 | void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, |
102 | Error **errp) | |
103 | { | |
104 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
105 | ||
fbe95bfb | 106 | cc->get_memory_mapping(cpu, list, errp); |
a23bbfda AF |
107 | } |
108 | ||
109 | static void cpu_common_get_memory_mapping(CPUState *cpu, | |
110 | MemoryMappingList *list, | |
111 | Error **errp) | |
112 | { | |
113 | error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); | |
114 | } | |
115 | ||
d8ed887b AF |
116 | void cpu_reset_interrupt(CPUState *cpu, int mask) |
117 | { | |
118 | cpu->interrupt_request &= ~mask; | |
119 | } | |
120 | ||
60a3e17a AF |
121 | void cpu_exit(CPUState *cpu) |
122 | { | |
027d9a7d | 123 | atomic_set(&cpu->exit_request, 1); |
ab096a75 PB |
124 | /* Ensure cpu_exec will see the exit request after TCG has exited. */ |
125 | smp_wmb(); | |
027d9a7d | 126 | atomic_set(&cpu->tcg_exit_req, 1); |
60a3e17a AF |
127 | } |
128 | ||
c72bf468 JF |
129 | int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, |
130 | void *opaque) | |
131 | { | |
132 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
133 | ||
134 | return (*cc->write_elf32_qemunote)(f, cpu, opaque); | |
135 | } | |
136 | ||
137 | static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f, | |
138 | CPUState *cpu, void *opaque) | |
139 | { | |
b09afd58 | 140 | return 0; |
c72bf468 JF |
141 | } |
142 | ||
143 | int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, | |
144 | int cpuid, void *opaque) | |
145 | { | |
146 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
147 | ||
148 | return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); | |
149 | } | |
150 | ||
151 | static int cpu_common_write_elf32_note(WriteCoreDumpFunction f, | |
152 | CPUState *cpu, int cpuid, | |
153 | void *opaque) | |
154 | { | |
155 | return -1; | |
156 | } | |
157 | ||
158 | int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, | |
159 | void *opaque) | |
160 | { | |
161 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
162 | ||
163 | return (*cc->write_elf64_qemunote)(f, cpu, opaque); | |
164 | } | |
165 | ||
166 | static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f, | |
167 | CPUState *cpu, void *opaque) | |
168 | { | |
b09afd58 | 169 | return 0; |
c72bf468 JF |
170 | } |
171 | ||
172 | int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, | |
173 | int cpuid, void *opaque) | |
174 | { | |
175 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
176 | ||
177 | return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); | |
178 | } | |
179 | ||
180 | static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, | |
181 | CPUState *cpu, int cpuid, | |
182 | void *opaque) | |
183 | { | |
184 | return -1; | |
185 | } | |
186 | ||
187 | ||
5b50e790 AF |
188 | static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg) |
189 | { | |
190 | return 0; | |
191 | } | |
192 | ||
193 | static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) | |
194 | { | |
195 | return 0; | |
196 | } | |
197 | ||
568496c0 SF |
198 | static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp) |
199 | { | |
200 | /* If no extra check is required, QEMU watchpoint match can be considered | |
201 | * as an architectural match. | |
202 | */ | |
203 | return true; | |
204 | } | |
205 | ||
bf7663c4 GK |
206 | bool target_words_bigendian(void); |
207 | static bool cpu_common_virtio_is_big_endian(CPUState *cpu) | |
208 | { | |
209 | return target_words_bigendian(); | |
210 | } | |
5b50e790 | 211 | |
cffe7b32 | 212 | static void cpu_common_noop(CPUState *cpu) |
86025ee4 PM |
213 | { |
214 | } | |
215 | ||
9585db68 RH |
216 | static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req) |
217 | { | |
218 | return false; | |
219 | } | |
220 | ||
878096ee AF |
221 | void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, |
222 | int flags) | |
223 | { | |
224 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
225 | ||
226 | if (cc->dump_state) { | |
97577fd4 | 227 | cpu_synchronize_state(cpu); |
878096ee AF |
228 | cc->dump_state(cpu, f, cpu_fprintf, flags); |
229 | } | |
230 | } | |
231 | ||
232 | void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, | |
233 | int flags) | |
234 | { | |
235 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
236 | ||
237 | if (cc->dump_statistics) { | |
238 | cc->dump_statistics(cpu, f, cpu_fprintf, flags); | |
239 | } | |
240 | } | |
241 | ||
dd83b06a AF |
242 | void cpu_reset(CPUState *cpu) |
243 | { | |
244 | CPUClass *klass = CPU_GET_CLASS(cpu); | |
245 | ||
246 | if (klass->reset != NULL) { | |
247 | (*klass->reset)(cpu); | |
248 | } | |
2cc2d082 LV |
249 | |
250 | trace_guest_cpu_reset(cpu); | |
dd83b06a AF |
251 | } |
252 | ||
253 | static void cpu_common_reset(CPUState *cpu) | |
254 | { | |
91b1df8c | 255 | CPUClass *cc = CPU_GET_CLASS(cpu); |
ce7cf6a9 | 256 | int i; |
91b1df8c AF |
257 | |
258 | if (qemu_loglevel_mask(CPU_LOG_RESET)) { | |
259 | qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); | |
260 | log_cpu_state(cpu, cc->reset_dump_flags); | |
261 | } | |
262 | ||
259186a7 | 263 | cpu->interrupt_request = 0; |
259186a7 | 264 | cpu->halted = 0; |
93afeade AF |
265 | cpu->mem_io_pc = 0; |
266 | cpu->mem_io_vaddr = 0; | |
efee7340 | 267 | cpu->icount_extra = 0; |
28ecfd7a | 268 | cpu->icount_decr.u32 = 0; |
414b15c9 | 269 | cpu->can_do_io = 1; |
f9d8f667 | 270 | cpu->exception_index = -1; |
bac05aa9 | 271 | cpu->crash_occurred = false; |
ce7cf6a9 AB |
272 | |
273 | for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) { | |
274 | atomic_set(&cpu->tb_jmp_cache[i], NULL); | |
275 | } | |
dd83b06a AF |
276 | } |
277 | ||
8c2e1b00 AF |
278 | static bool cpu_common_has_work(CPUState *cs) |
279 | { | |
280 | return false; | |
281 | } | |
282 | ||
2b8c2754 AF |
283 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) |
284 | { | |
285 | CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); | |
286 | ||
287 | return cc->class_by_name(cpu_model); | |
288 | } | |
289 | ||
290 | static ObjectClass *cpu_common_class_by_name(const char *cpu_model) | |
291 | { | |
292 | return NULL; | |
293 | } | |
294 | ||
62a48a2a | 295 | static void cpu_common_parse_features(const char *typename, char *features, |
1590bbcb AF |
296 | Error **errp) |
297 | { | |
298 | char *featurestr; /* Single "key=value" string being parsed */ | |
299 | char *val; | |
62a48a2a IM |
300 | static bool cpu_globals_initialized; |
301 | ||
302 | /* TODO: all callers of ->parse_features() need to be changed to | |
303 | * call it only once, so we can remove this check (or change it | |
304 | * to assert(!cpu_globals_initialized). | |
305 | * Current callers of ->parse_features() are: | |
62a48a2a | 306 | * - cpu_generic_init() |
62a48a2a IM |
307 | */ |
308 | if (cpu_globals_initialized) { | |
309 | return; | |
310 | } | |
311 | cpu_globals_initialized = true; | |
1590bbcb AF |
312 | |
313 | featurestr = features ? strtok(features, ",") : NULL; | |
314 | ||
315 | while (featurestr) { | |
316 | val = strchr(featurestr, '='); | |
317 | if (val) { | |
62a48a2a | 318 | GlobalProperty *prop = g_new0(typeof(*prop), 1); |
1590bbcb AF |
319 | *val = 0; |
320 | val++; | |
62a48a2a IM |
321 | prop->driver = typename; |
322 | prop->property = g_strdup(featurestr); | |
323 | prop->value = g_strdup(val); | |
324 | prop->errp = &error_fatal; | |
325 | qdev_prop_register_global(prop); | |
1590bbcb AF |
326 | } else { |
327 | error_setg(errp, "Expected key=value format, found %s.", | |
328 | featurestr); | |
329 | return; | |
330 | } | |
331 | featurestr = strtok(NULL, ","); | |
332 | } | |
333 | } | |
334 | ||
4f658099 AF |
335 | static void cpu_common_realizefn(DeviceState *dev, Error **errp) |
336 | { | |
13eed94e IM |
337 | CPUState *cpu = CPU(dev); |
338 | ||
339 | if (dev->hotplugged) { | |
340 | cpu_synchronize_post_init(cpu); | |
6afb4721 | 341 | cpu_resume(cpu); |
13eed94e | 342 | } |
2bfe11c8 LV |
343 | |
344 | /* NOTE: latest generic point where the cpu is fully realized */ | |
345 | trace_init_vcpu(cpu); | |
4f658099 AF |
346 | } |
347 | ||
7bbc124e LV |
348 | static void cpu_common_unrealizefn(DeviceState *dev, Error **errp) |
349 | { | |
350 | CPUState *cpu = CPU(dev); | |
351 | cpu_exec_unrealizefn(cpu); | |
352 | } | |
353 | ||
a0e372f0 AF |
354 | static void cpu_common_initfn(Object *obj) |
355 | { | |
356 | CPUState *cpu = CPU(obj); | |
357 | CPUClass *cc = CPU_GET_CLASS(obj); | |
358 | ||
a07f953e | 359 | cpu->cpu_index = UNASSIGNED_CPU_INDEX; |
35143f01 | 360 | cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; |
fa5376dd MAL |
361 | /* *-user doesn't have configurable SMP topology */ |
362 | /* the default value is changed by qemu_init_vcpu() for softmmu */ | |
363 | cpu->nr_cores = 1; | |
364 | cpu->nr_threads = 1; | |
365 | ||
376692b9 | 366 | qemu_mutex_init(&cpu->work_mutex); |
7c39163e EH |
367 | QTAILQ_INIT(&cpu->breakpoints); |
368 | QTAILQ_INIT(&cpu->watchpoints); | |
b7d48952 DB |
369 | |
370 | cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count()); | |
39e329e3 LV |
371 | |
372 | cpu_exec_initfn(cpu); | |
a0e372f0 AF |
373 | } |
374 | ||
b7bca733 BR |
375 | static void cpu_common_finalize(Object *obj) |
376 | { | |
b7d48952 | 377 | CPUState *cpu = CPU(obj); |
b7d48952 | 378 | g_free(cpu->trace_dstate); |
b7bca733 BR |
379 | } |
380 | ||
997395d3 IM |
381 | static int64_t cpu_common_get_arch_id(CPUState *cpu) |
382 | { | |
383 | return cpu->cpu_index; | |
384 | } | |
385 | ||
dd83b06a AF |
386 | static void cpu_class_init(ObjectClass *klass, void *data) |
387 | { | |
961f8395 | 388 | DeviceClass *dc = DEVICE_CLASS(klass); |
dd83b06a AF |
389 | CPUClass *k = CPU_CLASS(klass); |
390 | ||
2b8c2754 | 391 | k->class_by_name = cpu_common_class_by_name; |
1590bbcb | 392 | k->parse_features = cpu_common_parse_features; |
dd83b06a | 393 | k->reset = cpu_common_reset; |
997395d3 | 394 | k->get_arch_id = cpu_common_get_arch_id; |
8c2e1b00 | 395 | k->has_work = cpu_common_has_work; |
444d5590 | 396 | k->get_paging_enabled = cpu_common_get_paging_enabled; |
a23bbfda | 397 | k->get_memory_mapping = cpu_common_get_memory_mapping; |
c72bf468 JF |
398 | k->write_elf32_qemunote = cpu_common_write_elf32_qemunote; |
399 | k->write_elf32_note = cpu_common_write_elf32_note; | |
400 | k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; | |
401 | k->write_elf64_note = cpu_common_write_elf64_note; | |
5b50e790 AF |
402 | k->gdb_read_register = cpu_common_gdb_read_register; |
403 | k->gdb_write_register = cpu_common_gdb_write_register; | |
bf7663c4 | 404 | k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; |
cffe7b32 | 405 | k->debug_excp_handler = cpu_common_noop; |
568496c0 | 406 | k->debug_check_watchpoint = cpu_common_debug_check_watchpoint; |
cffe7b32 RH |
407 | k->cpu_exec_enter = cpu_common_noop; |
408 | k->cpu_exec_exit = cpu_common_noop; | |
9585db68 | 409 | k->cpu_exec_interrupt = cpu_common_exec_interrupt; |
4f658099 | 410 | dc->realize = cpu_common_realizefn; |
7bbc124e | 411 | dc->unrealize = cpu_common_unrealizefn; |
ffa95714 MA |
412 | /* |
413 | * Reason: CPUs still need special care by board code: wiring up | |
414 | * IRQs, adding reset handlers, halting non-first CPUs, ... | |
415 | */ | |
416 | dc->cannot_instantiate_with_device_add_yet = true; | |
dd83b06a AF |
417 | } |
418 | ||
961f8395 | 419 | static const TypeInfo cpu_type_info = { |
dd83b06a | 420 | .name = TYPE_CPU, |
961f8395 | 421 | .parent = TYPE_DEVICE, |
dd83b06a | 422 | .instance_size = sizeof(CPUState), |
a0e372f0 | 423 | .instance_init = cpu_common_initfn, |
b7bca733 | 424 | .instance_finalize = cpu_common_finalize, |
dd83b06a AF |
425 | .abstract = true, |
426 | .class_size = sizeof(CPUClass), | |
427 | .class_init = cpu_class_init, | |
428 | }; | |
429 | ||
430 | static void cpu_register_types(void) | |
431 | { | |
432 | type_register_static(&cpu_type_info); | |
433 | } | |
434 | ||
435 | type_init(cpu_register_types) |