[qemu.git] / target-s390x / gdbstub.c

/*
 * s390x gdb server stub
 *
 * Copyright (c) 2003-2005 Fabrice Bellard
 * Copyright (c) 2013 SUSE LINUX Products GmbH
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "qemu/bitops.h"

int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    uint64_t val;
    int cc_op;

    switch (n) {
    case S390_PSWM_REGNUM:
        if (tcg_enabled()) {
            cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
                            env->cc_vr);
            val = deposit64(env->psw.mask, 44, 2, cc_op);
            return gdb_get_regl(mem_buf, val);
        }
        return gdb_get_regl(mem_buf, env->psw.mask);
    case S390_PSWA_REGNUM:
        return gdb_get_regl(mem_buf, env->psw.addr);
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
    }
    return 0;
}

int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;
    target_ulong tmpl = ldtul_p(mem_buf);

    switch (n) {
    case S390_PSWM_REGNUM:
        env->psw.mask = tmpl;
        if (tcg_enabled()) {
            env->cc_op = extract64(tmpl, 44, 2);
        }
        break;
    case S390_PSWA_REGNUM:
        env->psw.addr = tmpl;
        break;
    case S390_R0_REGNUM ... S390_R15_REGNUM:
        env->regs[n - S390_R0_REGNUM] = tmpl;
        break;
    default:
        return 0;
    }
    return 8;
}

/* the values represent the positions in s390-acr.xml */
#define S390_A0_REGNUM 0
#define S390_A15_REGNUM 15
/* total number of registers in s390-acr.xml */
#define S390_NUM_AC_REGS 16

static int cpu_read_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        return gdb_get_reg32(mem_buf, env->aregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_A0_REGNUM ... S390_A15_REGNUM:
        env->aregs[n] = ldl_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 4;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-fpr.xml */
#define S390_FPC_REGNUM 0
#define S390_F0_REGNUM 1
#define S390_F15_REGNUM 16
/* total number of registers in s390-fpr.xml */
#define S390_NUM_FP_REGS 17

static int cpu_read_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        return gdb_get_reg32(mem_buf, env->fpc);
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
    default:
        return 0;
    }
}

static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_FPC_REGNUM:
        env->fpc = ldl_p(mem_buf);
        return 4;
    case S390_F0_REGNUM ... S390_F15_REGNUM:
        get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-vx.xml */
#define S390_V0L_REGNUM 0
#define S390_V15L_REGNUM 15
#define S390_V16_REGNUM 16
#define S390_V31_REGNUM 31
/* total number of registers in s390-vx.xml */
#define S390_NUM_VREGS 32

static int cpu_read_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    int ret;

    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
        break;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
        ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
        break;
    default:
        ret = 0;
    }

    return ret;
}

static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_V0L_REGNUM ... S390_V15L_REGNUM:
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 8;
    case S390_V16_REGNUM ... S390_V31_REGNUM:
        env->vregs[n][0].ll = ldtul_p(mem_buf);
        env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
        return 16;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-cr.xml */
#define S390_C0_REGNUM 0
#define S390_C15_REGNUM 15
/* total number of registers in s390-cr.xml */
#define S390_NUM_C_REGS 16

#ifndef CONFIG_USER_ONLY
static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        return gdb_get_regl(mem_buf, env->cregs[n]);
    default:
        return 0;
    }
}

static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_C0_REGNUM ... S390_C15_REGNUM:
        env->cregs[n] = ldtul_p(mem_buf);
        if (tcg_enabled()) {
            tlb_flush(ENV_GET_CPU(env), 1);
        }
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}

/* the values represent the positions in s390-virt.xml */
#define S390_VIRT_CKC_REGNUM    0
#define S390_VIRT_CPUTM_REGNUM  1
#define S390_VIRT_BEA_REGNUM    2
#define S390_VIRT_PREFIX_REGNUM 3
#define S390_VIRT_PP_REGNUM     4
#define S390_VIRT_PFT_REGNUM    5
#define S390_VIRT_PFS_REGNUM    6
#define S390_VIRT_PFC_REGNUM    7
/* total number of registers in s390-virt.xml */
#define S390_NUM_VIRT_REGS 8

static int cpu_read_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        return gdb_get_regl(mem_buf, env->ckc);
    case S390_VIRT_CPUTM_REGNUM:
        return gdb_get_regl(mem_buf, env->cputm);
    case S390_VIRT_BEA_REGNUM:
        return gdb_get_regl(mem_buf, env->gbea);
    case S390_VIRT_PREFIX_REGNUM:
        return gdb_get_regl(mem_buf, env->psa);
    case S390_VIRT_PP_REGNUM:
        return gdb_get_regl(mem_buf, env->pp);
    case S390_VIRT_PFT_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_token);
    case S390_VIRT_PFS_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_select);
    case S390_VIRT_PFC_REGNUM:
        return gdb_get_regl(mem_buf, env->pfault_compare);
    default:
        return 0;
    }
}

static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
{
    switch (n) {
    case S390_VIRT_CKC_REGNUM:
        env->ckc = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_CPUTM_REGNUM:
        env->cputm = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_BEA_REGNUM:
        env->gbea = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PREFIX_REGNUM:
        env->psa = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PP_REGNUM:
        env->pp = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFT_REGNUM:
        env->pfault_token = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFS_REGNUM:
        env->pfault_select = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    case S390_VIRT_PFC_REGNUM:
        env->pfault_compare = ldtul_p(mem_buf);
        cpu_synchronize_post_init(ENV_GET_CPU(env));
        return 8;
    default:
        return 0;
    }
}
#endif

void s390_cpu_gdb_init(CPUState *cs)
{
    gdb_register_coprocessor(cs, cpu_read_ac_reg,
                             cpu_write_ac_reg,
                             S390_NUM_AC_REGS, "s390-acr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_fp_reg,
                             cpu_write_fp_reg,
                             S390_NUM_FP_REGS, "s390-fpr.xml", 0);

    gdb_register_coprocessor(cs, cpu_read_vreg,
                             cpu_write_vreg,
                             S390_NUM_VREGS, "s390-vx.xml", 0);

#ifndef CONFIG_USER_ONLY
    gdb_register_coprocessor(cs, cpu_read_c_reg,
                             cpu_write_c_reg,
                             S390_NUM_C_REGS, "s390-cr.xml", 0);

    if (kvm_enabled()) {
        gdb_register_coprocessor(cs, cpu_read_virt_reg,
                                 cpu_write_virt_reg,
                                 S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
    }
#endif
}
Commit	Line	Data
cfae5c90 AF	1	/*
	2	* s390x gdb server stub
	3	*
	4	* Copyright (c) 2003-2005 Fabrice Bellard
	5	* Copyright (c) 2013 SUSE LINUX Products GmbH
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*/
9615495a	20	#include "qemu/osdep.h"
5b50e790	21	#include "qemu-common.h"
33c11879	22	#include "cpu.h"
63c91552	23	#include "exec/exec-all.h"
5b50e790 AF	24	#include "exec/gdbstub.h"
5b50e790 AF	25	#include "qemu/bitops.h"
cfae5c90	26
5b50e790	27	int s390_cpu_gdb_read_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	28	{
5b50e790 AF	29	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	30	CPUS390XState *env = &cpu->env;
cfae5c90 AF	31	uint64_t val;
	32	int cc_op;
	33
	34	switch (n) {
	35	case S390_PSWM_REGNUM:
97fa52f0 DH	36	if (tcg_enabled()) {
	37	cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst,
	38	env->cc_vr);
	39	val = deposit64(env->psw.mask, 44, 2, cc_op);
	40	return gdb_get_regl(mem_buf, val);
	41	}
	42	return gdb_get_regl(mem_buf, env->psw.mask);
cfae5c90	43	case S390_PSWA_REGNUM:
986a2998	44	return gdb_get_regl(mem_buf, env->psw.addr);
cfae5c90	45	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	46	return gdb_get_regl(mem_buf, env->regs[n - S390_R0_REGNUM]);
cfae5c90	47	}
cfae5c90 AF	48	return 0;
	49	}
	50
5b50e790	51	int s390_cpu_gdb_write_register(CPUState cs, uint8_t mem_buf, int n)
cfae5c90	52	{
5b50e790 AF	53	S390CPU *cpu = S390_CPU(cs);
5b50e790 AF	54	CPUS390XState *env = &cpu->env;
73d510c9	55	target_ulong tmpl = ldtul_p(mem_buf);
cfae5c90 AF	56
	57	switch (n) {
	58	case S390_PSWM_REGNUM:
	59	env->psw.mask = tmpl;
97fa52f0 DH	60	if (tcg_enabled()) {
	61	env->cc_op = extract64(tmpl, 44, 2);
	62	}
cfae5c90 AF	63	break;
	64	case S390_PSWA_REGNUM:
	65	env->psw.addr = tmpl;
	66	break;
	67	case S390_R0_REGNUM ... S390_R15_REGNUM:
218829db	68	env->regs[n - S390_R0_REGNUM] = tmpl;
cfae5c90	69	break;
73d510c9 DH	70	default:
	71	return 0;
	72	}
	73	return 8;
	74	}
	75
	76	/* the values represent the positions in s390-acr.xml */
	77	#define S390_A0_REGNUM 0
	78	#define S390_A15_REGNUM 15
	79	/* total number of registers in s390-acr.xml */
	80	#define S390_NUM_AC_REGS 16
	81
	82	static int cpu_read_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	83	{
	84	switch (n) {
cfae5c90	85	case S390_A0_REGNUM ... S390_A15_REGNUM:
73d510c9 DH	86	return gdb_get_reg32(mem_buf, env->aregs[n]);
	87	default:
	88	return 0;
	89	}
	90	}
	91
	92	static int cpu_write_ac_reg(CPUS390XState env, uint8_t mem_buf, int n)
	93	{
	94	switch (n) {
	95	case S390_A0_REGNUM ... S390_A15_REGNUM:
	96	env->aregs[n] = ldl_p(mem_buf);
55b1b753	97	cpu_synchronize_post_init(ENV_GET_CPU(env));
73d510c9 DH	98	return 4;
	99	default:
	100	return 0;
	101	}
	102	}
	103
	104	/* the values represent the positions in s390-fpr.xml */
	105	#define S390_FPC_REGNUM 0
	106	#define S390_F0_REGNUM 1
	107	#define S390_F15_REGNUM 16
	108	/* total number of registers in s390-fpr.xml */
	109	#define S390_NUM_FP_REGS 17
	110
	111	static int cpu_read_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	112	{
	113	switch (n) {
cfae5c90	114	case S390_FPC_REGNUM:
73d510c9	115	return gdb_get_reg32(mem_buf, env->fpc);
cfae5c90	116	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	117	return gdb_get_reg64(mem_buf, get_freg(env, n - S390_F0_REGNUM)->ll);
cfae5c90 AF	118	default:
	119	return 0;
	120	}
73d510c9 DH	121	}
	122
	123	static int cpu_write_fp_reg(CPUS390XState env, uint8_t mem_buf, int n)
	124	{
	125	switch (n) {
	126	case S390_FPC_REGNUM:
	127	env->fpc = ldl_p(mem_buf);
	128	return 4;
	129	case S390_F0_REGNUM ... S390_F15_REGNUM:
c498d8e3	130	get_freg(env, n - S390_F0_REGNUM)->ll = ldtul_p(mem_buf);
73d510c9 DH	131	return 8;
	132	default:
	133	return 0;
	134	}
	135	}
	136
ca343c7a EF	137	/* the values represent the positions in s390-vx.xml */
	138	#define S390_V0L_REGNUM 0
	139	#define S390_V15L_REGNUM 15
	140	#define S390_V16_REGNUM 16
	141	#define S390_V31_REGNUM 31
	142	/* total number of registers in s390-vx.xml */
	143	#define S390_NUM_VREGS 32
	144
	145	static int cpu_read_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	146	{
	147	int ret;
	148
	149	switch (n) {
	150	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	151	ret = gdb_get_reg64(mem_buf, env->vregs[n][1].ll);
	152	break;
	153	case S390_V16_REGNUM ... S390_V31_REGNUM:
	154	ret = gdb_get_reg64(mem_buf, env->vregs[n][0].ll);
	155	ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1].ll);
	156	break;
	157	default:
	158	ret = 0;
	159	}
	160
	161	return ret;
	162	}
	163
	164	static int cpu_write_vreg(CPUS390XState env, uint8_t mem_buf, int n)
	165	{
	166	switch (n) {
	167	case S390_V0L_REGNUM ... S390_V15L_REGNUM:
	168	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	169	return 8;
	170	case S390_V16_REGNUM ... S390_V31_REGNUM:
	171	env->vregs[n][0].ll = ldtul_p(mem_buf);
	172	env->vregs[n][1].ll = ldtul_p(mem_buf + 8);
	173	return 16;
	174	default:
	175	return 0;
	176	}
	177	}
	178
5b9f6345 DH	179	/* the values represent the positions in s390-cr.xml */
	180	#define S390_C0_REGNUM 0
	181	#define S390_C15_REGNUM 15
	182	/* total number of registers in s390-cr.xml */
	183	#define S390_NUM_C_REGS 16
	184
	185	#ifndef CONFIG_USER_ONLY
	186	static int cpu_read_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	187	{
	188	switch (n) {
	189	case S390_C0_REGNUM ... S390_C15_REGNUM:
	190	return gdb_get_regl(mem_buf, env->cregs[n]);
	191	default:
	192	return 0;
	193	}
	194	}
	195
	196	static int cpu_write_c_reg(CPUS390XState env, uint8_t mem_buf, int n)
	197	{
	198	switch (n) {
	199	case S390_C0_REGNUM ... S390_C15_REGNUM:
	200	env->cregs[n] = ldtul_p(mem_buf);
	201	if (tcg_enabled()) {
	202	tlb_flush(ENV_GET_CPU(env), 1);
	203	}
	204	cpu_synchronize_post_init(ENV_GET_CPU(env));
	205	return 8;
	206	default:
	207	return 0;
	208	}
	209	}
8a641ff6 DH	210
	211	/* the values represent the positions in s390-virt.xml */
	212	#define S390_VIRT_CKC_REGNUM 0
	213	#define S390_VIRT_CPUTM_REGNUM 1
	214	#define S390_VIRT_BEA_REGNUM 2
	215	#define S390_VIRT_PREFIX_REGNUM 3
	216	#define S390_VIRT_PP_REGNUM 4
	217	#define S390_VIRT_PFT_REGNUM 5
	218	#define S390_VIRT_PFS_REGNUM 6
	219	#define S390_VIRT_PFC_REGNUM 7
	220	/* total number of registers in s390-virt.xml */
	221	#define S390_NUM_VIRT_REGS 8
	222
	223	static int cpu_read_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	224	{
	225	switch (n) {
	226	case S390_VIRT_CKC_REGNUM:
	227	return gdb_get_regl(mem_buf, env->ckc);
	228	case S390_VIRT_CPUTM_REGNUM:
	229	return gdb_get_regl(mem_buf, env->cputm);
	230	case S390_VIRT_BEA_REGNUM:
	231	return gdb_get_regl(mem_buf, env->gbea);
	232	case S390_VIRT_PREFIX_REGNUM:
	233	return gdb_get_regl(mem_buf, env->psa);
	234	case S390_VIRT_PP_REGNUM:
	235	return gdb_get_regl(mem_buf, env->pp);
	236	case S390_VIRT_PFT_REGNUM:
	237	return gdb_get_regl(mem_buf, env->pfault_token);
	238	case S390_VIRT_PFS_REGNUM:
	239	return gdb_get_regl(mem_buf, env->pfault_select);
	240	case S390_VIRT_PFC_REGNUM:
	241	return gdb_get_regl(mem_buf, env->pfault_compare);
	242	default:
	243	return 0;
	244	}
	245	}
	246
	247	static int cpu_write_virt_reg(CPUS390XState env, uint8_t mem_buf, int n)
	248	{
	249	switch (n) {
	250	case S390_VIRT_CKC_REGNUM:
	251	env->ckc = ldtul_p(mem_buf);
	252	cpu_synchronize_post_init(ENV_GET_CPU(env));
	253	return 8;
	254	case S390_VIRT_CPUTM_REGNUM:
	255	env->cputm = ldtul_p(mem_buf);
	256	cpu_synchronize_post_init(ENV_GET_CPU(env));
	257	return 8;
	258	case S390_VIRT_BEA_REGNUM:
	259	env->gbea = ldtul_p(mem_buf);
	260	cpu_synchronize_post_init(ENV_GET_CPU(env));
	261	return 8;
	262	case S390_VIRT_PREFIX_REGNUM:
	263	env->psa = ldtul_p(mem_buf);
	264	cpu_synchronize_post_init(ENV_GET_CPU(env));
	265	return 8;
	266	case S390_VIRT_PP_REGNUM:
	267	env->pp = ldtul_p(mem_buf);
	268	cpu_synchronize_post_init(ENV_GET_CPU(env));
	269	return 8;
	270	case S390_VIRT_PFT_REGNUM:
	271	env->pfault_token = ldtul_p(mem_buf);
	272	cpu_synchronize_post_init(ENV_GET_CPU(env));
	273	return 8;
274	case S390_VIRT_PFS_REGNUM:
275	env->pfault_select = ldtul_p(mem_buf);
276	cpu_synchronize_post_init(ENV_GET_CPU(env));
277	return 8;
278	case S390_VIRT_PFC_REGNUM:
279	env->pfault_compare = ldtul_p(mem_buf);
280	cpu_synchronize_post_init(ENV_GET_CPU(env));
281	return 8;
282	default:
283	return 0;
284	}
285	}
5b9f6345 DH	286	#endif
5b9f6345 DH	287
73d510c9 DH	288	void s390_cpu_gdb_init(CPUState *cs)
	289	{
	290	gdb_register_coprocessor(cs, cpu_read_ac_reg,
	291	cpu_write_ac_reg,
	292	S390_NUM_AC_REGS, "s390-acr.xml", 0);
	293
	294	gdb_register_coprocessor(cs, cpu_read_fp_reg,
	295	cpu_write_fp_reg,
	296	S390_NUM_FP_REGS, "s390-fpr.xml", 0);
ca343c7a EF	297
	298	gdb_register_coprocessor(cs, cpu_read_vreg,
	299	cpu_write_vreg,
	300	S390_NUM_VREGS, "s390-vx.xml", 0);
5b9f6345 DH	301
	302	#ifndef CONFIG_USER_ONLY
	303	gdb_register_coprocessor(cs, cpu_read_c_reg,
	304	cpu_write_c_reg,
	305	S390_NUM_C_REGS, "s390-cr.xml", 0);
8a641ff6 DH	306
	307	if (kvm_enabled()) {
	308	gdb_register_coprocessor(cs, cpu_read_virt_reg,
	309	cpu_write_virt_reg,
	310	S390_NUM_VIRT_REGS, "s390-virt.xml", 0);
	311	}
5b9f6345	312	#endif
cfae5c90	313	}